From 01ca1b8805e7fef999dde7133923948f0d5c05be Mon Sep 17 00:00:00 2001
From: none <none>
Date: Thu, 25 Feb 2021 14:58:42 +0100
Subject: [PATCH] Detect and report TS misalignment and switch to unaligned
 processing.

---
 ddbridge/ddbridge-core.c | 25 ++++++++++++++++++++-----
 ddbridge/ddbridge.h      |  1 +
 2 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index 19830ad..40f7cbc 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -2300,15 +2300,30 @@ static void input_write_dvb(struct ddb_input *input,
 		if (alt_dma)
 			dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf],
 						dma2->size, DMA_FROM_DEVICE);
-		if (raw_stream || input->con)
+		if (raw_stream || input->con) {
 			dvb_dmx_swfilter_raw(&dvb->demux,
 					     dma2->vbuf[dma->cbuf],
 					     dma2->size);
-		else
-			dvb_dmx_swfilter_packets(&dvb->demux,
+		} else {
+			if (dma2->vbuf[dma->cbuf][0] != 0x47) {
+				if (!dma2->unaligned) {
+					dma2->unaligned++;
+					dev_warn(dev->dev, "Input %u dma buffer unaligned, "
+						 "switching to unaligned processing.\n",
+						 input->nr);
+					print_hex_dump(KERN_INFO, "TS: ", DUMP_PREFIX_OFFSET, 32, 1,
+						       dma2->vbuf[dma->cbuf],
+						       256, false);
+				}
+				dvb_dmx_swfilter(&dvb->demux,
 						 dma2->vbuf[dma->cbuf],
-						 dma2->size / 188);
-
+						 dma2->size);
+			} else
+				dvb_dmx_swfilter_packets(&dvb->demux,
+							 dma2->vbuf[dma->cbuf],
+							 dma2->size / 188);
+		}
+		
 		dma->cbuf = (dma->cbuf + 1) % dma2->num;
 		if (ack)
 			ddbwritel(dev, (dma->cbuf << 11),
diff --git a/ddbridge/ddbridge.h b/ddbridge/ddbridge.h
index 62afb27..7002590 100644
--- a/ddbridge/ddbridge.h
+++ b/ddbridge/ddbridge.h
@@ -219,6 +219,7 @@ struct ddb_dma {
 
 	u32                    stall_count;
 	u32                    packet_loss;
+	u32                    unaligned;
 };
 
 struct ddb_dvb {