From 7cc91075979c3fad68f6adfed138736123346e04 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 30 Dec 2016 15:03:38 +0100
Subject: [PATCH 01/47] add support for single demod mode for testing high bit
 rates

---
 ddbridge/ddbridge-core.c | 6 ++++++
 frontends/stv0910.c      | 9 +++++++--
 frontends/stv0910.h      | 1 +
 3 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index 6bfd392..3a457e3 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -66,6 +66,10 @@ static int no_init;
 module_param(no_init, int, 0444);
 MODULE_PARM_DESC(no_init, "do not initialize most devices");
 
+static int stv0910_single;
+module_param(stv0910_single, int, 0444);
+MODULE_PARM_DESC(no_init, "use stv0910 cards as single demods");
+
 #define DDB_MAX_ADAPTER 64
 static struct ddb *ddbs[DDB_MAX_ADAPTER];
 
@@ -1573,6 +1577,8 @@ static int demod_attach_stv0910(struct ddb_input *input, int type)
 	struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
 	struct stv0910_cfg cfg = stv0910_p;
 
+	if (stv0910_single)
+		cfg.single = 1;
 	if (type)
 		cfg.parallel = 2;
 	dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1));
diff --git a/frontends/stv0910.c b/frontends/stv0910.c
index 2b4223d..5322eba 100644
--- a/frontends/stv0910.c
+++ b/frontends/stv0910.c
@@ -105,6 +105,7 @@ struct stv {
 	u8                   tscfgh;
 	u8                   tsgeneral;
 	u8                   tsspeed;
+	u8                   single;
 	unsigned long        tune_time;
 
 	s32                  SearchRange;
@@ -1137,7 +1138,10 @@ static int probe(struct stv *state)
 	write_reg(state, RSTV0910_SYNTCTRL,  0x02);  /* SYNTCTRL */
 	write_reg(state, RSTV0910_TSGENERAL, state->tsgeneral);  /* TSGENERAL */
 	write_reg(state, RSTV0910_CFGEXT,    0x02);  /* CFGEXT */
-	write_reg(state, RSTV0910_GENCFG,    0x15);  /* GENCFG */
+	if (state->single)
+		write_reg(state, RSTV0910_GENCFG,    0x14);  /* GENCFG */
+	else
+		write_reg(state, RSTV0910_GENCFG,    0x15);  /* GENCFG */
 
 	write_reg(state, RSTV0910_P1_TNRCFG2, 0x02);  /* IQSWAP = 0 */
 	write_reg(state, RSTV0910_P2_TNRCFG2, 0x82);  /* IQSWAP = 1 */
@@ -1830,7 +1834,8 @@ struct dvb_frontend *stv0910_attach(struct i2c_adapter *i2c,
 	state->DEMOD = 0x10;     /* Inversion : Auto with reset to 0 */
 	state->ReceiveMode   = Mode_None;
 	state->CurScramblingCode = NO_SCRAMBLING_CODE;
-
+	state->single = cfg->single ? 1 : 0;
+	
 	base = match_base(i2c, cfg->adr);
 	if (base) {
 		base->count++;
diff --git a/frontends/stv0910.h b/frontends/stv0910.h
index a6fad29..338ae01 100644
--- a/frontends/stv0910.h
+++ b/frontends/stv0910.h
@@ -9,6 +9,7 @@ struct stv0910_cfg {
 	u8  adr;
 	u8  parallel;
 	u8  rptlvl;
+	u8  single;
 };
 
 #if defined(CONFIG_DVB_STV0910) || \

From 4c276fbc750b922c26f67fe99e72a4093675ef82 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 9 Jan 2017 19:26:52 +0100
Subject: [PATCH 02/47] add SDR support

---
 apps/flashprog.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/apps/flashprog.c b/apps/flashprog.c
index b5e5183..a2fa04d 100644
--- a/apps/flashprog.c
+++ b/apps/flashprog.c
@@ -249,6 +249,10 @@ int main(int argc, char **argv)
 			fname="DVBModulatorV2A_DD01_0210.fpga";
 			printf("Modulator V2\n");
 			break;
+		case 0x0220:
+			fname="SDRModulatorV1A_DD01_0220.fpga";
+			printf("SDRModulator\n");
+			break;
 		default:
 			printf("UNKNOWN\n");
 			break;
@@ -314,6 +318,7 @@ int main(int argc, char **argv)
 		err = FlashWritePageMode(ddb,FlashOffset,buffer,BufferSize,0x3C);
 		break;
         case SPANSION_S25FL116K:
+        case SPANSION_S25FL164K:
 		err = FlashWritePageMode(ddb,FlashOffset,buffer,BufferSize,0x1C);
 		break;            
 	}

From 9392ccec22b80802238c06f480a430ef40cd220c Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 9 Jan 2017 19:27:27 +0100
Subject: [PATCH 03/47] fix error handling and ID output length

---
 apps/octonet/ddtest.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/apps/octonet/ddtest.c b/apps/octonet/ddtest.c
index f5bbb1b..221ff90 100644
--- a/apps/octonet/ddtest.c
+++ b/apps/octonet/ddtest.c
@@ -1310,10 +1310,10 @@ int read_id(int dev, int argc, char* argv[], uint32_t Flags)
 		break;
         default:
 		printf("Unsupported Flash\n");
-		break;
+		return -1;
 	}
 	printf("ID: ");
-	for (i = 0; i < 8; i++)
+	for (i = 0; i < len; i++)
 		printf("%02x ", Id[i]);
 	printf("\n");
 

From d069dc051f9a67dfc0474d7ce12b13d51e6c576a Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 9 Jan 2017 19:28:26 +0100
Subject: [PATCH 04/47] basic support for SDR card

---
 ddbridge/ddbridge-core.c | 12 ++++++++++-
 ddbridge/ddbridge-mod.c  | 43 ++++++++++++++++++++++++++++------------
 ddbridge/ddbridge.c      | 20 +++++++++++++++++++
 3 files changed, 61 insertions(+), 14 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index 3a457e3..51bc255 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -299,6 +299,16 @@ static struct ddb_regmap octopus_mod_2_map = {
 	.channel = &octopus_mod_2_channel,
 };
 
+static struct ddb_regmap octopus_sdr_map = {
+	.irq_version = 2,
+	.irq_base_odma = 64,
+	.irq_base_rate = 32,
+	.output = &octopus_output,
+	.odma = &octopus_mod_2_odma,
+	.odma_buf = &octopus_mod_2_odma_buf,
+	.channel = &octopus_mod_2_channel,
+};
+
 
 /****************************************************************************/
 
@@ -4459,7 +4469,7 @@ static ssize_t temp_show(struct device *device,
 	u8 tmp[2];
 	
 	if (dev->link[0].info->type == DDB_MOD) {
-		if (dev->link[0].info->version == 2) {
+		if (dev->link[0].info->version >= 2) {
 			temp = 0xffff & ddbreadl(dev, TEMPMON2_BOARD);
 			temp = (temp * 1000) >> 8;
 
diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index c58cb9c..ef3fdcf 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -171,10 +171,10 @@ void ddbridge_mod_output_stop(struct ddb_output *output)
 	struct ddb_mod *mod = &dev->mod[output->nr];
 
 	mod->State = CM_IDLE;
-	mod->Control = 0;
+	mod->Control &= 0xfffffff0;
 	if (dev->link[0].info->version == 2)
 		mod_SendChannelCommand(dev, output->nr, CHANNEL_CONTROL_CMD_FREE);
-	ddbwritel(dev, 0, CHANNEL_CONTROL(output->nr));
+	ddbwritel(dev, mod->Control, CHANNEL_CONTROL(output->nr));
 #if 0
 	udelay(10);
 	ddbwritel(dev, CHANNEL_CONTROL_RESET, CHANNEL_CONTROL(output->nr));
@@ -308,7 +308,8 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 	u32 Channel = output->nr;
 	struct ddb_mod *mod = &dev->mod[output->nr];
 	u32 Symbolrate = mod->symbolrate;
-
+	u32 ctrl;
+	
 	mod_calc_rateinc(mod);
 	/*PCRIncrement = RoundPCR(PCRIncrement);*/
 	/*PCRDecrement = RoundPCR(PCRDecrement);*/
@@ -328,12 +329,16 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 
 	mod->State = CM_STARTUP;
 	mod->StateCounter = CM_STARTUP_DELAY;
-
-	ddbwritel(dev, 0, CHANNEL_CONTROL(output->nr));
+	
+	if (dev->link[0].info->version == 3)
+		mod->Control = 0xfffffff0 & ddbreadl(dev, CHANNEL_CONTROL(output->nr));
+	else
+		mod->Control = 0;
+	ddbwritel(dev, mod->Control, CHANNEL_CONTROL(output->nr));
 	udelay(10);
-	ddbwritel(dev, CHANNEL_CONTROL_RESET, CHANNEL_CONTROL(output->nr));
+	ddbwritel(dev, mod->Control | CHANNEL_CONTROL_RESET, CHANNEL_CONTROL(output->nr));
 	udelay(10);
-	ddbwritel(dev, 0, CHANNEL_CONTROL(output->nr));
+	ddbwritel(dev, mod->Control, CHANNEL_CONTROL(output->nr));
 
 	pr_info("DDBridge: CHANNEL_BASE = %08x\n", CHANNEL_BASE);
 	pr_info("DDBridge: CHANNEL_CONTROL = %08x\n", CHANNEL_CONTROL(Channel));
@@ -368,23 +373,25 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 		
 		if (mod_SendChannelCommand(dev, Channel, CHANNEL_CONTROL_CMD_SETUP))
 			return -EINVAL;
-		mod->Control = CHANNEL_CONTROL_ENABLE_DVB;
+		mod->Control |= CHANNEL_CONTROL_ENABLE_DVB;
 	} else {
 		/* QAM: 600 601 602 903 604 = 16 32 64 128 256 */
 		/* ddbwritel(dev, 0x604, CHANNEL_SETTINGS(output->nr)); */
 		ddbwritel(dev, qamtab[mod->modulation], CHANNEL_SETTINGS(output->nr));
-		mod->Control = (CHANNEL_CONTROL_ENABLE_IQ | CHANNEL_CONTROL_ENABLE_DVB);
+		mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ | CHANNEL_CONTROL_ENABLE_DVB);
+	}
+	if (dev->link[0].info->version < 3) {
+		mod_set_rateinc(dev, output->nr);
+		mod_set_incs(output);
 	}
-	mod_set_rateinc(dev, output->nr);
-	mod_set_incs(output);
-
 	mod->Control |= CHANNEL_CONTROL_ENABLE_SOURCE;
 
 	ddbwritel(dev, mod->Control, CHANNEL_CONTROL(output->nr));
 	if (dev->link[0].info->version == 2)
 		if (mod_SendChannelCommand(dev, Channel, CHANNEL_CONTROL_CMD_UNMUTE))
 			return -EINVAL;
-	pr_info("DDBridge: mod_output_start %d.%d\n", dev->nr, output->nr);
+	pr_info("DDBridge: mod_output_start %d.%d ctrl=%08x\n",
+		dev->nr, output->nr, mod->Control);
 	return 0;
 }
 
@@ -1607,11 +1614,21 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
 	return 0;
 }
 
+static int mod_init_3(struct ddb *dev, u32 Frequency)
+{
+	int status, i;
+
+	printk("%s\n", __func__);
+	return 0;
+}
+
 int ddbridge_mod_init(struct ddb *dev)
 {
 	if (dev->link[0].info->version <= 1)
 		return mod_init_1(dev, 722000000);
 	if (dev->link[0].info->version == 2)
 		return mod_init_2(dev, 114000000);
+	if (dev->link[0].info->version == 3)
+		return mod_init_3(dev, 114000000);
 	return -1;
 }
diff --git a/ddbridge/ddbridge.c b/ddbridge/ddbridge.c
index 704f84c..23616ae 100644
--- a/ddbridge/ddbridge.c
+++ b/ddbridge/ddbridge.c
@@ -498,6 +498,16 @@ static struct ddb_info ddb_mod_fsm_8 = {
 	.tempmon_irq = 8,
 };
 
+static struct ddb_info ddb_sdr = {
+	.type     = DDB_MOD,
+	.name     = "Digital Devices SDR",
+	.version  = 3,
+	.regmap   = &octopus_sdr_map,
+	.port_num = 10,
+	.temp_num = 1,
+	.tempmon_irq = 8,
+};
+
 static struct ddb_info ddb_octopro_hdin = {
 	.type     = DDB_OCTOPRO_HDIN,
 	.name     = "Digital Devices OctopusNet Pro HDIN",
@@ -560,6 +570,7 @@ static const struct pci_device_id ddb_id_tbl[] __devinitconst = {
 	DDB_ID(DDVID, 0x0210, DDVID, 0x0001, ddb_mod_fsm_24),
 	DDB_ID(DDVID, 0x0210, DDVID, 0x0002, ddb_mod_fsm_16),
 	DDB_ID(DDVID, 0x0210, DDVID, 0x0003, ddb_mod_fsm_8),
+	DDB_ID(DDVID, 0x0220, DDVID, 0x0001, ddb_sdr),
 	/* testing on OctopusNet Pro */
 	DDB_ID(DDVID, 0x0320, PCI_ANY_ID, PCI_ANY_ID, ddb_octopro_hdin),
 	DDB_ID(DDVID, 0x0321, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
@@ -574,9 +585,18 @@ static const struct pci_device_id ddb_id_tbl[] __devinitconst = {
 	DDB_ID(DDVID, 0x0007, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
 	DDB_ID(DDVID, 0x0008, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
 	DDB_ID(DDVID, 0x0011, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_ID(DDVID, 0x0012, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
 	DDB_ID(DDVID, 0x0013, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
 	DDB_ID(DDVID, 0x0201, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_ID(DDVID, 0x0203, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_ID(DDVID, 0x0210, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_ID(DDVID, 0x0220, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
 	DDB_ID(DDVID, 0x0320, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_ID(DDVID, 0x0321, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_ID(DDVID, 0x0322, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_ID(DDVID, 0x0323, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_ID(DDVID, 0x0328, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_ID(DDVID, 0x0329, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
 	{0}
 };
 MODULE_DEVICE_TABLE(pci, ddb_id_tbl);

From f6c7586815b716b701d209d4be8d6332fe763d9b Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Thu, 19 Jan 2017 16:37:50 +0100
Subject: [PATCH 05/47] fix wrong qam register access for SDR cad

---
 ddbridge/ddbridge-core.c | 5 ++---
 ddbridge/ddbridge-mod.c  | 6 ++++--
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index 51bc255..071ab7d 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -5254,13 +5254,13 @@ static void tempmon_setfan(struct ddb_link *link)
 			pwm -= 1;
 	}
 	ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
- }
+}
 
 
 static void temp_handler(unsigned long data)
 {
 	struct ddb_link *link = (struct ddb_link *) data;
-
+	
 	spin_lock(&link->temp_lock);
 	tempmon_setfan(link);
 	spin_unlock(&link->temp_lock);
@@ -5308,7 +5308,6 @@ static int ddb_init_tempmon(struct ddb_link *link)
 		if (link->ids.regmapid < 0x00010002)
 			return;
 	spin_lock_init(&link->temp_lock);
-	printk("init_tempmon\n");
 	tempmon_init(link, 1);
 }
 
diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index ef3fdcf..141a046 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -374,11 +374,13 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 		if (mod_SendChannelCommand(dev, Channel, CHANNEL_CONTROL_CMD_SETUP))
 			return -EINVAL;
 		mod->Control |= CHANNEL_CONTROL_ENABLE_DVB;
-	} else {
+	} else 	if (dev->link[0].info->version == 1) {
 		/* QAM: 600 601 602 903 604 = 16 32 64 128 256 */
 		/* ddbwritel(dev, 0x604, CHANNEL_SETTINGS(output->nr)); */
 		ddbwritel(dev, qamtab[mod->modulation], CHANNEL_SETTINGS(output->nr));
 		mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ | CHANNEL_CONTROL_ENABLE_DVB);
+	} else if (dev->link[0].info->version == 3) {
+		mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ | CHANNEL_CONTROL_ENABLE_DVB);
 	}
 	if (dev->link[0].info->version < 3) {
 		mod_set_rateinc(dev, output->nr);
@@ -1618,7 +1620,7 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 {
 	int status, i;
 
-	printk("%s\n", __func__);
+	//printk("%s\n", __func__);
 	return 0;
 }
 

From 28a2aaa653c7ab4f11667b80df00b7361aa6b128 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Sun, 22 Jan 2017 02:05:44 +0100
Subject: [PATCH 06/47] improved PLL setup for modulator

---
 ddbridge/ddbridge-mod.c | 70 ++++++++++++++++++++++++++++++++++-------
 1 file changed, 59 insertions(+), 11 deletions(-)

diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index 141a046..fbaff91 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -310,9 +310,8 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 	u32 Symbolrate = mod->symbolrate;
 	u32 ctrl;
 	
-	mod_calc_rateinc(mod);
-	/*PCRIncrement = RoundPCR(PCRIncrement);*/
-	/*PCRDecrement = RoundPCR(PCRDecrement);*/
+	if (dev->link[0].info->version < 3)
+		mod_calc_rateinc(mod);
 
 	mod->LastInPacketCount = 0;
 	mod->LastOutPacketCount = 0;
@@ -415,12 +414,55 @@ static int mod_write_max2871(struct ddb *dev, u32 val)
 	return 0;
 }
 
+static u8 max2871_fsm[6] = {
+	0x00730040, 0x600080A1, 0x510061C2, 0x010000CB, 0x6199003C, 0x60440005,
+};
+
+static u8 max2871_sdr[6] = {
+	0x007A8098, 0x600080C9, 0x510061C2, 0x010000CB, 0x6199003C, 0x60440005
+};
+
+static int mod_setup_max2871_2(struct ddb *dev, u8 *reg)
+{
+	int status = 0;
+	int i, j;
+	u32 val;
+	
+	ddbwritel(dev, MAX2871_CONTROL_CE, MAX2871_CONTROL);
+	msleep(30);
+	for (i = 0; i < 2; i++) {
+		for (j = 5; j >= 0; j--) {
+			val = reg[j];
+			
+			if (j ==4)
+				val &= 0xFFFFFEDF;
+			status = mod_write_max2871(dev, reg[j]);
+			if (status)
+				break;
+			msleep(30);
+		}
+	}
+	if (status == 0) {
+		u32 ControlReg;
+
+		if (reg[3] & (1 << 24))
+			msleep(100);
+		ControlReg = ddbreadl(dev, MAX2871_CONTROL);
+
+		if ((ControlReg & MAX2871_CONTROL_LOCK) == 0)
+			status = -EIO;
+		status = mod_write_max2871(dev, reg[4]);
+	}
+	return status;
+}
+
 static int mod_setup_max2871(struct ddb *dev)
 {
 	int status = 0;
 	int i;
 	
 	ddbwritel(dev, MAX2871_CONTROL_CE, MAX2871_CONTROL);
+	msleep(30);
 	for (i = 0; i < 2; i++) {
 		status = mod_write_max2871(dev, 0x00440005);
 		if (status)
@@ -441,11 +483,11 @@ static int mod_setup_max2871(struct ddb *dev)
 		if (status)
 			break;
 		msleep(30);
-	} while(0);
+	}
 
 	if (status == 0) {
 		u32 ControlReg = ddbreadl(dev, MAX2871_CONTROL);
-		
+
 		if ((ControlReg & MAX2871_CONTROL_LOCK) == 0)
 			status = -EIO;
 	}
@@ -461,7 +503,7 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan, u32 MaxUsedChannels
 	u32 tmp = ddbreadl(dev, FSM_STATUS);
 	
 	if ((tmp & FSM_STATUS_READY) == 0) {
-		status = mod_setup_max2871(dev);
+		status = mod_setup_max2871_2(dev, max2871_fsm);
 		if (status)
 			return status;
 		ddbwritel(dev, FSM_CMD_RESET, FSM_CONTROL);
@@ -1484,8 +1526,6 @@ void ddbridge_mod_rate_handler(unsigned long data)
 
 static int mod_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
 {
-	struct ddb *dev = mod->port->dev;
-
 	switch(tvp->cmd) {
 	case MODULATOR_SYMBOL_RATE:
 		return mod_set_symbolrate(mod, tvp->u.data);
@@ -1597,6 +1637,11 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
 	dev->mod_base.frequency = Frequency;
 	status = mod_fsm_setup(dev, 0, 0);
 
+	if (status) {
+		pr_err("FSM setup failed!\n");
+		return -1;
+	}
+	
 	for (i = 0; i < streams; i++) {
 		struct ddb_mod *mod = &dev->mod[i];
 
@@ -1618,10 +1663,13 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
 
 static int mod_init_3(struct ddb *dev, u32 Frequency)
 {
-	int status, i;
+	int status, i, ret = 0;
 
-	//printk("%s\n", __func__);
-	return 0;
+	mod_set_vga(dev, 64);
+	ret = mod_setup_max2871_2(dev, max2871_sdr);
+	if (ret)
+		pr_err("DDBridge: PLL setup failed\n");
+	return ret;
 }
 
 int ddbridge_mod_init(struct ddb *dev)

From 1a80437b9863175358267fcf4167882e01a6e8ba Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Sun, 22 Jan 2017 13:43:53 +0100
Subject: [PATCH 07/47] use correct type u32 for pll init table

---
 ddbridge/ddbridge-mod.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index fbaff91..799c8a5 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -414,15 +414,15 @@ static int mod_write_max2871(struct ddb *dev, u32 val)
 	return 0;
 }
 
-static u8 max2871_fsm[6] = {
+static u32 max2871_fsm[6] = {
 	0x00730040, 0x600080A1, 0x510061C2, 0x010000CB, 0x6199003C, 0x60440005,
 };
 
-static u8 max2871_sdr[6] = {
+static u32 max2871_sdr[6] = {
 	0x007A8098, 0x600080C9, 0x510061C2, 0x010000CB, 0x6199003C, 0x60440005
 };
 
-static int mod_setup_max2871_2(struct ddb *dev, u8 *reg)
+static int mod_setup_max2871_2(struct ddb *dev, u32 *reg)
 {
 	int status = 0;
 	int i, j;

From 3a3a48654ee2e09f1b435020170a53f975b2c53e Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Wed, 1 Feb 2017 17:48:59 +0100
Subject: [PATCH 08/47] support cine s2 v7a

---
 ddbridge/ddbridge.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/ddbridge/ddbridge.c b/ddbridge/ddbridge.c
index 23616ae..805dd4d 100644
--- a/ddbridge/ddbridge.c
+++ b/ddbridge/ddbridge.c
@@ -395,6 +395,17 @@ static struct ddb_info ddb_v6_5 = {
 	.i2c_mask = 0x0f,
 };
 
+static struct ddb_info ddb_v7a = {
+	.type     = DDB_OCTOPUS,
+	.name     = "Digital Devices Cine S2 V7A DVB adapter",
+	.regmap   = &octopus_map,
+	.port_num = 4,
+	.i2c_mask = 0x0f,
+	.board_control   = 2,
+	.board_control_2 = 4,
+	.ts_quirks = TS_QUIRK_REVERSED,
+};
+
 static struct ddb_info ddb_v7 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine S2 V7 DVB adapter",
@@ -548,6 +559,7 @@ static const struct pci_device_id ddb_id_tbl[] __devinitconst = {
 	DDB_ID(DDVID, 0x0003, DDVID, 0x0020, ddb_v6),
 	DDB_ID(DDVID, 0x0003, DDVID, 0x0021, ddb_v6_5),
 	DDB_ID(DDVID, 0x0006, DDVID, 0x0022, ddb_v7),
+	DDB_ID(DDVID, 0x0006, DDVID, 0x0024, ddb_v7a),
 	DDB_ID(DDVID, 0x0003, DDVID, 0x0030, ddb_dvbct),
 	DDB_ID(DDVID, 0x0003, DDVID, 0xdb03, ddb_satixS2v3),
 	DDB_ID(DDVID, 0x0006, DDVID, 0x0031, ddb_ctv7),

From 4bfdb11762aa9f3344d66b5149da2430f4279b1c Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 6 Feb 2017 13:25:57 +0100
Subject: [PATCH 09/47] add id for pro advanced

---
 ddbridge/ddbridge.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge.c b/ddbridge/ddbridge.c
index 805dd4d..033b389 100644
--- a/ddbridge/ddbridge.c
+++ b/ddbridge/ddbridge.c
@@ -397,7 +397,7 @@ static struct ddb_info ddb_v6_5 = {
 
 static struct ddb_info ddb_v7a = {
 	.type     = DDB_OCTOPUS,
-	.name     = "Digital Devices Cine S2 V7A DVB adapter",
+	.name     = "Digital Devices Cine S2 V7 Advanced DVB adapter",
 	.regmap   = &octopus_map,
 	.port_num = 4,
 	.i2c_mask = 0x0f,
@@ -461,6 +461,16 @@ static struct ddb_info ddb_ci_s2_pro = {
 	.board_control_2 = 4,
 };
 
+static struct ddb_info ddb_ci_s2_pro_a = {
+	.type     = DDB_OCTOPUS_CI,
+	.name     = "Digital Devices Octopus CI S2 Pro Advanced",
+	.regmap   = &octopus_map,
+	.port_num = 4,
+	.i2c_mask = 0x01,
+	.board_control   = 2,
+	.board_control_2 = 4,
+};
+
 static struct ddb_info ddb_dvbct = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices DVBCT V6.1 DVB adapter",
@@ -576,6 +586,7 @@ static const struct pci_device_id ddb_id_tbl[] __devinitconst = {
 	DDB_ID(DDVID, 0x0011, DDVID, 0x0041, ddb_cis),
 	DDB_ID(DDVID, 0x0012, DDVID, 0x0042, ddb_ci),
 	DDB_ID(DDVID, 0x0013, DDVID, 0x0043, ddb_ci_s2_pro),
+	DDB_ID(DDVID, 0x0013, DDVID, 0x0044, ddb_ci_s2_pro_a),
 	DDB_ID(DDVID, 0x0201, DDVID, 0x0001, ddb_mod),
 	DDB_ID(DDVID, 0x0201, DDVID, 0x0002, ddb_mod),
 	DDB_ID(DDVID, 0x0203, DDVID, 0x0001, ddb_mod),

From 1984377f72598092e313eeafb84758d3a40c23ef Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Thu, 9 Feb 2017 10:12:33 +0100
Subject: [PATCH 10/47] remove debug message

---
 apps/octonet/ddflash.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/apps/octonet/ddflash.c b/apps/octonet/ddflash.c
index 644d441..ad9d058 100644
--- a/apps/octonet/ddflash.c
+++ b/apps/octonet/ddflash.c
@@ -426,7 +426,7 @@ static int flash_detect(struct ddflash *ddf)
 	}
 	if (ddf->sector_size) {
 		ddf->buffer = malloc(ddf->sector_size);
-		printf("allocated buffer %08x@%08x\n", ddf->sector_size, (uint32_t) ddf->buffer);
+		//printf("allocated buffer %08x@%08x\n", ddf->sector_size, (uint32_t) ddf->buffer);
 		if (!ddf->buffer)
 			return -1;
 	}

From 532afaa97c739efb8e88864926cb02619ce1d0c5 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Thu, 9 Feb 2017 10:12:43 +0100
Subject: [PATCH 11/47] changes for latest SDR card devel version

---
 ddbridge/ddbridge-core.c | 30 ++++++++--------
 ddbridge/ddbridge-mod.c  | 61 +++++---------------------------
 ddbridge/ddbridge-regs.h | 76 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 101 insertions(+), 66 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index 071ab7d..50200da 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -122,6 +122,12 @@ static struct ddb_regset octopus_mod_2_channel = {
 	.size = 0x40,
 };
 
+static struct ddb_regset octopus_sdr_output = {
+	.base = 0x240,
+	.num  = 0x14,
+	.size = 0x10,
+};
+
 /****************************************************************************/
 
 static struct ddb_regset octopus_input = {
@@ -303,7 +309,7 @@ static struct ddb_regmap octopus_sdr_map = {
 	.irq_version = 2,
 	.irq_base_odma = 64,
 	.irq_base_rate = 32,
-	.output = &octopus_output,
+	.output = &octopus_sdr_output,
 	.odma = &octopus_mod_2_odma,
 	.odma_buf = &octopus_mod_2_odma_buf,
 	.channel = &octopus_mod_2_channel,
@@ -734,6 +740,7 @@ static void ddb_output_start(struct ddb_output *output)
 	struct ddb *dev = output->port->dev;
 	u32 con = 0x11c, con2 = 0;
 
+	printk("Channel Base = %08x\n", output->regs);
 	if (output->dma) {
 		spin_lock_irq(&output->dma->lock);
 		output->dma->cbuf = 0;
@@ -4468,8 +4475,8 @@ static ssize_t temp_show(struct device *device,
 	int i;
 	u8 tmp[2];
 	
-	if (dev->link[0].info->type == DDB_MOD) {
-		if (dev->link[0].info->version >= 2) {
+	if (link->info->type == DDB_MOD) {
+		if (link->info->version >= 2) {
 			temp = 0xffff & ddbreadl(dev, TEMPMON2_BOARD);
 			temp = (temp * 1000) >> 8;
 
@@ -4498,14 +4505,14 @@ static ssize_t temp_show(struct device *device,
 		}
 		return sprintf(buf, "%d %d\n", temp, temp2);
 	}
-	if (!dev->link[0].info->temp_num)
+	if (!link->info->temp_num)
 		return sprintf(buf, "no sensor\n");
-	adap = &dev->i2c[dev->link[0].info->temp_bus].adap;
+	adap = &dev->i2c[link->info->temp_bus].adap;
 	if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0)
 		return sprintf(buf, "read_error\n");
 	temp = (tmp[0] << 3) | (tmp[1] >> 5);
 	temp *= 125;
-	if (dev->link[0].info->temp_num == 2) {
+	if (link->info->temp_num == 2) {
 		if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0)
 			return sprintf(buf, "read_error\n");
 		temp2 = (tmp[0] << 3) | (tmp[1] >> 5);
@@ -5298,17 +5305,16 @@ static int tempmon_init(struct ddb_link *link, int FirstTime)
 
 static int ddb_init_tempmon(struct ddb_link *link)
 {
-	struct ddb *dev = link->dev;
 	struct ddb_info *info = link->info;
 	
 	if (!info->tempmon_irq)
-		return;
+		return 0;
 	if (info->type == DDB_OCTOPUS_MAX ||
 	     info->type == DDB_OCTOPUS_MAX_CT)
 		if (link->ids.regmapid < 0x00010002)
-			return;
+			return 0;
 	spin_lock_init(&link->temp_lock);
-	tempmon_init(link, 1);
+	return tempmon_init(link, 1);
 }
 
 /****************************************************************************/
@@ -5373,12 +5379,8 @@ static int ddb_init(struct ddb *dev)
 		pr_info("DDBridge: Could not allocate buffer memory\n");
 		goto fail2;
 	}
-#if 0
 	if (ddb_ports_attach(dev) < 0)
 		goto fail3;
-#else
-	ddb_ports_attach(dev);
-#endif
 	ddb_nsd_attach(dev);
 
 	ddb_device_create(dev);
diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index 799c8a5..b12c20f 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -237,7 +237,6 @@ static void mod_calc_rateinc(struct ddb_mod *mod)
 
 static int mod_calc_obitrate(struct ddb_mod *mod)
 {
-	struct ddb *dev = mod->port->dev;
 	u64 ofac; 
 
 	ofac = (((u64) mod->symbolrate) << 32) * 188;
@@ -249,7 +248,6 @@ static int mod_calc_obitrate(struct ddb_mod *mod)
 static int mod_set_symbolrate(struct ddb_mod *mod, u32 srate)
 {
 	struct ddb *dev = mod->port->dev;
-	u64 ofac; 
 
 	if (dev->link[0].info->version < 2) {
 		if (srate != 6900000)
@@ -268,7 +266,6 @@ static u32 qamtab[6] = { 0x000, 0x600, 0x601, 0x602, 0x903, 0x604 };
 static int mod_set_modulation(struct ddb_mod *mod, enum fe_modulation modulation)
 {
 	struct ddb *dev = mod->port->dev;
-	u64 ofac; 
 
 	if (modulation > QAM_256 || modulation < QAM_16)
 		return -EINVAL;
@@ -308,8 +305,7 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 	u32 Channel = output->nr;
 	struct ddb_mod *mod = &dev->mod[output->nr];
 	u32 Symbolrate = mod->symbolrate;
-	u32 ctrl;
-	
+
 	if (dev->link[0].info->version < 3)
 		mod_calc_rateinc(mod);
 
@@ -339,8 +335,8 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 	udelay(10);
 	ddbwritel(dev, mod->Control, CHANNEL_CONTROL(output->nr));
 
-	pr_info("DDBridge: CHANNEL_BASE = %08x\n", CHANNEL_BASE);
-	pr_info("DDBridge: CHANNEL_CONTROL = %08x\n", CHANNEL_CONTROL(Channel));
+	//pr_info("DDBridge: CHANNEL_BASE = %08x\n", CHANNEL_BASE);
+	///pr_info("DDBridge: CHANNEL_CONTROL = %08x\n", CHANNEL_CONTROL(Channel));
 	if (dev->link[0].info->version == 2) {
 		//u32 Output = ((dev->mod_base.frequency - 114000000)/8000000 + Channel) % 96;
 		u32 Output = (mod->frequency - 114000000) / 8000000;
@@ -422,7 +418,7 @@ static u32 max2871_sdr[6] = {
 	0x007A8098, 0x600080C9, 0x510061C2, 0x010000CB, 0x6199003C, 0x60440005
 };
 
-static int mod_setup_max2871_2(struct ddb *dev, u32 *reg)
+static int mod_setup_max2871(struct ddb *dev, u32 *reg)
 {
 	int status = 0;
 	int i, j;
@@ -456,46 +452,6 @@ static int mod_setup_max2871_2(struct ddb *dev, u32 *reg)
 	return status;
 }
 
-static int mod_setup_max2871(struct ddb *dev)
-{
-	int status = 0;
-	int i;
-	
-	ddbwritel(dev, MAX2871_CONTROL_CE, MAX2871_CONTROL);
-	msleep(30);
-	for (i = 0; i < 2; i++) {
-		status = mod_write_max2871(dev, 0x00440005);
-		if (status)
-			break;
-		status = mod_write_max2871(dev, 0x6199003C);
-		if (status)
-			break;
-		status = mod_write_max2871(dev, 0x000000CB);
-		if (status)
-			break;
-		status = mod_write_max2871(dev, 0x510061C2);
-		if (status)
-			break;
-		status = mod_write_max2871(dev, 0x600080A1);
-		if (status)
-			break;
-		status = mod_write_max2871(dev, 0x00730040);
-		if (status)
-			break;
-		msleep(30);
-	}
-
-	if (status == 0) {
-		u32 ControlReg = ddbreadl(dev, MAX2871_CONTROL);
-
-		if ((ControlReg & MAX2871_CONTROL_LOCK) == 0)
-			status = -EIO;
-	}
-
-	return status;
-}
-
-
 static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan, u32 MaxUsedChannels)
 {
 	int status = 0;
@@ -503,7 +459,7 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan, u32 MaxUsedChannels
 	u32 tmp = ddbreadl(dev, FSM_STATUS);
 	
 	if ((tmp & FSM_STATUS_READY) == 0) {
-		status = mod_setup_max2871_2(dev, max2871_fsm);
+		status = mod_setup_max2871(dev, max2871_fsm);
 		if (status)
 			return status;
 		ddbwritel(dev, FSM_CMD_RESET, FSM_CONTROL);
@@ -557,12 +513,13 @@ static int mod_set_vga(struct ddb *dev, u32 Gain)
 	return 0;
 }
 
+#if 0
 static int mod_get_vga(struct ddb *dev, u32 *pGain)
 {
 	*pGain = ddbreadl(dev, RF_VGA);
 	return 0;
 }
-#if 0
+
 static void TemperatureMonitorSetFan(struct ddb *dev)
 {
 	u32 tqam, pwm;
@@ -1663,10 +1620,10 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
 
 static int mod_init_3(struct ddb *dev, u32 Frequency)
 {
-	int status, i, ret = 0;
+	int ret = 0;
 
 	mod_set_vga(dev, 64);
-	ret = mod_setup_max2871_2(dev, max2871_sdr);
+	ret = mod_setup_max2871(dev, max2871_sdr);
 	if (ret)
 		pr_err("DDBridge: PLL setup failed\n");
 	return ret;
diff --git a/ddbridge/ddbridge-regs.h b/ddbridge/ddbridge-regs.h
index 22ba6f3..8840af1 100644
--- a/ddbridge/ddbridge-regs.h
+++ b/ddbridge/ddbridge-regs.h
@@ -25,6 +25,7 @@
 
 #define CUR_REGISTERMAP_VERSION_V1  0x00010001
 #define CUR_REGISTERMAP_VERSION_V2  0x00020000
+#define CUR_REGISTERMAP_VERSION_022X  0x00020001
 
 #define HARDWARE_VERSION            0x00000000
 #define REGISTERMAP_VERSION         0x00000004
@@ -179,6 +180,7 @@
 #define TEMPMON2_BOARD      (TEMPMON_SENSOR0)    // SHORT Temperature in °C x 256 (ADM1032 int)
 #define TEMPMON2_FPGACORE   (TEMPMON_SENSOR1)    // SHORT Temperature in °C x 256 (ADM1032 ext)
 #define TEMPMON2_QAMCORE    (TEMPMON_SENSOR2)    // SHORT Temperature in °C x 256 (ADM1032 ext)
+#define TEMPMON2_DACCORE    (TEMPMON_SENSOR2)    // SHORT Temperature in °C x 256 (ADM1032 ext)
 
 /* ------------------------------------------------------------------------- */
 /* I2C Master Controller */
@@ -552,3 +554,77 @@
 
 
 
+// V2
+
+// MAX2871 same as DVB Modulator V2
+
+#define RFDAC_BASE                (0x200)
+#define RFDAC_CONTROL             (RFDAC_BASE + 0x00)
+
+#define RFDAC_CMD_MASK            (0x00000087)
+#define RFDAC_CMD_STATUS          (0x00000080)
+#define RFDAC_CMD_RESET           (0x00000080)
+#define RFDAC_CMD_POWERDOWN       (0x00000081)
+#define RFDAC_CMD_SETUP           (0x00000082)
+
+#define RFDAC_STATUS              (RFDAC_BASE + 0x00)
+#define RFDAC_STATUS_READY        (0x00010000)
+#define RFDAC_STATUS_DACREADY     (0x00020000)
+
+#define RFDAC_FCW                 (RFDAC_BASE + 0x10)
+
+//
+// --------------------------------------------------------------------------
+//
+
+#define JESD204B_BASE             (0x280)
+
+// Additional Status Bits
+
+#define DMA_PCIE_LANES_MASK       ( 0x00070000 )
+
+
+// --------------------------------------------------------------------------
+// Modulator Channels, partially compatible to DVB Modulator V1
+
+#define SDR_CHANNEL_BASE            (0x800)
+
+#define SDR_CHANNEL_CONTROL(i)      ((SDR_CHANNEL_BASE) + (i) * 64 + 0x00)
+#define SDR_CHANNEL_CONFIG(i)       ((SDR_CHANNEL_BASE) + (i) * 64 + 0x04)
+#define SDR_CHANNEL_CFCW(i)         ((SDR_CHANNEL_BASE) + (i) * 64 + 0x08)
+#define SDR_CHANNEL_ARICW(i)        ((SDR_CHANNEL_BASE) + (i) * 64 + 0x0C)
+#define SDR_CHANNEL_RGAIN(i)        ((SDR_CHANNEL_BASE) + (i) * 64 + 0x10)
+#define SDR_CHANNEL_SETFIR(i)       ((SDR_CHANNEL_BASE) + (i) * 64 + 0x14)
+
+#define SDR_CHANNEL_FMDCW(i)        ((SDR_CHANNEL_BASE) + (i) * 64 + 0x20)
+#define SDR_CHANNEL_FM1FCW(i)       ((SDR_CHANNEL_BASE) + (i) * 64 + 0x24)
+#define SDR_CHANNEL_FM2FCW(i)       ((SDR_CHANNEL_BASE) + (i) * 64 + 0x28)
+#define SDR_CHANNEL_FM1GAIN(i)      ((SDR_CHANNEL_BASE) + (i) * 64 + 0x2C)
+#define SDR_CHANNEL_FM2GAIN(i)      ((SDR_CHANNEL_BASE) + (i) * 64 + 0x30)
+
+// Control and status bits
+#define SDR_CONTROL_ENABLE_CHANNEL  (0x00000004)
+#define SDR_CONTROL_ENABLE_DMA      (0x00000008)
+#define SDR_STATUS_DMA_UNDERRUN     (0x00010000)
+
+// Config
+#define SDR_CONFIG_ENABLE_FM1       (0x00000002)
+#define SDR_CONFIG_ENABLE_FM2       (0x00000004)
+#define SDR_CONFIG_DISABLE_ARI      (0x00000010)
+#define SDR_CONFIG_DISABLE_VSB      (0x00000020)
+
+// SET FIR
+#define SDR_FIR_COEFF_MASK          (0x00000FFF)
+#define SDR_FIR_TAP_MASK            (0x001F0000)
+#define SDR_FIR_SELECT_MASK         (0x00C00000)
+#define SDR_VSB_LENGTH_MASK         (0x01000000)
+
+#define SDR_SET_FIR(select,tap,coeff,vsblen)	\
+	(\ 
+(((select)<<22)&SDR_FIR_SELECT_MASK)|					\
+(((tap)<<16)&SDR_FIR_TAP_MASK)|						\
+((coeff)&SDR_FIR_COEFF_MASK)|						\
+(((vsblen)<<24)&SDR_VSB_LENGTH_MASK)|					\
+0									\
+)
+

From d51a9db022f4c8645d33642c3187f5fac6afbfea Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Tue, 21 Feb 2017 17:12:35 +0100
Subject: [PATCH 12/47] increase buffer for SDR more SDR card init in driver

---
 ddbridge/ddbridge-core.c |  19 ++++--
 ddbridge/ddbridge-mod.c  | 139 ++++++++++++++++++++++++++++++++++++++-
 ddbridge/ddbridge-regs.h |  13 ++--
 ddbridge/ddbridge.c      |  18 ++++-
 ddbridge/ddbridge.h      |   8 ++-
 5 files changed, 178 insertions(+), 19 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index 50200da..29a5993 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -407,7 +407,7 @@ static void ddb_set_dma_table(struct ddb_io *io)
 		ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8);
 		ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4);
 	}
-	dma->bufval = (dma->div << 16) |
+	dma->bufval = ((dma->div & 0x0f) << 16) |
 		((dma->num & 0x1f) << 11) |
 		((dma->size >> 7) & 0x7ff);
 }
@@ -3330,7 +3330,7 @@ static void ddb_dma_init(struct ddb_io *io, int nr, int out)
 {
 	struct ddb_dma *dma;
 	struct ddb_regmap *rm = io_regmap(io, 0);
-
+	
 	dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr];
 	io->dma = dma;
 	dma->io = io;
@@ -3339,9 +3339,16 @@ static void ddb_dma_init(struct ddb_io *io, int nr, int out)
 	if (out) {
 		dma->regs = rm->odma->base + rm->odma->size * nr;
 		dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr;
-		dma->num = OUTPUT_DMA_BUFS;
-		dma->size = OUTPUT_DMA_SIZE;
-		dma->div = OUTPUT_DMA_IRQ_DIV;
+		if (io->port->dev->link[0].info->type == DDB_MOD &&
+		    io->port->dev->link[0].info->version == 3) {
+			dma->num = OUTPUT_DMA_BUFS_SDR;
+			dma->size = OUTPUT_DMA_SIZE_SDR;
+			dma->div = OUTPUT_DMA_IRQ_DIV_SDR;
+		} else {
+			dma->num = OUTPUT_DMA_BUFS;
+			dma->size = OUTPUT_DMA_SIZE;
+			dma->div = OUTPUT_DMA_IRQ_DIV;
+		}
 	} else {
 #ifdef DDB_USE_WORK
 		INIT_WORK(&dma->work, input_work);
@@ -4724,6 +4731,7 @@ static ssize_t redirect_store(struct device *device,
 	return count;
 }
 
+#if 0
 /* A L P I  AAAAAALLPPPPPPII */
 /* AAAAAAAA LLLLLLLL PPPPPPII */
 static ssize_t redirect2_show(struct device *device,
@@ -4747,6 +4755,7 @@ static ssize_t redirect2_store(struct device *device,
 	pr_info("DDBridge: redirect: %02x, %02x\n", i, p);
 	return count;
 }
+#endif
 
 static ssize_t gap_show(struct device *device,
 			struct device_attribute *attr, char *buf)
diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index b12c20f..1362c0d 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -271,7 +271,7 @@ static int mod_set_modulation(struct ddb_mod *mod, enum fe_modulation modulation
 		return -EINVAL;
 	mod->modulation = modulation;
 	if (dev->link[0].info->version < 2) 
-		ddbwritel(dev, qamtab[modulation], CHANNEL_SETTINGS(mod->nr));
+		ddbwritel(dev, qamtab[modulation], CHANNEL_SETTINGS(mod->port->nr));
 	mod_calc_obitrate(mod);
 	return 0;
 }
@@ -1618,14 +1618,149 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
 	return 0;
 }
 
+
+/****************************************************************************/
+
+static u32 vsb13500[64] = {
+	0x0000000E, 0x00010004, 0x00020003, 0x00030009,
+	0x0004FFFA, 0x00050002, 0x0006FFF8, 0x0007FFF0,
+	0x00080000, 0x0009FFEA, 0x000A0001, 0x000B0003,
+	0x000CFFF9, 0x000D0025,	0x000E0004, 0x000F001F,
+	0x00100023, 0x0011FFEE, 0x00120020, 0x0013FFD0,
+	0x0014FFD5, 0x0015FFED, 0x0016FF8B, 0x0017000B,
+	0x0018FFC8, 0x0019FFF1, 0x001A009E, 0x001BFFEF,
+	0x001C013B, 0x001D00CB, 0x001E0031, 0x001F05F6,
+
+	0x0040FFFF, 0x00410004, 0x0042FFF8, 0x0043FFFE,
+	0x0044FFFA, 0x0045FFF3, 0x00460003, 0x0047FFF4,
+	0x00480005, 0x0049000D, 0x004A0000, 0x004B0022,
+	0x004C0005, 0x004D000D, 0x004E0013, 0x004FFFDF,
+	0x00500007, 0x0051FFD4, 0x0052FFD2, 0x0053FFFD,
+	0x0054FFB7, 0x00550021, 0x00560009, 0x00570010,
+	0x00580097, 0x00590003, 0x005A009D, 0x005B004F,
+	0x005CFF89, 0x005D0097, 0x005EFD42, 0x005FFCBE
+};
+
+static u32 stage2[16] = {
+	0x0080FFFF, 0x00810000, 0x00820005, 0x00830000,
+	0x0084FFF0, 0x00850000, 0x00860029, 0x00870000,
+	0x0088FFA2, 0x0089FFFF, 0x008A00C9, 0x008B000C,
+	0x008CFE49, 0x008DFF9B, 0x008E04D4, 0x008F07FF
+};
+
+static void mod_set_sdr_table(struct ddb_mod *mod, u32 *tab, u32 len)
+{
+	struct ddb *dev = mod->port->dev;
+	u32 i;
+
+	for (i = 0; i < len; i++) 
+		ddbwritel(dev, tab[i], SDR_CHANNEL_SETFIR(mod->port->nr));
+}
+
+
+
+static int rfdac_init(struct ddb *dev)
+{
+	int i;
+	u32 tmp;
+	
+	ddbwritel(dev, RFDAC_CMD_POWERDOWN, RFDAC_CONTROL);
+	for (i = 0; i < 10; i++) {
+		msleep(10);
+		tmp = ddbreadl(dev, RFDAC_CONTROL);
+		if ((tmp & RFDAC_CMD_STATUS) == 0x00)
+			break;
+	}
+	if (tmp & 0x80)
+		return -1;
+	printk("sync %d:%08x\n", i, tmp);
+	ddbwritel(dev, RFDAC_CMD_RESET, RFDAC_CONTROL);
+	for (i = 0; i < 10; i++) {
+		msleep(10);
+		tmp = ddbreadl(dev, RFDAC_CONTROL);
+		if ((tmp & RFDAC_CMD_STATUS) == 0x00)
+			break;
+	}
+	if (tmp & 0x80)
+		return -1;
+	printk("sync %d:%08x\n", i, tmp);
+	ddbwritel(dev, RFDAC_CMD_SETUP, RFDAC_CONTROL);
+	for (i = 0; i < 10; i++) {
+		msleep(10);
+		tmp = ddbreadl(dev, RFDAC_CONTROL);
+		if ((tmp & RFDAC_CMD_STATUS) == 0x00)
+			break;
+	}
+	if (tmp & 0x80)
+		return -1;
+	printk("sync %d:%08x\n", i, tmp);
+ 	ddbwritel(dev, 0x01, JESD204B_BASE);
+	for (i = 0; i < 400; i++) {
+		msleep(10);
+		tmp = ddbreadl(dev, JESD204B_BASE);
+		if ((tmp & 0xc0000000) == 0xc0000000)
+			break;
+	}
+	printk("sync %d:%08x\n", i, tmp);
+	if ((tmp & 0xc0000000) != 0xc0000000)
+		return -1;
+	return 0;
+}
+
+static void mod_set_cfcw(struct ddb_mod *mod, int i)
+{
+	struct ddb *dev = mod->port->dev;
+	s32 freq = 182250000 + 7000000 * i;
+	s32 dcf = 188000000;
+	s64 tmp, srdac = 245760000;
+	u32 cfcw;
+	
+	tmp = ((s64) (freq - dcf)) << 32;
+	tmp = div64_s64(tmp, srdac);
+	cfcw = (u32) tmp;
+	printk("cfcw = %08x nr = %u\n", cfcw, mod->port->nr);
+	ddbwritel(dev, cfcw, SDR_CHANNEL_CFCW(mod->port->nr));
+}
+
+
 static int mod_init_3(struct ddb *dev, u32 Frequency)
 {
-	int ret = 0;
+	int streams = dev->link[0].info->port_num;
+	int i, ret = 0;
 
 	mod_set_vga(dev, 64);
 	ret = mod_setup_max2871(dev, max2871_sdr);
 	if (ret)
 		pr_err("DDBridge: PLL setup failed\n");
+	ret = rfdac_init(dev);
+	if (ret)
+		ret = rfdac_init(dev);
+	if (ret)
+		pr_err("DDBridge: RFDAC setup failed\n");
+ 	//ddbwritel(dev, 0x01, JESD204B_BASE);
+
+	for (i = 0; i < streams; i++) {
+		struct ddb_mod *mod = &dev->mod[i];
+		mod->port = &dev->port[i];
+		
+		mod_set_sdr_table(mod, vsb13500, 64);
+		mod_set_sdr_table(mod, stage2, 16);
+	}
+	ddbwritel(dev, 0x2000, 0x244);
+	ddbwritel(dev, 0x01, 0x240);
+	//msleep(500);
+	for (i = 0; i < streams; i++) {
+		struct ddb_mod *mod = &dev->mod[i];
+
+		ddbwritel(dev, 0x00, SDR_CHANNEL_CONTROL(i));
+		ddbwritel(dev, 0x06, SDR_CHANNEL_CONFIG(i));
+		ddbwritel(dev, 0x70800000, SDR_CHANNEL_ARICW(i));
+		mod_set_cfcw(mod, i);
+
+		ddbwritel(dev, 0x00011f80, SDR_CHANNEL_RGAIN(i));
+		ddbwritel(dev, 0x00001000, SDR_CHANNEL_FM1GAIN(i));
+		ddbwritel(dev, 0x00000800, SDR_CHANNEL_FM2GAIN(i));
+	}
 	return ret;
 }
 
diff --git a/ddbridge/ddbridge-regs.h b/ddbridge/ddbridge-regs.h
index 8840af1..71430d1 100644
--- a/ddbridge/ddbridge-regs.h
+++ b/ddbridge/ddbridge-regs.h
@@ -620,11 +620,10 @@
 #define SDR_VSB_LENGTH_MASK         (0x01000000)
 
 #define SDR_SET_FIR(select,tap,coeff,vsblen)	\
-	(\ 
-(((select)<<22)&SDR_FIR_SELECT_MASK)|					\
-(((tap)<<16)&SDR_FIR_TAP_MASK)|						\
-((coeff)&SDR_FIR_COEFF_MASK)|						\
-(((vsblen)<<24)&SDR_VSB_LENGTH_MASK)|					\
-0									\
-)
+	((((select)<<22)&SDR_FIR_SELECT_MASK)|			\
+	 (((tap)<<16)&SDR_FIR_TAP_MASK)|				\
+	 ((coeff)&SDR_FIR_COEFF_MASK)|					\
+	 (((vsblen)<<24)&SDR_VSB_LENGTH_MASK)|				\
+	 0								\
+		)
 
diff --git a/ddbridge/ddbridge.c b/ddbridge/ddbridge.c
index 033b389..741b3d2 100644
--- a/ddbridge/ddbridge.c
+++ b/ddbridge/ddbridge.c
@@ -113,7 +113,7 @@ static void __devexit ddb_remove(struct pci_dev *pdev)
 
 static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
 {
-	int stat;
+	int stat = 0;
 
 #ifdef CONFIG_PCI_MSI
 	if (msi && pci_msi_enabled()) {
@@ -267,7 +267,11 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	dev->link[0].ids.subdevice = id->subdevice;
 
 	dev->link[0].dev = dev;
+#ifdef NUM_IDS
+	dev->link[0].info = ddb_infos[id->driver_data];
+#else
 	dev->link[0].info = (struct ddb_info *) id->driver_data;
+#endif
 	pr_info("DDBridge: device name: %s\n", dev->link[0].info->name);
 
 	dev->regs_len = pci_resource_len(dev->pdev, 0);
@@ -311,7 +315,7 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	if (ddb_init(dev) == 0)
 		return 0;
 
-	ddb_irq_disable(dev);
+	ddb_irq_exit(dev);
 fail0:
 	pr_err("DDBridge: fail0\n");
 	if (dev->msi)
@@ -524,7 +528,7 @@ static struct ddb_info ddb_sdr = {
 	.name     = "Digital Devices SDR",
 	.version  = 3,
 	.regmap   = &octopus_sdr_map,
-	.port_num = 10,
+	.port_num = 20,
 	.temp_num = 1,
 	.tempmon_irq = 8,
 };
@@ -558,6 +562,14 @@ static struct ddb_info ddb_octopro = {
 	.subvendor   = _subvend, .subdevice = _subdev, \
 	.driver_data = (unsigned long)&_driverdata }
 
+#define DDB_DEVICE(_device, _subdevice, _driver_data) { \
+		PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, _subdevice),	\
+			.driver_data = (kernel_ulong_t) &_driver_data }
+
+#define DDB_DEVICE_ANY(_device, _subdevice) {		\
+		PCI_DEVICE_SUB(0xdd01, _device, PCI_ANY_ID, _subdevice), \
+			.driver_data = (kernel_ulong_t) ddb_none }
+
 static const struct pci_device_id ddb_id_tbl[] __devinitconst = {
 	DDB_ID(DDVID, 0x0002, DDVID, 0x0001, ddb_octopus),
 	DDB_ID(DDVID, 0x0003, DDVID, 0x0001, ddb_octopus),
diff --git a/ddbridge/ddbridge.h b/ddbridge/ddbridge.h
index 757f052..0c324d5 100644
--- a/ddbridge/ddbridge.h
+++ b/ddbridge/ddbridge.h
@@ -199,6 +199,10 @@ struct ddb_info {
 #define OUTPUT_DMA_SIZE (128*47*21)
 #define OUTPUT_DMA_IRQ_DIV 1
 #endif
+#define OUTPUT_DMA_BUFS_SDR 8
+#define OUTPUT_DMA_SIZE_SDR (256*1024)
+#define OUTPUT_DMA_IRQ_DIV_SDR 1
+
 
 struct ddb;
 struct ddb_port;
@@ -345,8 +349,8 @@ struct mod_base {
 
 struct ddb_mod {
 	struct ddb_port       *port;
-	u32                    nr;
-	u32                    regs;
+	//u32                    nr;
+	//u32                    regs;
 	
 	u32                    frequency;
 	u32                    modulation;

From 9eb5458eebf34173a5b168705dceb6d7e997e2d2 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 24 Feb 2017 12:48:00 +0100
Subject: [PATCH 13/47] also update golden image

---
 apps/octonet/ddflash.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/apps/octonet/ddflash.c b/apps/octonet/ddflash.c
index ad9d058..5144403 100644
--- a/apps/octonet/ddflash.c
+++ b/apps/octonet/ddflash.c
@@ -619,6 +619,25 @@ static int update_flash(struct ddflash *ddf)
 				if ((res = update_image(ddf, "/boot/fpga_gtl.img", 0x10000, 0xa0000, 1, 1)) == 1)
 					stat |= 1;
 		}
+#if 1
+		if ((ddf->id.hw & 0xffffff) == 0x010001) {		
+			if (fexists("/config/gtl.enabled")) {
+				if ((res = update_image(ddf, "/config/fpga_gtl.img", 0x160000, 0x80000, 1, 0)) == 1)
+					stat |= 1;
+				if (res == -1)
+					if ((res = update_image(ddf, "/boot/fpga_gtl.img", 0x160000, 0x80000, 1, 0)) == 1)
+						stat |= 1;
+			} else if (fexists("/config/gtl.disabled")) {
+				if ((res = update_image(ddf, "/config/fpga.img", 0x160000, 0x80000, 1, 0)) == 1)
+					stat |= 1;
+				if (res == -1)
+					if ((res = update_image(ddf, "/boot/fpga.img", 0x160000, 0x80000, 1, 0)) == 1)
+						stat |= 1;
+			
+			}
+		}
+#endif
+
 		break;
 	case 0x320:
 		//fname="/boot/DVBNetV1A_DD01_0300.bit";

From 285d7aed497a81c00ffafb87d78eb48de907767c Mon Sep 17 00:00:00 2001
From: mvoelkel <mvoelkel@digitaldevices.de>
Date: Fri, 24 Feb 2017 15:01:11 +0100
Subject: [PATCH 14/47] check for old golden version

---
 apps/octonet/ddflash.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/apps/octonet/ddflash.c b/apps/octonet/ddflash.c
index 5144403..3205a9c 100644
--- a/apps/octonet/ddflash.c
+++ b/apps/octonet/ddflash.c
@@ -510,7 +510,12 @@ static int check_fw(struct ddflash *ddf, char *fn, uint32_t *fw_off)
 				goto out;
 			}
 		} else if (!strcasecmp(key, "Version")) {
-			sscanf(val, "%x", &version);
+         if (strchr(val,'.')) {
+            int major = 0, minor = 0;
+            sscanf(val,"%d.%d",&major,&minor);
+            version = (major << 16) + minor;
+         } else
+            sscanf(val, "%x", &version);
 		} else if (!strcasecmp(key, "Length")) {
 			sscanf(val, "%u", &length);
 		} 
@@ -620,14 +625,14 @@ static int update_flash(struct ddflash *ddf)
 					stat |= 1;
 		}
 #if 1
-		if ((ddf->id.hw & 0xffffff) == 0x010001) {		
-			if (fexists("/config/gtl.enabled")) {
+		if ( (stat&1) && (ddf->id.hw & 0xffffff) <= 0x010001) {		
+			if (ddf->id.device == 0x0307) {
 				if ((res = update_image(ddf, "/config/fpga_gtl.img", 0x160000, 0x80000, 1, 0)) == 1)
 					stat |= 1;
 				if (res == -1)
 					if ((res = update_image(ddf, "/boot/fpga_gtl.img", 0x160000, 0x80000, 1, 0)) == 1)
 						stat |= 1;
-			} else if (fexists("/config/gtl.disabled")) {
+			} else {
 				if ((res = update_image(ddf, "/config/fpga.img", 0x160000, 0x80000, 1, 0)) == 1)
 					stat |= 1;
 				if (res == -1)

From a7ce2ef8da47f68d3b866cf61ec2889d7906d55e Mon Sep 17 00:00:00 2001
From: mvoelkel <mvoelkel@digitaldevices.de>
Date: Fri, 24 Feb 2017 15:27:14 +0100
Subject: [PATCH 15/47] Verify flash after writing

---
 apps/octonet/ddflash.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/apps/octonet/ddflash.c b/apps/octonet/ddflash.c
index 3205a9c..5d35c55 100644
--- a/apps/octonet/ddflash.c
+++ b/apps/octonet/ddflash.c
@@ -510,12 +510,12 @@ static int check_fw(struct ddflash *ddf, char *fn, uint32_t *fw_off)
 				goto out;
 			}
 		} else if (!strcasecmp(key, "Version")) {
-         if (strchr(val,'.')) {
-            int major = 0, minor = 0;
-            sscanf(val,"%d.%d",&major,&minor);
-            version = (major << 16) + minor;
-         } else
-            sscanf(val, "%x", &version);
+			if (strchr(val,'.')) {
+				int major = 0, minor = 0;
+				sscanf(val,"%d.%d",&major,&minor);
+				version = (major << 16) + minor;
+			} else
+				sscanf(val, "%x", &version);
 		} else if (!strcasecmp(key, "Length")) {
 			sscanf(val, "%u", &length);
 		} 
@@ -570,8 +570,13 @@ static int update_image(struct ddflash *ddf, char *fn,
 	if (res < 0) 
 		goto out;
 	res = flashwrite(ddf, fs, adr, len, fw_off);
-	if (res == 0)
-		res = 1;
+	if (res == 0) {
+		res = flashcmp(ddf, fs, adr, len, fw_off);
+		if (res == -2) {
+			res = 1
+		}
+	}
+ 
 out:
 	close(fs);
 	return res;

From 9dcd81fe42d9712d6bf815528baca3bcc6c726ce Mon Sep 17 00:00:00 2001
From: mvoelkel <mvoelkel@digitaldevices.de>
Date: Fri, 24 Feb 2017 16:07:17 +0100
Subject: [PATCH 16/47] Damn

---
 apps/octonet/ddflash.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/apps/octonet/ddflash.c b/apps/octonet/ddflash.c
index 5d35c55..cee76a0 100644
--- a/apps/octonet/ddflash.c
+++ b/apps/octonet/ddflash.c
@@ -573,7 +573,7 @@ static int update_image(struct ddflash *ddf, char *fn,
 	if (res == 0) {
 		res = flashcmp(ddf, fs, adr, len, fw_off);
 		if (res == -2) {
-			res = 1
+			res = 1;
 		}
 	}
  

From adf4e4025656f2488dc4915eb0d7a83e170cf9a7 Mon Sep 17 00:00:00 2001
From: mvoelkel <mvoelkel@digitaldevices.de>
Date: Fri, 24 Feb 2017 20:11:30 +0100
Subject: [PATCH 17/47] Fixed updating of a preloaded GTL version

---
 apps/octonet/ddflash.c | 23 +++++++++++++----------
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/apps/octonet/ddflash.c b/apps/octonet/ddflash.c
index cee76a0..979b3cf 100644
--- a/apps/octonet/ddflash.c
+++ b/apps/octonet/ddflash.c
@@ -617,17 +617,20 @@ static int update_flash(struct ddflash *ddf)
 				if ((res = update_image(ddf, "/boot/fpga.img", 0x10000, 0xa0000, 1, 0)) == 1)
 					stat |= 1;
 		} else {
-			if ((res = update_image(ddf, "/config/fpga.img", 0x10000, 0xa0000, 1, 1)) == 1)
-				stat |= 1;
-			if (res == -1)
-				if ((res = update_image(ddf, "/boot/fpga.img", 0x10000, 0xa0000, 1, 1)) == 1)
-					stat |= 1;
-			if (res == -1)
-				if ((res = update_image(ddf, "/config/fpga_gtl.img", 0x10000, 0xa0000, 1, 1)) == 1)
-					stat |= 1;
-			if (res == -1)
-				if ((res = update_image(ddf, "/boot/fpga_gtl.img", 0x10000, 0xa0000, 1, 1)) == 1)
+			if (ddf->id.device == 0x0307) {
+				if (res == -1)
+					if ((res = update_image(ddf, "/config/fpga_gtl.img", 0x10000, 0xa0000, 1, 1)) == 1)
+						stat |= 1;
+				if (res == -1)
+					if ((res = update_image(ddf, "/boot/fpga_gtl.img", 0x10000, 0xa0000, 1, 1)) == 1)
+						stat |= 1;
+			} else {
+				if ((res = update_image(ddf, "/config/fpga.img", 0x10000, 0xa0000, 1, 1)) == 1)
 					stat |= 1;
+				if (res == -1)
+					if ((res = update_image(ddf, "/boot/fpga.img", 0x10000, 0xa0000, 1, 1)) == 1)
+						stat |= 1;
+			}
 		}
 #if 1
 		if ( (stat&1) && (ddf->id.hw & 0xffffff) <= 0x010001) {		

From 0e09153b1fcf104433ee07cb3b4c202a28ce4787 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 10 Mar 2017 12:28:31 +0100
Subject: [PATCH 18/47] use $(CC) instead of gcc

---
 apps/Makefile | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/apps/Makefile b/apps/Makefile
index 4c95505..b229b86 100644
--- a/apps/Makefile
+++ b/apps/Makefile
@@ -1,22 +1,22 @@
 all: cit citin flashprog modt ddtest setmod ddflash setmod2
 
 cit: cit.c
-	gcc -o cit cit.c -lpthread
+	$(CC) -o cit cit.c -lpthread
 
 modt: modt.c
-	gcc -o modt modt.c -lpthread
+	$(CC) -o modt modt.c -lpthread
 
 setmod: setmod.c
-	gcc -o setmod setmod.c -I../include/
+	$(CC) -o setmod setmod.c -I../include/
 
 setmod2: setmod2.c
-	gcc -o setmod2 setmod2.c -I../include/
+	$(CC) -o setmod2 setmod2.c -I../include/
 
 flashprog: flashprog.c
-	gcc -o flashprog flashprog.c
+	$(CC) -o flashprog flashprog.c
 
 ddtest: ddtest.c
-	gcc -o ddtest ddtest.c
+	$(CC) -o ddtest ddtest.c
 
 ddflash: ddflash.c
-	gcc -o ddflash ddflash.c
+	$(CC) -o ddflash ddflash.c

From 326e928f66f93f46015f2e07dd5e53924f54f402 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 10 Mar 2017 12:28:57 +0100
Subject: [PATCH 19/47] add ids

---
 apps/flashprog.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/apps/flashprog.c b/apps/flashprog.c
index a2fa04d..99b3ea4 100644
--- a/apps/flashprog.c
+++ b/apps/flashprog.c
@@ -210,9 +210,13 @@ int main(int argc, char **argv)
 			printf("Octopus 35\n");
 			break;
 		case 0x0003:
-			fname="DVBBridgeV1B_DVBBridgeV1B.bit";
+			fname="DVBBridgeV1B_DVBBridgeV1B.fpga";
 			printf("Octopus\n");
 			break;
+		case 0x0005:
+			fname="DVBBridgeV2A_DD01_0005_STD.fpga";
+			printf("Octopus Classic\n");
+			break;
 		case 0x0006:
 			fname="DVBBridgeV2A_DD01_0006_STD.fpga";
 			printf("CineS2 V7\n");

From 21c69918d38b2d4bf01c45b920cddb732da8fe62 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 10 Mar 2017 12:29:11 +0100
Subject: [PATCH 20/47] add support for higher IRQs in case of multiple MSI
 interrupts

---
 ddbridge/ddbridge-core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index 29a5993..9ccc2aa 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -3646,9 +3646,9 @@ static irqreturn_t irq_handler0(int irq, void *dev_id)
 	do {
 		if (s & 0x80000000)
 			return IRQ_NONE;
-		if (!(s & 0xfff00))
+		if (!(s & 0xfffff00))
 			return IRQ_NONE;
-		ddbwritel(dev, s & 0xfff00, INTERRUPT_ACK);
+		ddbwritel(dev, s & 0xfffff00, INTERRUPT_ACK);
 		irq_handle_io(dev, s);
 	} while ((s = ddbreadl(dev, INTERRUPT_STATUS)));
 

From eb6652f18f1aad6075967ac4c35be9d9d60c9e67 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 13 Mar 2017 13:00:12 +0100
Subject: [PATCH 21/47] lower gain for 16 output channel image

---
 ddbridge/ddbridge-mod.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index 1362c0d..a1072f2 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -1746,7 +1746,7 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 		mod_set_sdr_table(mod, vsb13500, 64);
 		mod_set_sdr_table(mod, stage2, 16);
 	}
-	ddbwritel(dev, 0x2000, 0x244);
+	ddbwritel(dev, 0x1800, 0x244);
 	ddbwritel(dev, 0x01, 0x240);
 	//msleep(500);
 	for (i = 0; i < streams; i++) {

From b3806c61cece29a19a8c93cc8457df70f1861fb4 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 7 Apr 2017 12:22:29 +0200
Subject: [PATCH 22/47] typo

---
 frontends/lnbh25.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/frontends/lnbh25.c b/frontends/lnbh25.c
index ea730e6..c666ee1 100644
--- a/frontends/lnbh25.c
+++ b/frontends/lnbh25.c
@@ -146,7 +146,7 @@ struct dvb_frontend *lnbh25_attach(struct dvb_frontend *fe,
 	fe->ops.enable_high_lnb_voltage = lnbh25_enable_high_lnb_voltage;
 	fe->ops.release_sec = lnbh25_release;
 
-	pr_info("LNB25 on %02x\n", lnbh->adr);
+	pr_info("LNBH25 on %02x\n", lnbh->adr);
 
 	return fe;
 }

From 08a6d78da7558a36b9d8102d39691df5efdc2311 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 7 Apr 2017 12:26:03 +0200
Subject: [PATCH 23/47] print used devices

---
 apps/cit.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/apps/cit.c b/apps/cit.c
index 2a3f6e7..4d8ab39 100644
--- a/apps/cit.c
+++ b/apps/cit.c
@@ -91,6 +91,7 @@ void *get_ts(void *a)
 	if (!buf)
 		return NULL;
 	sprintf(fname, "/dev/dvb/adapter%u/ci%u", adapter, device);
+	printf("using %s for reading\n", fname);
 	fdi = open(fname, O_RDONLY);
 
 	while (1) {
@@ -122,6 +123,7 @@ int send(void)
 	if (!buf)
 		return -1;
 	sprintf(fname, "/dev/dvb/adapter%u/ci%u", adapter, device);
+	printf("using %s for writing\n", fname);
 	fdo=open(fname, O_WRONLY);
 
 	while (1) {

From fa36763d430fc92488992ca69d599dd8a9255e79 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 7 Apr 2017 12:27:35 +0200
Subject: [PATCH 24/47] - add support for setting ARI - use coorect base
 frequency

---
 ddbridge/ddbridge-mod.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index a1072f2..7d49dfb 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -1481,6 +1481,12 @@ void ddbridge_mod_rate_handler(unsigned long data)
 		PCRAdjustExtFrac, PCRCorr, mod->PCRIncrement);
 }
 
+static intmod_set_ari(struct ddb_mod *mod, u32 rate)
+{
+	ddbwritel(mod->port->dev, rate, SDR_CHANNEL_ARICW(mod->port->nr));
+	return 0;
+}
+
 static int mod_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
 {
 	switch(tvp->cmd) {
@@ -1498,6 +1504,9 @@ static int mod_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
 
 	case MODULATOR_INPUT_BITRATE:
 		return mod_set_ibitrate(mod, tvp->u.data);
+
+	case MODULATOR_OUTPUT_ARI:
+		return mod_set_ari(mod, tvp->u.data);
 	}
 	return 0;
 }
@@ -1605,7 +1614,7 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
 		mod->port = &dev->port[i];
 		mod_set_modulation(mod, QAM_256);
 		mod_set_symbolrate(mod, 6900000);
-		mod_set_frequency(mod, 114000000 + i * 8000000);
+		mod_set_frequency(mod, dev->mod_base.frequency + i * 8000000);
 	}
 	if (streams <= 8)
 		mod_set_vga(dev, RF_VGA_GAIN_N8);

From f56ec446ae150d73ca62fae1a75bd4ef50af7018 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 7 Apr 2017 12:28:27 +0200
Subject: [PATCH 25/47] add ARI property

---
 include/linux/dvb/mod.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/linux/dvb/mod.h b/include/linux/dvb/mod.h
index ce706e0..4889582 100644
--- a/include/linux/dvb/mod.h
+++ b/include/linux/dvb/mod.h
@@ -28,6 +28,6 @@ struct dvb_mod_channel_params {
 #define MODULATOR_ATTENUATOR     32  
 #define MODULATOR_INPUT_BITRATE  33  /* Hz */
 #define MODULATOR_PCR_MODE       34  /* 1=pcr correction enabled */
-
+#define MODULATOR_OUTPUT_ARI     64
 
 #endif /*_UAPI_DVBMOD_H_*/

From 263d593bcfef3afe30196817d2d13a5d7e7f0002 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 7 Apr 2017 12:28:55 +0200
Subject: [PATCH 26/47] simplify device table

---
 ddbridge/ddbridge.c | 139 +++++++++++++++++++++-----------------------
 1 file changed, 66 insertions(+), 73 deletions(-)

diff --git a/ddbridge/ddbridge.c b/ddbridge/ddbridge.c
index 741b3d2..a212b33 100644
--- a/ddbridge/ddbridge.c
+++ b/ddbridge/ddbridge.c
@@ -555,90 +555,83 @@ static struct ddb_info ddb_octopro = {
 /****************************************************************************/
 /****************************************************************************/
 
-#define DDVID 0xdd01 /* Digital Devices Vendor ID */
-
-#define DDB_ID(_vend, _dev, _subvend, _subdev, _driverdata) { \
-	.vendor      = _vend,    .device    = _dev, \
-	.subvendor   = _subvend, .subdevice = _subdev, \
-	.driver_data = (unsigned long)&_driverdata }
-
 #define DDB_DEVICE(_device, _subdevice, _driver_data) { \
-		PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, _subdevice),	\
+		PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, _subdevice), \
 			.driver_data = (kernel_ulong_t) &_driver_data }
 
-#define DDB_DEVICE_ANY(_device, _subdevice) {		\
-		PCI_DEVICE_SUB(0xdd01, _device, PCI_ANY_ID, _subdevice), \
-			.driver_data = (kernel_ulong_t) ddb_none }
+#define DDB_DEVICE_ANY(_device) { \
+		PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, PCI_ANY_ID),	\
+			.driver_data = (kernel_ulong_t) &ddb_none }
 
-static const struct pci_device_id ddb_id_tbl[] __devinitconst = {
-	DDB_ID(DDVID, 0x0002, DDVID, 0x0001, ddb_octopus),
-	DDB_ID(DDVID, 0x0003, DDVID, 0x0001, ddb_octopus),
-	DDB_ID(DDVID, 0x0005, DDVID, 0x0004, ddb_octopusv3),
-	DDB_ID(DDVID, 0x0003, DDVID, 0x0002, ddb_octopus_le),
-	DDB_ID(DDVID, 0x0003, DDVID, 0x0003, ddb_octopus_oem),
-	DDB_ID(DDVID, 0x0003, DDVID, 0x0010, ddb_octopus_mini),
-	DDB_ID(DDVID, 0x0005, DDVID, 0x0011, ddb_octopus_mini),
-	DDB_ID(DDVID, 0x0003, DDVID, 0x0020, ddb_v6),
-	DDB_ID(DDVID, 0x0003, DDVID, 0x0021, ddb_v6_5),
-	DDB_ID(DDVID, 0x0006, DDVID, 0x0022, ddb_v7),
-	DDB_ID(DDVID, 0x0006, DDVID, 0x0024, ddb_v7a),
-	DDB_ID(DDVID, 0x0003, DDVID, 0x0030, ddb_dvbct),
-	DDB_ID(DDVID, 0x0003, DDVID, 0xdb03, ddb_satixS2v3),
-	DDB_ID(DDVID, 0x0006, DDVID, 0x0031, ddb_ctv7),
-	DDB_ID(DDVID, 0x0006, DDVID, 0x0032, ddb_ctv7),
-	DDB_ID(DDVID, 0x0006, DDVID, 0x0033, ddb_ctv7),
-	DDB_ID(DDVID, 0x0007, DDVID, 0x0023, ddb_s2_48),
-	DDB_ID(DDVID, 0x0008, DDVID, 0x0034, ddb_ct2_8),
-	DDB_ID(DDVID, 0x0008, DDVID, 0x0035, ddb_c2t2_8),
-	DDB_ID(DDVID, 0x0008, DDVID, 0x0036, ddb_isdbt_8),
-	DDB_ID(DDVID, 0x0008, DDVID, 0x0037, ddb_c2t2i_v0_8),
-	DDB_ID(DDVID, 0x0008, DDVID, 0x0038, ddb_c2t2i_8),
-	DDB_ID(DDVID, 0x0006, DDVID, 0x0039, ddb_ctv7),
-	DDB_ID(DDVID, 0x0011, DDVID, 0x0040, ddb_ci),
-	DDB_ID(DDVID, 0x0011, DDVID, 0x0041, ddb_cis),
-	DDB_ID(DDVID, 0x0012, DDVID, 0x0042, ddb_ci),
-	DDB_ID(DDVID, 0x0013, DDVID, 0x0043, ddb_ci_s2_pro),
-	DDB_ID(DDVID, 0x0013, DDVID, 0x0044, ddb_ci_s2_pro_a),
-	DDB_ID(DDVID, 0x0201, DDVID, 0x0001, ddb_mod),
-	DDB_ID(DDVID, 0x0201, DDVID, 0x0002, ddb_mod),
-	DDB_ID(DDVID, 0x0203, DDVID, 0x0001, ddb_mod),
-	DDB_ID(DDVID, 0x0210, DDVID, 0x0001, ddb_mod_fsm_24),
-	DDB_ID(DDVID, 0x0210, DDVID, 0x0002, ddb_mod_fsm_16),
-	DDB_ID(DDVID, 0x0210, DDVID, 0x0003, ddb_mod_fsm_8),
-	DDB_ID(DDVID, 0x0220, DDVID, 0x0001, ddb_sdr),
+static const struct pci_device_id ddb_id_table[] __devinitconst = {
+	DDB_DEVICE(0x0002, 0x0001, ddb_octopus),
+	DDB_DEVICE(0x0003, 0x0001, ddb_octopus),
+	DDB_DEVICE(0x0005, 0x0004, ddb_octopusv3),
+	DDB_DEVICE(0x0003, 0x0002, ddb_octopus_le),
+	DDB_DEVICE(0x0003, 0x0003, ddb_octopus_oem),
+	DDB_DEVICE(0x0003, 0x0010, ddb_octopus_mini),
+	DDB_DEVICE(0x0005, 0x0011, ddb_octopus_mini),
+	DDB_DEVICE(0x0003, 0x0020, ddb_v6),
+	DDB_DEVICE(0x0003, 0x0021, ddb_v6_5),
+	DDB_DEVICE(0x0006, 0x0022, ddb_v7),
+	DDB_DEVICE(0x0006, 0x0024, ddb_v7a),
+	DDB_DEVICE(0x0003, 0x0030, ddb_dvbct),
+	DDB_DEVICE(0x0003, 0xdb03, ddb_satixS2v3),
+	DDB_DEVICE(0x0006, 0x0031, ddb_ctv7),
+	DDB_DEVICE(0x0006, 0x0032, ddb_ctv7),
+	DDB_DEVICE(0x0006, 0x0033, ddb_ctv7),
+	DDB_DEVICE(0x0007, 0x0023, ddb_s2_48),
+	DDB_DEVICE(0x0008, 0x0034, ddb_ct2_8),
+	DDB_DEVICE(0x0008, 0x0035, ddb_c2t2_8),
+	DDB_DEVICE(0x0008, 0x0036, ddb_isdbt_8),
+	DDB_DEVICE(0x0008, 0x0037, ddb_c2t2i_v0_8),
+	DDB_DEVICE(0x0008, 0x0038, ddb_c2t2i_8),
+	DDB_DEVICE(0x0006, 0x0039, ddb_ctv7),
+	DDB_DEVICE(0x0011, 0x0040, ddb_ci),
+	DDB_DEVICE(0x0011, 0x0041, ddb_cis),
+	DDB_DEVICE(0x0012, 0x0042, ddb_ci),
+	DDB_DEVICE(0x0013, 0x0043, ddb_ci_s2_pro),
+	DDB_DEVICE(0x0013, 0x0044, ddb_ci_s2_pro_a),
+	DDB_DEVICE(0x0201, 0x0001, ddb_mod),
+	DDB_DEVICE(0x0201, 0x0002, ddb_mod),
+	DDB_DEVICE(0x0203, 0x0001, ddb_mod),
+	DDB_DEVICE(0x0210, 0x0001, ddb_mod_fsm_24),
+	DDB_DEVICE(0x0210, 0x0002, ddb_mod_fsm_16),
+	DDB_DEVICE(0x0210, 0x0003, ddb_mod_fsm_8),
+	DDB_DEVICE(0x0220, 0x0001, ddb_sdr),
 	/* testing on OctopusNet Pro */
-	DDB_ID(DDVID, 0x0320, PCI_ANY_ID, PCI_ANY_ID, ddb_octopro_hdin),
-	DDB_ID(DDVID, 0x0321, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0322, PCI_ANY_ID, PCI_ANY_ID, ddb_octopro),
-	DDB_ID(DDVID, 0x0323, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0328, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0329, PCI_ANY_ID, PCI_ANY_ID, ddb_octopro_hdin),
+	DDB_DEVICE(0x0320, PCI_ANY_ID, ddb_octopro_hdin),
+	DDB_DEVICE(0x0321, PCI_ANY_ID, ddb_none),
+	DDB_DEVICE(0x0322, PCI_ANY_ID, ddb_octopro),
+	DDB_DEVICE(0x0323, PCI_ANY_ID, ddb_none),
+	DDB_DEVICE(0x0328, PCI_ANY_ID, ddb_none),
+	DDB_DEVICE(0x0329, PCI_ANY_ID, ddb_octopro_hdin),
 	/* in case sub-ids got deleted in flash */
-	DDB_ID(DDVID, 0x0003, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0005, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0006, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0007, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0008, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0011, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0012, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0013, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0201, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0203, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0210, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0220, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0320, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0321, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0322, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0323, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0328, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
-	DDB_ID(DDVID, 0x0329, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
+	DDB_DEVICE_ANY(0x0003),
+	DDB_DEVICE_ANY(0x0005),
+	DDB_DEVICE_ANY(0x0006),
+	DDB_DEVICE_ANY(0x0007),
+	DDB_DEVICE_ANY(0x0008),
+	DDB_DEVICE_ANY(0x0011),
+	DDB_DEVICE_ANY(0x0012),
+	DDB_DEVICE_ANY(0x0013),
+	DDB_DEVICE_ANY(0x0201),
+	DDB_DEVICE_ANY(0x0203),
+	DDB_DEVICE_ANY(0x0210),
+	DDB_DEVICE_ANY(0x0220),
+	DDB_DEVICE_ANY(0x0320),
+	DDB_DEVICE_ANY(0x0321),
+	DDB_DEVICE_ANY(0x0322),
+	DDB_DEVICE_ANY(0x0323),
+	DDB_DEVICE_ANY(0x0328),
+	DDB_DEVICE_ANY(0x0329),
 	{0}
 };
-MODULE_DEVICE_TABLE(pci, ddb_id_tbl);
+MODULE_DEVICE_TABLE(pci, ddb_id_table);
 
 static struct pci_driver ddb_pci_driver = {
 	.name        = "ddbridge",
-	.id_table    = ddb_id_tbl,
+	.id_table    = ddb_id_table,
 	.probe       = ddb_probe,
 	.remove      = ddb_remove,
 };

From 52b81cfd8ecd60530d4ba1cc3c7e9240e404b681 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 7 Apr 2017 12:50:01 +0200
Subject: [PATCH 27/47] typo

---
 ddbridge/ddbridge-mod.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index 7d49dfb..545cd21 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -1481,7 +1481,7 @@ void ddbridge_mod_rate_handler(unsigned long data)
 		PCRAdjustExtFrac, PCRCorr, mod->PCRIncrement);
 }
 
-static intmod_set_ari(struct ddb_mod *mod, u32 rate)
+static int mod_set_ari(struct ddb_mod *mod, u32 rate)
 {
 	ddbwritel(mod->port->dev, rate, SDR_CHANNEL_ARICW(mod->port->nr));
 	return 0;

From 785d7c512612bbf509bbc925016889b6dec412a4 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 7 Apr 2017 22:20:40 +0200
Subject: [PATCH 28/47] change command name from UNI to SCIF

---
 ddbridge/ddbridge-regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge-regs.h b/ddbridge/ddbridge-regs.h
index 71430d1..28d33c1 100644
--- a/ddbridge/ddbridge-regs.h
+++ b/ddbridge/ddbridge-regs.h
@@ -244,7 +244,7 @@
 #define LNB_CMD_HIGH   4
 #define LNB_CMD_OFF    5
 #define LNB_CMD_DISEQC 6
-#define LNB_CMD_UNI    7
+#define LNB_CMD_SCIF   7
 
 #define LNB_BUSY  (1ULL <<  4)
 #define LNB_TONE  (1ULL << 15)

From 6830f4df0824280542fc690a61b2f030fb132d3d Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 7 Apr 2017 22:21:06 +0200
Subject: [PATCH 29/47] add sat selection for fmode 1 and 2

---
 ddbridge/ddbridge-core.c | 110 ++++++++++++++++++++++-----------------
 ddbridge/ddbridge-i2c.c  |  60 +++++++++++----------
 ddbridge/ddbridge.h      |  23 ++++----
 3 files changed, 107 insertions(+), 86 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index 9ccc2aa..c24f53e 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -46,6 +46,10 @@ static int fmode;
 module_param(fmode, int, 0444);
 MODULE_PARM_DESC(fmode, "frontend emulation mode");
 
+static int fmode_sat = -1;
+module_param(fmode_sat, int, 0444);
+MODULE_PARM_DESC(fmode_sat, "set frontend emulation mode sat");
+
 static int old_quattro;
 module_param(old_quattro, int, 0444);
 MODULE_PARM_DESC(old_quattro, "old quattro LNB input order ");
@@ -1681,6 +1685,29 @@ static int max_send_master_cmd(struct dvb_frontend *fe,
 	return 0;
 }
 
+static int lnb_send_diseqc(struct ddb *dev, u32 link, u32 input,
+			   struct dvb_diseqc_master_cmd *cmd)
+{
+	u32 tag = DDB_LINK_TAG(link);
+	int i;
+
+	ddbwritel(dev, 0, tag | LNB_BUF_LEVEL(input));
+	for (i = 0; i < cmd->msg_len; i++)
+		ddbwritel(dev, cmd->msg[i], tag | LNB_BUF_WRITE(input));
+	lnb_command(dev, link, input, LNB_CMD_DISEQC);
+	return 0;
+}
+
+static int lnb_set_sat(struct ddb *dev, u32 link, u32 input, u32 sat, u32 band, u32 hor)
+{
+	struct dvb_diseqc_master_cmd cmd = {
+		.msg = {0xe0, 0x10, 0x38, 0xf0, 0x00, 0x00},
+		.msg_len = 4
+	};
+	cmd.msg[3] = 0xf0 | ( ((sat << 2) & 0x0c) | (band ? 1 : 0) | (hor ? 2 : 0));
+	return lnb_send_diseqc(dev, link, input, &cmd);
+}
+
 static int lnb_set_tone(struct ddb *dev, u32 link, u32 input,
 			fe_sec_tone_mode_t tone)
 {
@@ -1933,6 +1960,17 @@ static int lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm)
 	pr_info("DDBridge: Set fmode link %u = %u\n", l, fm);
 	mutex_lock(&link->lnb.lock);
 	if (fm == 2 || fm == 1) {
+		if (fmode_sat >= 0) {
+			lnb_set_sat(dev, l, 0, fmode_sat, 0, 0);
+			if (old_quattro) {
+				lnb_set_sat(dev, l, 1, fmode_sat, 0, 1);
+				lnb_set_sat(dev, l, 2, fmode_sat, 1, 0);
+			} else {
+				lnb_set_sat(dev, l, 1, fmode_sat, 1, 0);
+				lnb_set_sat(dev, l, 2, fmode_sat, 0, 1);
+			}
+			lnb_set_sat(dev, l, 3, fmode_sat, 1, 1);
+		}
 		lnb_set_tone(dev, l, 0, SEC_TONE_OFF);
 		if (old_quattro) {
 			lnb_set_tone(dev, l, 1, SEC_TONE_OFF);
@@ -2000,46 +2038,6 @@ static int fe_attach_mxl5xx(struct ddb_input *input)
 	return 0;
 }
 
-static int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
-				   int (*start_feed)(struct dvb_demux_feed *),
-				   int (*stop_feed)(struct dvb_demux_feed *),
-				   void *priv)
-{
-	dvbdemux->priv = priv;
-
-	dvbdemux->filternum = 256;
-	dvbdemux->feednum = 256;
-	dvbdemux->start_feed = start_feed;
-	dvbdemux->stop_feed = stop_feed;
-	dvbdemux->write_to_decoder = NULL;
-	dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
-				      DMX_SECTION_FILTERING |
-				      DMX_MEMORY_BASED_FILTERING);
-	return dvb_dmx_init(dvbdemux);
-}
-
-static int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
-				      struct dvb_demux *dvbdemux,
-				      struct dmx_frontend *hw_frontend,
-				      struct dmx_frontend *mem_frontend,
-				      struct dvb_adapter *dvb_adapter)
-{
-	int ret;
-
-	dmxdev->filternum = 256;
-	dmxdev->demux = &dvbdemux->dmx;
-	dmxdev->capabilities = 0;
-	ret = dvb_dmxdev_init(dmxdev, dvb_adapter);
-	if (ret < 0)
-		return ret;
-
-	hw_frontend->source = DMX_FRONTEND_0;
-	dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend);
-	mem_frontend->source = DMX_MEMORY_FE;
-	dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend);
-	return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
-}
-
 #if 0
 static int start_input(struct ddb_input *input)
 {
@@ -2111,12 +2109,13 @@ static void dvb_input_detach(struct ddb_input *input)
 	case 0x20:
 		dvb_net_release(&dvb->dvbnet);
 		/* fallthrough */
-	case 0x11:
-		dvbdemux->dmx.close(&dvbdemux->dmx);
+	case 0x12:
 		dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
 					      &dvb->hw_frontend);
 		dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
 					      &dvb->mem_frontend);
+		/* fallthrough */
+	case 0x11:
 		dvb_dmxdev_release(&dvb->dmxdev);
 		/* fallthrough */
 	case 0x10:
@@ -2239,21 +2238,33 @@ static int dvb_input_attach(struct ddb_input *input)
 
 	dvb->attached = 0x01;
 
-	ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux",
-				      start_feed,
-				      stop_feed, input);
+	dvbdemux->priv = input;
+	dvbdemux->dmx.capabilities = DMX_TS_FILTERING |
+		DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
+	dvbdemux->start_feed = start_feed;
+	dvbdemux->stop_feed = stop_feed;
+	dvbdemux->filternum = dvbdemux->feednum = 256;
+	ret = dvb_dmx_init(dvbdemux);
 	if (ret < 0)
 		return ret;
 	dvb->attached = 0x10;
 
-	ret = my_dvb_dmxdev_ts_card_init(&dvb->dmxdev,
-					 &dvb->demux,
-					 &dvb->hw_frontend,
-					 &dvb->mem_frontend, adap);
+	dvb->dmxdev.filternum = 256;
+	dvb->dmxdev.demux = &dvbdemux->dmx;
+	ret = dvb_dmxdev_init(&dvb->dmxdev, adap);
 	if (ret < 0)
 		return ret;
 	dvb->attached = 0x11;
 
+	dvb->mem_frontend.source = DMX_MEMORY_FE;
+	dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend);
+	dvb->hw_frontend.source = DMX_FRONTEND_0;
+	dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend);
+	ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend);
+	if (ret < 0)
+		return ret;
+	dvb->attached = 0x12;
+
 	ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux);
 	if (ret < 0)
 		return ret;
@@ -2348,6 +2359,7 @@ static int dvb_input_attach(struct ddb_input *input)
 		return 0;
 	}
 	dvb->attached = 0x30;
+
 	if (dvb->fe) {
 		if (dvb_register_frontend(adap, dvb->fe) < 0)
 			return -ENODEV;
diff --git a/ddbridge/ddbridge-i2c.c b/ddbridge/ddbridge-i2c.c
index f8b4fe8..6fc63d5 100644
--- a/ddbridge/ddbridge-i2c.c
+++ b/ddbridge/ddbridge-i2c.c
@@ -156,38 +156,43 @@ static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
 	struct ddb *dev = i2c->dev;
 	u8 addr = 0;
 
-	if (num != 1 && num != 2)
-		return -EIO;
 	addr = msg[0].addr;
 	if (msg[0].len > i2c->bsize)
 		return -EIO;
-	if (num == 2 && msg[1].flags & I2C_M_RD &&
-	    !(msg[0].flags & I2C_M_RD)) {
-		if (msg[1].len > i2c->bsize)
-			return -EIO;
-		ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
-		ddbwritel(dev, msg[0].len | (msg[1].len << 16),
-			  i2c->regs + I2C_TASKLENGTH);
-		if (!ddb_i2c_cmd(i2c, addr, 1)) {
-			ddbcpyfrom(dev, msg[1].buf,
-				   i2c->rbuf,
-				   msg[1].len);
-			return num;
-		}
-	}
-	if (num == 1 && !(msg[0].flags & I2C_M_RD)) {
-		ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
-		ddbwritel(dev, msg[0].len, i2c->regs + I2C_TASKLENGTH);
-		if (!ddb_i2c_cmd(i2c, addr, 2))
-			return num;
-	}
-	if (num == 1 && (msg[0].flags & I2C_M_RD)) {
-		ddbwritel(dev, msg[0].len << 16, i2c->regs + I2C_TASKLENGTH);
-		if (!ddb_i2c_cmd(i2c, addr, 3)) {
+	switch (num) {
+	case 1:
+		if (msg[0].flags & I2C_M_RD) {
+			ddbwritel(dev, msg[0].len << 16,
+				  i2c->regs + I2C_TASKLENGTH);
+			if (ddb_i2c_cmd(i2c, addr, 3))
+				break;
 			ddbcpyfrom(dev, msg[0].buf,
 				   i2c->rbuf, msg[0].len);
 			return num;
-		}
+		} 
+		ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
+		ddbwritel(dev, msg[0].len, i2c->regs + I2C_TASKLENGTH);
+		if (ddb_i2c_cmd(i2c, addr, 2))
+			break;
+		return num;
+	case 2:
+		if ((msg[0].flags & I2C_M_RD) == I2C_M_RD)
+			break;
+		if ((msg[1].flags & I2C_M_RD) != I2C_M_RD)
+			break;
+		if (msg[1].len > i2c->bsize)
+			break;
+		ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
+		ddbwritel(dev, msg[0].len | (msg[1].len << 16),
+			  i2c->regs + I2C_TASKLENGTH);
+		if (ddb_i2c_cmd(i2c, addr, 1))
+			break;
+		ddbcpyfrom(dev, msg[1].buf,
+			   i2c->rbuf,
+			   msg[1].len);
+		return num;
+	default:
+		break;
 	}
 	return -EIO;
 }
@@ -247,11 +252,10 @@ static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
 	adap->class = I2C_CLASS_TV_ANALOG;
 #endif
 #endif
-	/*strcpy(adap->name, "ddbridge");*/
 	snprintf(adap->name, I2C_NAME_SIZE, "ddbridge_%02x.%x.%x",
 		 dev->nr, i2c->link, i);
 	adap->algo = &ddb_i2c_algo;
-	adap->algo_data = (void *)i2c;
+	adap->algo_data = (void *) i2c;
 	adap->dev.parent = dev->dev;
 	return i2c_add_adapter(adap);
 }
diff --git a/ddbridge/ddbridge.h b/ddbridge/ddbridge.h
index 0c324d5..e3b1c29 100644
--- a/ddbridge/ddbridge.h
+++ b/ddbridge/ddbridge.h
@@ -144,6 +144,19 @@ struct ddb_ids {
 	u32 mac;
 };
 
+#if 0
+struct ddb_ddata {
+	u32 id;
+#define DDB_NONE         0
+#define DDB_OCTOPUS      1
+#define DDB_OCTOPUS_CI   2
+#define DDB_MODULATOR    3
+#define DDB_OCTONET      4
+#define DDB_OCTOPUS_MAX  5
+#define DDB_OCTOPUS_MAX_CT  6
+#define DDB_OCTOPRO      7
+#define DDB_OCTOPRO_HDIN 8
+#else
 struct ddb_info {
 	u32   type;
 #define DDB_NONE         0
@@ -155,6 +168,7 @@ struct ddb_info {
 #define DDB_OCTOPUS_MAX_CT  6
 #define DDB_OCTOPRO      7
 #define DDB_OCTOPRO_HDIN 8
+#endif
 	u32   version;
 	char *name;
 	u32   i2c_mask;
@@ -682,15 +696,6 @@ static void ddbcpyfrom(struct ddb *dev, void *dst, u32 adr, long count)
 	return memcpy_fromio(dst, (char *) (dev->regs + adr), count);
 }
 
-#if 0
-
-#define ddbcpyto(_dev, _adr, _src, _count) \
-	memcpy_toio((char *) (_dev->regs + (_adr)), (_src), (_count))
-
-#define ddbcpyfrom(_dev, _dst, _adr, _count) \
-	memcpy_fromio((_dst), (char *) (_dev->regs + (_adr)), (_count))
-#endif
-
 #define ddbmemset(_dev, _adr, _val, _count) \
 	memset_io((char *) (_dev->regs + (_adr)), (_val), (_count))
 

From 264f08fbad811657b98291bf5125ad1b3af830db Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Fri, 7 Apr 2017 22:22:06 +0200
Subject: [PATCH 30/47] add sub-ids for MAX A8 cards on GT-Link

---
 ddbridge/ddbridge-core.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index c24f53e..a3818d7 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -5202,7 +5202,21 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l)
 		link->info = &ddb_s2_48;
 		break;
 	case 0x0008dd01:
-		link->info = &ddb_c2t2_8;
+		switch (subid) {
+		case 0x0035dd01:
+		default:
+			link->info = &ddb_c2t2_8;
+			break;
+		case 0x0036dd01:
+			link->info = &ddb_isdbt_8;
+			break;
+		case 0x0037dd01:
+			link->info = &ddb_c2t2i_v0_8;
+			break;
+		case 0x0038dd01:
+			link->info = &ddb_c2t2i_8;
+			break;
+		}
 		break;
 	default:
 		pr_info("DDBridge: Detected GT link but found invalid ID %08x. You might have to update (flash) the add-on card first.",

From 2aee51e447a3f25b70601f59486625bc6c1e25ac Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Sun, 9 Apr 2017 13:20:22 +0200
Subject: [PATCH 31/47] wrong port type for ct2ti card

---
 ddbridge/ddbridge-core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index a3818d7..b8a7d06 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -2702,8 +2702,8 @@ static void ddb_port_probe(struct ddb_port *port)
 			break;
 		case 0xc1:
 			port->name = "DUAL DVB-C2T2 ISDB-T CXD2854";
-			port->type = DDB_TUNER_DVBC2T2_SONY_P;
-			port->type_name = "DVBC2T2_ISDBT_SONY";
+			port->type = DDB_TUNER_DVBC2T2I_SONY_P;
+			port->type_name = "DVBC2T2I_ISDBT_SONY";
 			break;
 		default:
 			return;

From ae37a1e4e987b3f0a9f2719ed4cf1585028ca290 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 10 Apr 2017 11:45:43 +0200
Subject: [PATCH 32/47] change SDR to 16 outputs

---
 ddbridge/ddbridge.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge.c b/ddbridge/ddbridge.c
index a212b33..c57bb68 100644
--- a/ddbridge/ddbridge.c
+++ b/ddbridge/ddbridge.c
@@ -118,7 +118,11 @@ static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
 #ifdef CONFIG_PCI_MSI
 	if (msi && pci_msi_enabled()) {
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0))
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
 		stat = pci_enable_msi_range(dev->pdev, 1, nr);
+#else
+		stat = pci_alloc_irq_vectors(dev->pdev, 1, nr, PCI_IRQ_MSI);
+#endif
 		if (stat >= 1) {
 			dev->msi = stat;
 			pr_info("DDBridge: using %d MSI interrupt(s)\n",
@@ -528,7 +532,7 @@ static struct ddb_info ddb_sdr = {
 	.name     = "Digital Devices SDR",
 	.version  = 3,
 	.regmap   = &octopus_sdr_map,
-	.port_num = 20,
+	.port_num = 16,
 	.temp_num = 1,
 	.tempmon_irq = 8,
 };

From bba5fa56832b4a4d6fd6e091fdbf03b0569c0b33 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 10 Apr 2017 11:46:36 +0200
Subject: [PATCH 33/47] kernel 4.11 fixes

---
 ddbridge/ddbridge.h       | 1 -
 dvb-core/dvb_ca_en50221.c | 4 ++++
 dvb-core/dvb_demux.c      | 4 ++++
 dvb-core/dvb_frontend.h   | 4 ++++
 4 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge.h b/ddbridge/ddbridge.h
index e3b1c29..add55b3 100644
--- a/ddbridge/ddbridge.h
+++ b/ddbridge/ddbridge.h
@@ -55,7 +55,6 @@
 #include <linux/completion.h>
 
 #include <linux/types.h>
-#include <linux/sched.h>
 #include <linux/interrupt.h>
 #include <linux/mutex.h>
 #include <asm/dma.h>
diff --git a/dvb-core/dvb_ca_en50221.c b/dvb-core/dvb_ca_en50221.c
index 3738ff5..2c0bdfe 100644
--- a/dvb-core/dvb_ca_en50221.c
+++ b/dvb-core/dvb_ca_en50221.c
@@ -35,7 +35,11 @@
 #include <linux/vmalloc.h>
 #include <linux/delay.h>
 #include <linux/spinlock.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
+#include <linux/sched/signal.h>
+#else
 #include <linux/sched.h>
+#endif
 #include <linux/kthread.h>
 
 #include "dvb_ca_en50221.h"
diff --git a/dvb-core/dvb_demux.c b/dvb-core/dvb_demux.c
index 3485655..4560db0 100644
--- a/dvb-core/dvb_demux.c
+++ b/dvb-core/dvb_demux.c
@@ -21,7 +21,11 @@
  *
  */
 
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
+#include <linux/sched/signal.h>
+#else
 #include <linux/sched.h>
+#endif
 #include <linux/spinlock.h>
 #include <linux/slab.h>
 #include <linux/vmalloc.h>
diff --git a/dvb-core/dvb_frontend.h b/dvb-core/dvb_frontend.h
index a8df38f..6883a61 100644
--- a/dvb-core/dvb_frontend.h
+++ b/dvb-core/dvb_frontend.h
@@ -29,7 +29,11 @@
 #define _DVB_FRONTEND_H_
 
 #include <linux/types.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
+#include <linux/sched/signal.h>
+#else
 #include <linux/sched.h>
+#endif
 #include <linux/ioctl.h>
 #include <linux/i2c.h>
 #include <linux/module.h>

From 4070713556b6132caf2a7f684e5d00bb6969899c Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 10 Apr 2017 11:52:49 +0200
Subject: [PATCH 34/47] more 4.11 fixes

---
 dvb-core/dvb_ca_en50221.c | 1 +
 dvb-core/dvb_demux.c      | 1 +
 dvb-core/dvb_frontend.h   | 1 +
 3 files changed, 3 insertions(+)

diff --git a/dvb-core/dvb_ca_en50221.c b/dvb-core/dvb_ca_en50221.c
index 2c0bdfe..cefe881 100644
--- a/dvb-core/dvb_ca_en50221.c
+++ b/dvb-core/dvb_ca_en50221.c
@@ -35,6 +35,7 @@
 #include <linux/vmalloc.h>
 #include <linux/delay.h>
 #include <linux/spinlock.h>
+#include <linux/version.h>
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
 #include <linux/sched/signal.h>
 #else
diff --git a/dvb-core/dvb_demux.c b/dvb-core/dvb_demux.c
index 4560db0..43d4fcf 100644
--- a/dvb-core/dvb_demux.c
+++ b/dvb-core/dvb_demux.c
@@ -21,6 +21,7 @@
  *
  */
 
+#include <linux/version.h>
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
 #include <linux/sched/signal.h>
 #else
diff --git a/dvb-core/dvb_frontend.h b/dvb-core/dvb_frontend.h
index 6883a61..1a1af78 100644
--- a/dvb-core/dvb_frontend.h
+++ b/dvb-core/dvb_frontend.h
@@ -29,6 +29,7 @@
 #define _DVB_FRONTEND_H_
 
 #include <linux/types.h>
+#include <linux/version.h>
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
 #include <linux/sched/signal.h>
 #else

From 8931ae4d9ef42bfb9bdea01edeebc03e1ac36f50 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 10 Apr 2017 11:55:44 +0200
Subject: [PATCH 35/47] add frequency and center frequency setting for SDR
 modulator

---
 ddbridge/ddbridge-mod.c | 101 ++++++++++++++++++++++++++++++----------
 include/linux/dvb/mod.h |   1 +
 2 files changed, 78 insertions(+), 24 deletions(-)

diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index 545cd21..9761464 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -1,7 +1,7 @@
 /*
  * ddbridge.c: Digital Devices PCIe bridge driver
  *
- * Copyright (C) 2010-2015 Digital Devices GmbH
+ * Copyright (C) 2010-2017 Digital Devices GmbH
  *                         Marcus Metzler <mocm@metzlerbros.de>
  *                         Ralph Metzler <rjkm@metzlerbros.de>
  *
@@ -1481,14 +1481,84 @@ void ddbridge_mod_rate_handler(unsigned long data)
 		PCRAdjustExtFrac, PCRCorr, mod->PCRIncrement);
 }
 
-static int mod_set_ari(struct ddb_mod *mod, u32 rate)
+static int mod3_set_base_frequency(struct ddb *dev, u32 frequency)
+{
+	u64 tmp;
+	
+	if (frequency % 1000)
+		return -EINVAL;
+	if ((frequency < 114000000) || (frequency > 874000000))
+		return -EINVAL;
+	dev->mod_base.frequency = frequency;
+	tmp = frequency;
+	tmp <<= 33;
+	tmp = div64_s64(tmp, 4915200000);
+	printk("set base frequency = %u  regs = 0x%08llx\n", frequency, tmp);
+	ddbwritel(dev, (u32) tmp, RFDAC_FCW);
+	return 0;
+}
+
+static void mod3_set_cfcw(struct ddb_mod *mod, u32 f)
+{
+	struct ddb *dev = mod->port->dev;
+	s32 freq = f;
+	s32 dcf = dev->mod_base.frequency;
+	s64 tmp, srdac = 245760000;
+	u32 cfcw;
+	
+	tmp = ((s64) (freq - dcf)) << 32;
+	tmp = div64_s64(tmp, srdac);
+	cfcw = (u32) tmp;
+	printk("f=%u cfcw = %08x nr = %u\n", f, cfcw, mod->port->nr);
+	ddbwritel(dev, cfcw, SDR_CHANNEL_CFCW(mod->port->nr));
+}
+
+static int mod3_set_frequency(struct ddb_mod *mod, u32 frequency)
+{
+	struct ddb *dev = mod->port->dev;
+	
+#if 0
+	if (frequency % 1000)
+		return -EINVAL;
+	if ((frequency < 114000000) || (frequency > 874000000))
+		return -EINVAL;
+	if (frequency > dev->mod_base.frequency)
+		if (frequency - dev->mod_base.frequency > 100000000)
+			return -EINVAL;
+	else
+		if (dev->mod_base.frequency - frequency > 100000000)
+			return -EINVAL;
+#endif
+	mod3_set_cfcw(mod, frequency);
+	return 0;
+}
+
+static int mod3_set_ari(struct ddb_mod *mod, u32 rate)
 {
 	ddbwritel(mod->port->dev, rate, SDR_CHANNEL_ARICW(mod->port->nr));
 	return 0;
 }
 
+
+static int mod3_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
+{
+	switch(tvp->cmd) {
+	case MODULATOR_OUTPUT_ARI:
+		return mod3_set_ari(mod, tvp->u.data);
+
+	case MODULATOR_FREQUENCY:
+		return mod3_set_frequency(mod, tvp->u.data);
+
+	case MODULATOR_BASE_FREQUENCY:
+		return mod3_set_base_frequency(mod->port->dev, tvp->u.data);
+	}
+	return -EINVAL;
+}
+
 static int mod_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
 {
+	if (mod->port->dev->link[0].info->version == 3)
+		return mod3_prop_proc(mod, tvp);
 	switch(tvp->cmd) {
 	case MODULATOR_SYMBOL_RATE:
 		return mod_set_symbolrate(mod, tvp->u.data);
@@ -1505,8 +1575,6 @@ static int mod_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
 	case MODULATOR_INPUT_BITRATE:
 		return mod_set_ibitrate(mod, tvp->u.data);
 
-	case MODULATOR_OUTPUT_ARI:
-		return mod_set_ari(mod, tvp->u.data);
 	}
 	return 0;
 }
@@ -1518,7 +1586,9 @@ int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg)
 	struct ddb *dev = output->port->dev;
 	struct ddb_mod *mod = &dev->mod[output->nr];
 	int ret = 0;
-
+	
+	if (dev->link[0].info->version == 3 && cmd != FE_SET_PROPERTY)
+		return -EINVAL;
 	switch (cmd) {
 	case FE_SET_PROPERTY:
 	{
@@ -1666,8 +1736,6 @@ static void mod_set_sdr_table(struct ddb_mod *mod, u32 *tab, u32 len)
 		ddbwritel(dev, tab[i], SDR_CHANNEL_SETFIR(mod->port->nr));
 }
 
-
-
 static int rfdac_init(struct ddb *dev)
 {
 	int i;
@@ -1716,22 +1784,6 @@ static int rfdac_init(struct ddb *dev)
 	return 0;
 }
 
-static void mod_set_cfcw(struct ddb_mod *mod, int i)
-{
-	struct ddb *dev = mod->port->dev;
-	s32 freq = 182250000 + 7000000 * i;
-	s32 dcf = 188000000;
-	s64 tmp, srdac = 245760000;
-	u32 cfcw;
-	
-	tmp = ((s64) (freq - dcf)) << 32;
-	tmp = div64_s64(tmp, srdac);
-	cfcw = (u32) tmp;
-	printk("cfcw = %08x nr = %u\n", cfcw, mod->port->nr);
-	ddbwritel(dev, cfcw, SDR_CHANNEL_CFCW(mod->port->nr));
-}
-
-
 static int mod_init_3(struct ddb *dev, u32 Frequency)
 {
 	int streams = dev->link[0].info->port_num;
@@ -1758,13 +1810,14 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 	ddbwritel(dev, 0x1800, 0x244);
 	ddbwritel(dev, 0x01, 0x240);
 	//msleep(500);
+	mod3_set_base_frequency(dev, 188000000);
 	for (i = 0; i < streams; i++) {
 		struct ddb_mod *mod = &dev->mod[i];
 
 		ddbwritel(dev, 0x00, SDR_CHANNEL_CONTROL(i));
 		ddbwritel(dev, 0x06, SDR_CHANNEL_CONFIG(i));
 		ddbwritel(dev, 0x70800000, SDR_CHANNEL_ARICW(i));
-		mod_set_cfcw(mod, i);
+		mod3_set_frequency(mod, 182250000 + 7000000 * i);
 
 		ddbwritel(dev, 0x00011f80, SDR_CHANNEL_RGAIN(i));
 		ddbwritel(dev, 0x00001000, SDR_CHANNEL_FM1GAIN(i));
diff --git a/include/linux/dvb/mod.h b/include/linux/dvb/mod.h
index 4889582..b950197 100644
--- a/include/linux/dvb/mod.h
+++ b/include/linux/dvb/mod.h
@@ -25,6 +25,7 @@ struct dvb_mod_channel_params {
 #define MODULATOR_FREQUENCY	  3
 #define MODULATOR_MODULATION	  4   
 #define MODULATOR_SYMBOL_RATE	  5   /* Hz */
+#define MODULATOR_BASE_FREQUENCY  6
 #define MODULATOR_ATTENUATOR     32  
 #define MODULATOR_INPUT_BITRATE  33  /* Hz */
 #define MODULATOR_PCR_MODE       34  /* 1=pcr correction enabled */

From bfd1f1979d00c9ffc13dd0e3ff82b1ebb13ecf96 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Mon, 10 Apr 2017 17:32:16 +0200
Subject: [PATCH 36/47] swapped if/else

---
 ddbridge/ddbridge.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ddbridge/ddbridge.c b/ddbridge/ddbridge.c
index c57bb68..5c2b2a7 100644
--- a/ddbridge/ddbridge.c
+++ b/ddbridge/ddbridge.c
@@ -119,9 +119,9 @@ static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
 	if (msi && pci_msi_enabled()) {
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0))
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
-		stat = pci_enable_msi_range(dev->pdev, 1, nr);
-#else
 		stat = pci_alloc_irq_vectors(dev->pdev, 1, nr, PCI_IRQ_MSI);
+#else
+		stat = pci_enable_msi_range(dev->pdev, 1, nr);
 #endif
 		if (stat >= 1) {
 			dev->msi = stat;

From 8a98bd88cd1aa99514b317533b09fdd4c0b203c0 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Sat, 15 Apr 2017 11:06:16 +0200
Subject: [PATCH 37/47] allow wideband frequencies

---
 frontends/mxl5xx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/frontends/mxl5xx.c b/frontends/mxl5xx.c
index 949e2b9..f284c52 100644
--- a/frontends/mxl5xx.c
+++ b/frontends/mxl5xx.c
@@ -841,8 +841,8 @@ static struct dvb_frontend_ops mxl_ops = {
 	.xbar   = { 4, 0, 8 }, /* tuner_max, demod id, demod_max */
 	.info = {
 		.name			= "MXL5XX",
-		.frequency_min		= 950000,
-		.frequency_max		= 2150000,
+		.frequency_min		= 300000,
+		.frequency_max		= 2350000,
 		.frequency_stepsize	= 0,
 		.frequency_tolerance	= 0,
 		.symbol_rate_min	= 1000000,

From b3b7a0ef2e8e088f51a755aef58686d35572aacf Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Sun, 16 Apr 2017 14:55:00 +0200
Subject: [PATCH 38/47] cleanup old code

---
 ddbridge/ddbridge-mod.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index 9761464..7783d3a 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -1798,7 +1798,6 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 		ret = rfdac_init(dev);
 	if (ret)
 		pr_err("DDBridge: RFDAC setup failed\n");
- 	//ddbwritel(dev, 0x01, JESD204B_BASE);
 
 	for (i = 0; i < streams; i++) {
 		struct ddb_mod *mod = &dev->mod[i];
@@ -1809,7 +1808,7 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 	}
 	ddbwritel(dev, 0x1800, 0x244);
 	ddbwritel(dev, 0x01, 0x240);
-	//msleep(500);
+
 	mod3_set_base_frequency(dev, 188000000);
 	for (i = 0; i < streams; i++) {
 		struct ddb_mod *mod = &dev->mod[i];

From f44a9dfcbd8a16717b598dad08135213dc3dfd3b Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Sun, 16 Apr 2017 21:20:52 +0200
Subject: [PATCH 39/47] coding style fixes

---
 ddbridge/ddbridge-core.c | 224 +++++++++++++-----------
 ddbridge/ddbridge-i2c.c  |   2 +-
 ddbridge/ddbridge-mod.c  | 359 +++++++++++++++++----------------------
 ddbridge/ddbridge-ns.c   |   3 -
 ddbridge/ddbridge-regs.h |  56 +++---
 ddbridge/ddbridge.c      |  16 +-
 ddbridge/ddbridge.h      |   9 +-
 7 files changed, 318 insertions(+), 351 deletions(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index b8a7d06..153928e 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -419,7 +419,7 @@ static void ddb_set_dma_table(struct ddb_io *io)
 static void ddb_set_dma_tables(struct ddb *dev)
 {
 	u32 i;
-	
+
 	for (i = 0; i < DDB_MAX_PORT; i++) {
 		if (dev->port[i].input[0])
 			ddb_set_dma_table(dev->port[i].input[0]);
@@ -427,7 +427,7 @@ static void ddb_set_dma_tables(struct ddb *dev)
 			ddb_set_dma_table(dev->port[i].input[1]);
 		if (dev->port[i].output)
 			ddb_set_dma_table(dev->port[i].output);
-        }
+	}
 }
 
 
@@ -653,35 +653,35 @@ static void ddb_buffers_free(struct ddb *dev)
 }
 
 /*
-* Control:
-* 
-* Bit 0 - Enable TS
-*     1 - Reset
-*     2 - clock enable
-*     3 - clock phase
-*     4 - gap enable
-*     5 - send null packets on underrun
-*     6 - enable clock gating
-*     7 - set error bit on inserted null packets
-*     8-10 - fine adjust clock delay
-*     11- HS (high speed), if NCO mode=0: 0=72MHz 1=96Mhz
-*     12- enable NCO mode
-* 
-* Control 2:
-* 
-* Bit 0-6  : gap_size, Gap = (gap_size * 2) + 4
-*     16-31: HS = 0: Speed = 72 * Value / 8192 MBit/s
-*            HS = 1: Speed = 72 * 8 / (Value + 1) MBit/s (only bit 19-16 used)
-* 
-*/
+ * Control:
+ *
+ * Bit 0 - Enable TS
+ *     1 - Reset
+ *     2 - clock enable
+ *     3 - clock phase
+ *     4 - gap enable
+ *     5 - send null packets on underrun
+ *     6 - enable clock gating
+ *     7 - set error bit on inserted null packets
+ *     8-10 - fine adjust clock delay
+ *     11- HS (high speed), if NCO mode=0: 0=72MHz 1=96Mhz
+ *     12- enable NCO mode
+ *
+ * Control 2:
+ *
+ * Bit 0-6  : gap_size, Gap = (gap_size * 2) + 4
+ *     16-31: HS = 0: Speed = 72 * Value / 8192 MBit/s
+ *            HS = 1: Speed = 72 * 8 / (Value + 1) MBit/s (only bit 19-16 used)
+ *
+ */
 
 static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
 {
 	struct ddb *dev = output->port->dev;
 	u32 bitrate = output->port->obr, max_bitrate = 72000;
 	u32 gap = 4, nco = 0;
-	
-	*con = 0x1C; 
+
+	*con = 0x1C;
 	if (output->port->gap != 0xffffffff) {
 		flags |= 1;
 		gap = output->port->gap;
@@ -698,7 +698,8 @@ static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
 						*con |= 0x800;
 					else {
 						*con |= 0x1000;
-						nco = (bitrate * 8192 + 71999) / 72000;
+						nco = (bitrate *
+						       8192 + 71999) / 72000;
 					}
 				}
 			} else {
@@ -707,7 +708,7 @@ static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
 				if (bitrate <= 64000) {
 					max_bitrate = 64000;
 					nco = 8;
-				} else if( bitrate <= 72000) {
+				} else if (bitrate <= 72000) {
 					max_bitrate = 72000;
 					nco = 7;
 				} else {
@@ -736,7 +737,6 @@ static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
 			gap = 127;
 	}
 	*con2 = (nco << 16) | gap;
-	 return;
 }
 
 static void ddb_output_start(struct ddb_output *output)
@@ -744,7 +744,7 @@ static void ddb_output_start(struct ddb_output *output)
 	struct ddb *dev = output->port->dev;
 	u32 con = 0x11c, con2 = 0;
 
-	printk("Channel Base = %08x\n", output->regs);
+	pr_info("Channel Base = %08x\n", output->regs);
 	if (output->dma) {
 		spin_lock_irq(&output->dma->lock);
 		output->dma->cbuf = 0;
@@ -811,7 +811,8 @@ static void ddb_input_stop(struct ddb_input *input)
 		spin_unlock_irq(&input->dma->lock);
 	}
 	/*printk("input_stop %u.%u.%u\n",
-	  dev->nr, input->port->lnr, input->nr);*/
+	 *  dev->nr, input->port->lnr, input->nr);
+	 */
 }
 
 static void ddb_input_start(struct ddb_input *input)
@@ -976,7 +977,8 @@ static ssize_t ddb_output_write(struct ddb_output *output,
 			dma_sync_single_for_device(dev->dev,
 						   output->dma->pbuf[
 							   output->dma->cbuf],
-						   output->dma->size, DMA_TO_DEVICE);
+						   output->dma->size,
+						   DMA_TO_DEVICE);
 		left -= len;
 		buf += len;
 		output->dma->coff += len;
@@ -1106,8 +1108,10 @@ static size_t ddb_input_read(struct ddb_input *input,
 			free = left;
 		if (alt_dma)
 			dma_sync_single_for_cpu(dev->dev,
-						input->dma->pbuf[input->dma->cbuf],
-						input->dma->size, DMA_FROM_DEVICE);
+						input->dma->pbuf[
+							input->dma->cbuf],
+						input->dma->size,
+						DMA_FROM_DEVICE);
 		ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] +
 				   input->dma->coff, free);
 		if (ret)
@@ -1656,7 +1660,8 @@ static int lnb_command(struct ddb *dev, u32 link, u32 lnb, u32 cmd)
 		msleep(20);
 	}
 	if (c == 10)
-		pr_info("DDBridge: lnb_command lnb = %08x  cmd = %08x\n", lnb, cmd);
+		pr_info("DDBridge: lnb_command lnb = %08x  cmd = %08x\n",
+			lnb, cmd);
 	return 0;
 }
 
@@ -1698,13 +1703,15 @@ static int lnb_send_diseqc(struct ddb *dev, u32 link, u32 input,
 	return 0;
 }
 
-static int lnb_set_sat(struct ddb *dev, u32 link, u32 input, u32 sat, u32 band, u32 hor)
+static int lnb_set_sat(struct ddb *dev, u32 link,
+		       u32 input, u32 sat, u32 band, u32 hor)
 {
 	struct dvb_diseqc_master_cmd cmd = {
 		.msg = {0xe0, 0x10, 0x38, 0xf0, 0x00, 0x00},
 		.msg_len = 4
 	};
-	cmd.msg[3] = 0xf0 | ( ((sat << 2) & 0x0c) | (band ? 1 : 0) | (hor ? 2 : 0));
+	cmd.msg[3] = 0xf0 | (((sat << 2) & 0x0c) |
+			     (band ? 1 : 0) | (hor ? 2 : 0));
 	return lnb_send_diseqc(dev, link, input, &cmd);
 }
 
@@ -2529,7 +2536,8 @@ static int init_xo2_ci(struct ddb_port *port)
 			port->nr, data[0]);
 		return -1;
 	}
-	pr_info("DDBridge: Port %d: DuoFlex CI %u.%u\n", port->nr, data[0], data[1]);
+	pr_info("DDBridge: Port %d: DuoFlex CI %u.%u\n",
+		port->nr, data[0], data[1]);
 
 	i2c_read_reg(i2c, 0x10, 0x08, &val);
 	if (val != 0) {
@@ -2615,15 +2623,15 @@ static void ddb_port_probe(struct ddb_port *port)
 		port->class = DDB_PORT_MOD;
 		return;
 	}
-	
+
 	if (dev->link[l].info->type == DDB_OCTOPRO_HDIN) {
-		if( port->nr == 0 ) {
+		if (port->nr == 0) {
 			dev->link[l].info->type = DDB_OCTOPUS;
 			port->name = "HDIN";
 			port->class = DDB_PORT_LOOP;
 		}
 		return;
-	}   
+	}
 
 	if (dev->link[l].info->type == DDB_OCTOPUS_MAX) {
 		port->name = "DUAL DVB-S2 MAX";
@@ -2657,7 +2665,7 @@ static void ddb_port_probe(struct ddb_port *port)
 			ddbwritel(dev, I2C_SPEED_400,
 				  port->i2c->regs + I2C_TIMING);
 		} else {
-			pr_info(KERN_INFO "DDBridge: Port %d: Uninitialized DuoFlex\n",
+			pr_info("DDBridge: Port %d: Uninitialized DuoFlex\n",
 			       port->nr);
 			return;
 		}
@@ -3214,7 +3222,8 @@ static void input_write_dvb(struct ddb_input *input,
 
 	dma = dma2 = input->dma;
 	/* if there also is an output connected, do not ACK.
-	   input_write_output will ACK. */
+	 * input_write_output will ACK.
+	 */
 	if (input->redo) {
 		dma2 = input->redo->dma;
 		ack = 0;
@@ -3229,7 +3238,7 @@ static void input_write_dvb(struct ddb_input *input,
 			dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf],
 						dma2->size, DMA_FROM_DEVICE);
 #if 0
-		pr_info("DDBridge: %02x %02x %02x %02x \n",
+		pr_info("DDBridge: %02x %02x %02x %02x\n",
 			dma2->vbuf[dma->cbuf][0], dma2->vbuf[dma->cbuf][1],
 			dma2->vbuf[dma->cbuf][2], dma2->vbuf[dma->cbuf][3]);
 #endif
@@ -3286,8 +3295,9 @@ static void input_handler(unsigned long data)
 
 
 	/* If there is no input connected, input_tasklet() will
-	   just copy pointers and ACK. So, there is no need to go
-	   through the tasklet scheduler. */
+	 * just copy pointers and ACK. So, there is no need to go
+	 * through the tasklet scheduler.
+	 */
 #ifdef DDB_USE_WORK
 	if (input->redi)
 		queue_work(ddb_wq, &dma->work);
@@ -3342,7 +3352,7 @@ static void ddb_dma_init(struct ddb_io *io, int nr, int out)
 {
 	struct ddb_dma *dma;
 	struct ddb_regmap *rm = io_regmap(io, 0);
-	
+
 	dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr];
 	io->dma = dma;
 	dma->io = io;
@@ -3390,7 +3400,8 @@ static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr)
 	rm = io_regmap(input, 1);
 	input->regs = DDB_LINK_TAG(port->lnr) |
 		(rm->input->base + rm->input->size * nr);
-	pr_debug("DDBridge: init link %u, input %u, regs %08x\n", port->lnr, nr, input->regs); 
+	pr_debug("DDBridge: init link %u, input %u, regs %08x\n",
+		 port->lnr, nr, input->regs);
 	if (dev->has_dma) {
 		struct ddb_regmap *rm0 = io_regmap(input, 0);
 		u32 base = rm0->irq_base_idma;
@@ -3398,9 +3409,9 @@ static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr)
 
 		if (port->lnr)
 			dma_nr += 32 + (port->lnr - 1) * 8;
-		
+
 		pr_debug("DDBridge: init link %u, input %u, handler %u\n",
-			 port->lnr, nr, dma_nr + base); 
+			 port->lnr, nr, dma_nr + base);
 		dev->handler[0][dma_nr + base] = input_handler;
 		dev->handler_data[0][dma_nr + base] = (unsigned long) input;
 		ddb_dma_init(input, dma_nr, 0);
@@ -3420,7 +3431,7 @@ static void ddb_output_init(struct ddb_port *port, int nr)
 	output->regs = DDB_LINK_TAG(port->lnr) |
 		(rm->output->base + rm->output->size * nr);
 	pr_debug("DDBridge: init link %u, output %u, regs %08x\n",
-		 port->lnr, nr, output->regs); 
+		 port->lnr, nr, output->regs);
 	if (dev->has_dma) {
 		struct ddb_regmap *rm0 = io_regmap(output, 0);
 		u32 base = rm0->irq_base_odma;
@@ -3587,18 +3598,18 @@ static void ddb_ports_release(struct ddb *dev)
 		dev->handler[0][_nr](dev->handler_data[0][_nr]); } \
 	while (0)
 
-#define IRQ_HANDLE_BYTE(_n) \
-	if (s & (0x000000ff << ((_n) & 0x1f))) {	\
-		IRQ_HANDLE(0 + _n); \
-		IRQ_HANDLE(1 + _n); \
-		IRQ_HANDLE(2 + _n); \
-		IRQ_HANDLE(3 + _n); \
-		IRQ_HANDLE(4 + _n); \
-		IRQ_HANDLE(5 + _n); \
-		IRQ_HANDLE(6 + _n); \
-		IRQ_HANDLE(7 + _n); \
+#define IRQ_HANDLE_BYTE(_n) { \
+	if (s & (0x000000ff << ((_n) & 0x1f))) { \
+		IRQ_HANDLE(0 + (_n)); \
+		IRQ_HANDLE(1 + (_n)); \
+		IRQ_HANDLE(2 + (_n)); \
+		IRQ_HANDLE(3 + (_n)); \
+		IRQ_HANDLE(4 + (_n)); \
+		IRQ_HANDLE(5 + (_n)); \
+		IRQ_HANDLE(6 + (_n)); \
+		IRQ_HANDLE(7 + (_n)); \
+	} \
 	}
-	
 
 static void irq_handle_msg(struct ddb *dev, u32 s)
 {
@@ -3719,20 +3730,20 @@ static irqreturn_t irq_handle_v2_n(struct ddb *dev, u32 n)
 	if (!s)
 		return IRQ_NONE;
 	ddbwritel(dev, s, reg);
-	
+
 	if ((s & 0x000000ff)) {
-		IRQ_HANDLE( 0 + off);
-		IRQ_HANDLE( 1 + off);
-		IRQ_HANDLE( 2 + off);
-		IRQ_HANDLE( 3 + off);
-		IRQ_HANDLE( 4 + off);
-		IRQ_HANDLE( 5 + off);
-		IRQ_HANDLE( 6 + off);
-		IRQ_HANDLE( 7 + off);
+		IRQ_HANDLE(0 + off);
+		IRQ_HANDLE(1 + off);
+		IRQ_HANDLE(2 + off);
+		IRQ_HANDLE(3 + off);
+		IRQ_HANDLE(4 + off);
+		IRQ_HANDLE(5 + off);
+		IRQ_HANDLE(6 + off);
+		IRQ_HANDLE(7 + off);
 	}
 	if ((s & 0x0000ff00)) {
-		IRQ_HANDLE( 8 + off);
-		IRQ_HANDLE( 9 + off);
+		IRQ_HANDLE(8 + off);
+		IRQ_HANDLE(9 + off);
 		IRQ_HANDLE(10 + off);
 		IRQ_HANDLE(11 + off);
 		IRQ_HANDLE(12 + off);
@@ -3862,7 +3873,7 @@ static int nsd_do_ioctl(struct file *file, unsigned int cmd, void *parg)
 			return -EINVAL;
 		ctrl = (input->port->lnr << 16) | ((input->nr & 7) << 8) |
 			((ts->filter_mask & 3) << 2);
-		/*pr_info("DDBridge: GET_TS %u.%u\n", input->port->lnr, input->nr);*/
+
 		if (ddbreadl(dev, TS_CAPTURE_CONTROL) & 1) {
 			pr_info("DDBridge: ts capture busy\n");
 			return -EBUSY;
@@ -4463,7 +4474,7 @@ static ssize_t fan_store(struct device *device, struct device_attribute *d,
 			 const char *buf, size_t count)
 {
 	struct ddb *dev = dev_get_drvdata(device);
-	unsigned val;
+	u32 val;
 
 	if (sscanf(buf, "%u\n", &val) != 1)
 		return -EINVAL;
@@ -4493,7 +4504,7 @@ static ssize_t temp_show(struct device *device,
 	s32 temp, temp2, temp3;
 	int i;
 	u8 tmp[2];
-	
+
 	if (link->info->type == DDB_MOD) {
 		if (link->info->version >= 2) {
 			temp = 0xffff & ddbreadl(dev, TEMPMON2_BOARD);
@@ -4504,7 +4515,7 @@ static ssize_t temp_show(struct device *device,
 
 			temp3 = 0xffff & ddbreadl(dev, TEMPMON2_QAMCORE);
 			temp3 = (temp3 * 1000) >> 8;
-			
+
 			return sprintf(buf, "%d %d %d\n", temp, temp2, temp3);
 		}
 		ddbwritel(dev, 1, TEMPMON_CONTROL);
@@ -4639,7 +4650,7 @@ static ssize_t led_store(struct device *device,
 {
 	struct ddb *dev = dev_get_drvdata(device);
 	int num = attr->attr.name[3] - 0x30;
-	unsigned val;
+	u32 val;
 
 	if (sscanf(buf, "%u\n", &val) != 1)
 		return -EINVAL;
@@ -4799,7 +4810,7 @@ static ssize_t obr_show(struct device *device,
 {
 	struct ddb *dev = dev_get_drvdata(device);
 	int num = attr->attr.name[3] - 0x30;
-	
+
 	return sprintf(buf, "%d\n", dev->port[num].obr);
 
 }
@@ -4810,7 +4821,7 @@ static ssize_t obr_store(struct device *device, struct device_attribute *attr,
 	struct ddb *dev = dev_get_drvdata(device);
 	int num = attr->attr.name[3] - 0x30;
 	unsigned int val;
-	
+
 	if (sscanf(buf, "%u\n", &val) != 1)
 		return -EINVAL;
 	if (val > 96000)
@@ -5016,7 +5027,8 @@ static void ddb_device_attrs_del(struct ddb *dev)
 	for (i = 0; i < 4; i++)
 		if (dev->link[i].info &&
 		    dev->link[i].info->tempmon_irq)
-			device_remove_file(dev->ddb_dev, &ddb_attrs_fanspeed[i]);
+			device_remove_file(dev->ddb_dev,
+					   &ddb_attrs_fanspeed[i]);
 	for (i = 0; i < dev->link[0].info->temp_num; i++)
 		device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]);
 	for (i = 0; i < dev->link[0].info->port_num; i++)
@@ -5128,7 +5140,7 @@ static void link_tasklet(unsigned long data)
 	struct ddb *dev = link->dev;
 	u32 s, tag = DDB_LINK_TAG(link->nr);
 	u32 l = link->nr;
-	
+
 	s = ddbreadl(dev, tag | INTERRUPT_STATUS);
 	pr_info("DDBridge: gtl_irq %08x = %08x\n", tag | INTERRUPT_STATUS, s);
 
@@ -5257,7 +5269,7 @@ static int ddb_gtl_init(struct ddb *dev)
 	u32 l, base = dev->link[0].info->regmap->irq_base_gtl;
 
 	dev->handler_data[0][base] = (unsigned long) dev;
-	dev->handler[0][base] = gtl_link_handler; 
+	dev->handler[0][base] = gtl_link_handler;
 	for (l = 1; l < dev->link[0].info->regmap->gtl->num + 1; l++)
 		ddb_gtl_init_link(dev, l);
 	return 0;
@@ -5270,8 +5282,9 @@ static int ddb_gtl_init(struct ddb *dev)
 static void tempmon_setfan(struct ddb_link *link)
 {
 	u32 temp, temp2, pwm;
-	
-	if ((ddblreadl(link, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0) {
+
+	if ((ddblreadl(link, TEMPMON_CONTROL) &
+	     TEMPMON_CONTROL_OVERTEMP) != 0) {
 		pr_info("DDBridge: Over temperature condition\n");
 		link->OverTemperatureError = 1;
 	}
@@ -5283,16 +5296,16 @@ static void tempmon_setfan(struct ddb_link *link)
 		temp2 = 0;
 	if (temp2 > temp)
 		temp = temp2;
-	
+
 	pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F;
 	if (pwm > 10)
-		pwm = 10;   
-	
+		pwm = 10;
+
 	if (temp >= link->temp_tab[pwm]) {
-		while( pwm < 10 && temp >= link->temp_tab[pwm + 1])
+		while (pwm < 10 && temp >= link->temp_tab[pwm + 1])
 			pwm += 1;
 	} else {
-		while( pwm > 1 && temp < link->temp_tab[pwm - 2])
+		while (pwm > 1 && temp < link->temp_tab[pwm - 2])
 			pwm -= 1;
 	}
 	ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
@@ -5302,7 +5315,7 @@ static void tempmon_setfan(struct ddb_link *link)
 static void temp_handler(unsigned long data)
 {
 	struct ddb_link *link = (struct ddb_link *) data;
-	
+
 	spin_lock(&link->temp_lock);
 	tempmon_setfan(link);
 	spin_unlock(&link->temp_lock);
@@ -5313,12 +5326,14 @@ static int tempmon_init(struct ddb_link *link, int FirstTime)
 	struct ddb *dev = link->dev;
 	int status = 0;
 	u32 l = link->nr;
-	
+
 	spin_lock_irq(&link->temp_lock);
 	if (FirstTime) {
-		static u8 TemperatureTable[11] = {30,35,40,45,50,55,60,65,70,75,80};
-		
-		memcpy(link->temp_tab, TemperatureTable, sizeof(TemperatureTable));
+		static u8 TemperatureTable[11] = {
+			30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80};
+
+		memcpy(link->temp_tab, TemperatureTable,
+		       sizeof(TemperatureTable));
 	}
 	dev->handler[l][link->info->tempmon_irq] = temp_handler;
 	dev->handler_data[l][link->info->tempmon_irq] = (unsigned long) link;
@@ -5326,9 +5341,10 @@ static int tempmon_init(struct ddb_link *link, int FirstTime)
 			  TEMPMON_CONTROL_INTENABLE),
 		   TEMPMON_CONTROL);
 	ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL);
-	
+
 	link->OverTemperatureError =
-		((ddblreadl(link, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0);
+		((ddblreadl(link, TEMPMON_CONTROL) &
+		  TEMPMON_CONTROL_OVERTEMP) != 0);
 	if (link->OverTemperatureError)	{
 		pr_info("DDBridge: Over temperature condition\n");
 		status = -1;
@@ -5341,7 +5357,7 @@ static int tempmon_init(struct ddb_link *link, int FirstTime)
 static int ddb_init_tempmon(struct ddb_link *link)
 {
 	struct ddb_info *info = link->info;
-	
+
 	if (!info->tempmon_irq)
 		return 0;
 	if (info->type == DDB_OCTOPUS_MAX ||
@@ -5371,7 +5387,7 @@ static int ddb_init_boards(struct ddb *dev)
 			l,
 			dev->link[l].ids.vendor, dev->link[l].ids.device,
 			dev->link[l].ids.subvendor, dev->link[l].ids.subdevice);
-		
+
 		if (info->board_control) {
 			ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL);
 			msleep(100);
@@ -5393,7 +5409,7 @@ static int ddb_init(struct ddb *dev)
 	mutex_init(&dev->link[0].flash_mutex);
 	if (no_init) {
 		ddb_device_create(dev);
-		return 0;	
+		return 0;
 	}
 	if (dev->link[0].info->ns_num) {
 		ddbwritel(dev, 1, ETHER_CONTROL);
@@ -5401,7 +5417,7 @@ static int ddb_init(struct ddb *dev)
 		ddbwritel(dev, 14 + (dev->vlan ? 4 : 0), ETHER_LENGTH);
 	}
 	mutex_init(&dev->link[0].lnb.lock);
-	
+
 	if (dev->link[0].info->regmap->gtl)
 		ddb_gtl_init(dev);
 
@@ -5452,12 +5468,14 @@ static void ddb_reset_ios(struct ddb *dev)
 {
 	u32 i;
 	struct ddb_regmap *rm = dev->link[0].info->regmap;
-	
+
 	if (rm->input)
 		for (i = 0; i < rm->input->num; i++)
-			ddb_reset_io(dev, rm->input->base + i * rm->input->size);
+			ddb_reset_io(dev,
+				     rm->input->base + i * rm->input->size);
 	if (rm->output)
 		for (i = 0; i < rm->output->num; i++)
-			ddb_reset_io(dev, rm->output->base + i * rm->output->size);
+			ddb_reset_io(dev,
+				     rm->output->base + i * rm->output->size);
 	usleep_range(5000, 6000);
 }
diff --git a/ddbridge/ddbridge-i2c.c b/ddbridge/ddbridge-i2c.c
index 6fc63d5..8691eb9 100644
--- a/ddbridge/ddbridge-i2c.c
+++ b/ddbridge/ddbridge-i2c.c
@@ -169,7 +169,7 @@ static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
 			ddbcpyfrom(dev, msg[0].buf,
 				   i2c->rbuf, msg[0].len);
 			return num;
-		} 
+		}
 		ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
 		ddbwritel(dev, msg[0].len, i2c->regs + I2C_TASKLENGTH);
 		if (ddb_i2c_cmd(i2c, addr, 2))
diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index 7783d3a..549e210 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -76,57 +76,62 @@ inline s64 RoundPCRDown(s64 a)
 	return a & ~(HW_LSB_MASK - 1);
 }
 
-// Calculating KF, LF from Symbolrate
-//
-//  Symbolrate is usually calculated as (M/N) * 10.24 MS/s
-//  
-//   Common Values for M,N 
-//     J.83 Annex A,
-//     Euro Docsis  6.952 MS/s : M =   869, N =  1280
-//                  6.900 MS/s : M =   345, N =   512
-//                  6.875 MS/s : M =  1375, N =  2048
-//                  6.111 MS/s : M =  6111, N = 10240
-//     J.83 Annex B **
-//      QAM64       5.056941   : M =   401, N =   812
-//      QAM256      5.360537   : M =    78, N =   149
-//     J.83 Annex C **
-//                  5.309734   : M =  1889, N =  3643
-//
-//    For the present hardware 
-//      KF' = 256 * M 
-//      LF' = 225 * N 
-//       or
-//      KF' = Symbolrate in Hz
-//      LF' = 9000000
-//
-//      KF  = KF' / gcd(KF',LF')
-//      LF  = LF' / gcd(KF',LF')
-// Note: LF must not be a power of 2.
-//       Maximum value for KF,LF = 13421727 ( 0x7FFFFFF )
-//    ** using these M,N values will result in a small err (<5ppm)
-//       calculating KF,LF directly gives the exact normative result
-//       but with rather large KF,LF values
+/* Calculating KF, LF from Symbolrate
+ *
+ *  Symbolrate is usually calculated as (M/N) * 10.24 MS/s
+ *
+ *   Common Values for M,N
+ *     J.83 Annex A,
+ *     Euro Docsis  6.952 MS/s : M =   869, N =  1280
+ *                  6.900 MS/s : M =   345, N =   512
+ *                  6.875 MS/s : M =  1375, N =  2048
+ *                  6.111 MS/s : M =  6111, N = 10240
+ *     J.83 Annex B **
+ *      QAM64       5.056941   : M =   401, N =   812
+ *      QAM256      5.360537   : M =    78, N =   149
+ *     J.83 Annex C **
+ *                  5.309734   : M =  1889, N =  3643
+ *
+ *    For the present hardware
+ *      KF' = 256 * M
+ *      LF' = 225 * N
+ *       or
+ *      KF' = Symbolrate in Hz
+ *      LF' = 9000000
+ *
+ *      KF  = KF' / gcd(KF',LF')
+ *      LF  = LF' / gcd(KF',LF')
+ * Note: LF must not be a power of 2.
+ *       Maximum value for KF,LF = 13421727 ( 0x7FFFFFF )
+ *    ** using these M,N values will result in a small err (<5ppm)
+ *       calculating KF,LF directly gives the exact normative result
+ *       but with rather large KF,LF values
+ */
 
-static inline u32 gcd(u32 u,u32 v)
+static inline u32 gcd(u32 u, u32 v)
 {
-    int s = 0;
-    while (((u|v)&1) == 0) {
-	    s += 1;
-	    u >>= 1;
-	    v >>= 1;
-    }
-    while ((u&1) == 0)
-	    u >>= 1;
-    do {
-	    while ( (v&1) == 0 ) v >>= 1;
-	    if( u > v ) {
-		    u32 t = v;
-		    v = u;
-		    u = t;
-	    }
-	    v = v - u;
-    } while(v != 0);
-    return u << s;
+	int s = 0;
+
+	while (((u | v) & 1) == 0) {
+		s += 1;
+		u >>= 1;
+		v >>= 1;
+	}
+	while ((u & 1) == 0)
+		u >>= 1;
+	do {
+		while ((v & 1) == 0)
+			v >>= 1;
+		if (u > v) {
+			u32 t = v;
+
+			v = u;
+			u = t;
+		}
+		v = v - u;
+	} while (v != 0);
+
+	return (u << s);
 }
 
 /****************************************************************************/
@@ -136,14 +141,14 @@ static inline u32 gcd(u32 u,u32 v)
 static int mod_SendChannelCommand(struct ddb *dev, u32 Channel, u32 Command)
 {
 	u32 ControlReg = ddbreadl(dev, CHANNEL_CONTROL(Channel));
-	
+
 	ControlReg = (ControlReg & ~CHANNEL_CONTROL_CMD_MASK)|Command;
 	ddbwritel(dev, ControlReg, CHANNEL_CONTROL(Channel));
-	while(1) {
+	while (1) {
 		ControlReg = ddbreadl(dev, CHANNEL_CONTROL(Channel));
 		if (ControlReg == 0xFFFFFFFF)
 			return -EIO;
-		if((ControlReg & CHANNEL_CONTROL_CMD_STATUS) == 0)
+		if ((ControlReg & CHANNEL_CONTROL_CMD_STATUS) == 0)
 			break;
 	}
 	if (ControlReg & CHANNEL_CONTROL_ERROR_CMD)
@@ -173,7 +178,8 @@ void ddbridge_mod_output_stop(struct ddb_output *output)
 	mod->State = CM_IDLE;
 	mod->Control &= 0xfffffff0;
 	if (dev->link[0].info->version == 2)
-		mod_SendChannelCommand(dev, output->nr, CHANNEL_CONTROL_CMD_FREE);
+		mod_SendChannelCommand(dev, output->nr,
+				       CHANNEL_CONTROL_CMD_FREE);
 	ddbwritel(dev, mod->Control, CHANNEL_CONTROL(output->nr));
 #if 0
 	udelay(10);
@@ -216,13 +222,13 @@ static void mod_set_rateinc(struct ddb *dev, u32 chan)
 static void mod_calc_rateinc(struct ddb_mod *mod)
 {
 	u32 ri;
-	
+
 	pr_info("DDBridge: ibitrate %llu\n", mod->ibitrate);
 	pr_info("DDBridge: obitrate %llu\n", mod->obitrate);
-	
+
 	if (mod->ibitrate != 0) {
 		u64 d = mod->obitrate - mod->ibitrate;
-		
+
 		d = div64_u64(d, mod->obitrate >> 24);
 		if (d > 0xfffffe)
 			ri = 0xfffffe;
@@ -237,7 +243,7 @@ static void mod_calc_rateinc(struct ddb_mod *mod)
 
 static int mod_calc_obitrate(struct ddb_mod *mod)
 {
-	u64 ofac; 
+	u64 ofac;
 
 	ofac = (((u64) mod->symbolrate) << 32) * 188;
 	ofac = div_u64(ofac, 204);
@@ -263,15 +269,17 @@ static int mod_set_symbolrate(struct ddb_mod *mod, u32 srate)
 
 static u32 qamtab[6] = { 0x000, 0x600, 0x601, 0x602, 0x903, 0x604 };
 
-static int mod_set_modulation(struct ddb_mod *mod, enum fe_modulation modulation)
+static int mod_set_modulation(struct ddb_mod *mod,
+			      enum fe_modulation modulation)
 {
 	struct ddb *dev = mod->port->dev;
 
 	if (modulation > QAM_256 || modulation < QAM_16)
 		return -EINVAL;
 	mod->modulation = modulation;
-	if (dev->link[0].info->version < 2) 
-		ddbwritel(dev, qamtab[modulation], CHANNEL_SETTINGS(mod->port->nr));
+	if (dev->link[0].info->version < 2)
+		ddbwritel(dev, qamtab[modulation],
+			  CHANNEL_SETTINGS(mod->port->nr));
 	mod_calc_obitrate(mod);
 	return 0;
 }
@@ -279,7 +287,7 @@ static int mod_set_modulation(struct ddb_mod *mod, enum fe_modulation modulation
 static int mod_set_frequency(struct ddb_mod *mod, u32 frequency)
 {
 	u32 freq = frequency / 1000000;
-	
+
 	if (frequency % 1000000)
 		return -EINVAL;
 	if ((freq - 114) % 8)
@@ -324,58 +332,62 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 
 	mod->State = CM_STARTUP;
 	mod->StateCounter = CM_STARTUP_DELAY;
-	
+
 	if (dev->link[0].info->version == 3)
-		mod->Control = 0xfffffff0 & ddbreadl(dev, CHANNEL_CONTROL(output->nr));
+		mod->Control = 0xfffffff0 &
+			ddbreadl(dev, CHANNEL_CONTROL(output->nr));
 	else
 		mod->Control = 0;
 	ddbwritel(dev, mod->Control, CHANNEL_CONTROL(output->nr));
 	udelay(10);
-	ddbwritel(dev, mod->Control | CHANNEL_CONTROL_RESET, CHANNEL_CONTROL(output->nr));
+	ddbwritel(dev, mod->Control | CHANNEL_CONTROL_RESET,
+		  CHANNEL_CONTROL(output->nr));
 	udelay(10);
 	ddbwritel(dev, mod->Control, CHANNEL_CONTROL(output->nr));
 
-	//pr_info("DDBridge: CHANNEL_BASE = %08x\n", CHANNEL_BASE);
-	///pr_info("DDBridge: CHANNEL_CONTROL = %08x\n", CHANNEL_CONTROL(Channel));
 	if (dev->link[0].info->version == 2) {
-		//u32 Output = ((dev->mod_base.frequency - 114000000)/8000000 + Channel) % 96;
 		u32 Output = (mod->frequency - 114000000) / 8000000;
 		u32 KF = Symbolrate;
 		u32 LF = 9000000UL;
-		u32 d = gcd(KF,LF);
+		u32 d = gcd(KF, LF);
 		u32 checkLF;
 
 		ddbwritel(dev, mod->modulation - 1, CHANNEL_SETTINGS(Channel));
 		ddbwritel(dev, Output, CHANNEL_SETTINGS2(Channel));
-		
+
 		KF = KF / d;
 		LF = LF / d;
-		
-		while( (KF > KFLF_MAX) || (LF > KFLF_MAX) ) {
+
+		while ((KF > KFLF_MAX) || (LF > KFLF_MAX)) {
 			KF >>= 1;
 			LF >>= 1;
 		}
-		
+
 		checkLF = LF;
 		while ((checkLF & 1) == 0)
 			checkLF >>= 1;
 		if (checkLF <= 1)
 			return -EINVAL;
 
-		pr_info("DDBridge: KF=%u LF=%u Output=%u mod=%u\n", KF, LF, Output, mod->modulation);
+		pr_info("DDBridge: KF=%u LF=%u Output=%u mod=%u\n",
+			KF, LF, Output, mod->modulation);
 		ddbwritel(dev, KF, CHANNEL_KF(Channel));
 		ddbwritel(dev, LF, CHANNEL_LF(Channel));
-		
-		if (mod_SendChannelCommand(dev, Channel, CHANNEL_CONTROL_CMD_SETUP))
+
+		if (mod_SendChannelCommand(dev, Channel,
+					   CHANNEL_CONTROL_CMD_SETUP))
 			return -EINVAL;
 		mod->Control |= CHANNEL_CONTROL_ENABLE_DVB;
-	} else 	if (dev->link[0].info->version == 1) {
+	} else if (dev->link[0].info->version == 1) {
 		/* QAM: 600 601 602 903 604 = 16 32 64 128 256 */
 		/* ddbwritel(dev, 0x604, CHANNEL_SETTINGS(output->nr)); */
-		ddbwritel(dev, qamtab[mod->modulation], CHANNEL_SETTINGS(output->nr));
-		mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ | CHANNEL_CONTROL_ENABLE_DVB);
+		ddbwritel(dev, qamtab[mod->modulation],
+			  CHANNEL_SETTINGS(output->nr));
+		mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ |
+				 CHANNEL_CONTROL_ENABLE_DVB);
 	} else if (dev->link[0].info->version == 3) {
-		mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ | CHANNEL_CONTROL_ENABLE_DVB);
+		mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ |
+				 CHANNEL_CONTROL_ENABLE_DVB);
 	}
 	if (dev->link[0].info->version < 3) {
 		mod_set_rateinc(dev, output->nr);
@@ -385,7 +397,8 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 
 	ddbwritel(dev, mod->Control, CHANNEL_CONTROL(output->nr));
 	if (dev->link[0].info->version == 2)
-		if (mod_SendChannelCommand(dev, Channel, CHANNEL_CONTROL_CMD_UNMUTE))
+		if (mod_SendChannelCommand(dev, Channel,
+					   CHANNEL_CONTROL_CMD_UNMUTE))
 			return -EINVAL;
 	pr_info("DDBridge: mod_output_start %d.%d ctrl=%08x\n",
 		dev->nr, output->nr, mod->Control);
@@ -399,9 +412,11 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 static int mod_write_max2871(struct ddb *dev, u32 val)
 {
 	ddbwritel(dev, val, MAX2871_OUTDATA);
-	ddbwritel(dev, MAX2871_CONTROL_CE | MAX2871_CONTROL_WRITE, MAX2871_CONTROL);
-	while(1) {
+	ddbwritel(dev, MAX2871_CONTROL_CE | MAX2871_CONTROL_WRITE,
+		  MAX2871_CONTROL);
+	while (1) {
 		u32 ControlReg = ddbreadl(dev, MAX2871_CONTROL);
+
 		if (ControlReg == 0xFFFFFFFF)
 			return -EIO;
 		if ((ControlReg & MAX2871_CONTROL_WRITE) == 0)
@@ -423,14 +438,14 @@ static int mod_setup_max2871(struct ddb *dev, u32 *reg)
 	int status = 0;
 	int i, j;
 	u32 val;
-	
+
 	ddbwritel(dev, MAX2871_CONTROL_CE, MAX2871_CONTROL);
 	msleep(30);
 	for (i = 0; i < 2; i++) {
 		for (j = 5; j >= 0; j--) {
 			val = reg[j];
-			
-			if (j ==4)
+
+			if (j == 4)
 				val &= 0xFFFFFEDF;
 			status = mod_write_max2871(dev, reg[j]);
 			if (status)
@@ -452,19 +467,20 @@ static int mod_setup_max2871(struct ddb *dev, u32 *reg)
 	return status;
 }
 
-static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan, u32 MaxUsedChannels)
+static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan,
+			 u32 MaxUsedChannels)
 {
 	int status = 0;
 	u32 Capacity;
 	u32 tmp = ddbreadl(dev, FSM_STATUS);
-	
+
 	if ((tmp & FSM_STATUS_READY) == 0) {
 		status = mod_setup_max2871(dev, max2871_fsm);
 		if (status)
 			return status;
 		ddbwritel(dev, FSM_CMD_RESET, FSM_CONTROL);
-		msleep(10);
-		
+		msleep(20);
+
 		tmp = ddbreadl(dev, FSM_STATUS);
 		if ((tmp & FSM_STATUS_READY) == 0)
 			return -1;
@@ -473,23 +489,23 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan, u32 MaxUsedChannels
 	if (((tmp & FSM_STATUS_QAMREADY) != 0) &&
 	    ((Capacity & FSM_CAPACITY_INUSE) != 0))
 		return -EBUSY;
-	
+
 	ddbwritel(dev, FSM_CMD_SETUP, FSM_CONTROL);
-	msleep(10);
+	msleep(20);
 	tmp = ddbreadl(dev, FSM_STATUS);
-	
+
 	if ((tmp & FSM_STATUS_QAMREADY) == 0)
 		return -1;
-	
+
 	if (MaxUsedChannels == 0)
 		MaxUsedChannels = (Capacity & FSM_CAPACITY_CUR) >> 16;
 
 	pr_info("DDBridge: max used chan = %u\n", MaxUsedChannels);
-	if (MaxUsedChannels <= 1 )
+	if (MaxUsedChannels <= 1)
 		ddbwritel(dev, FSM_GAIN_N1, FSM_GAIN);
 	else if (MaxUsedChannels <= 2)
 		ddbwritel(dev, FSM_GAIN_N2, FSM_GAIN);
-	else if (MaxUsedChannels <= 4) 
+	else if (MaxUsedChannels <= 4)
 		ddbwritel(dev, FSM_GAIN_N4, FSM_GAIN);
 	else if (MaxUsedChannels <= 8)
 		ddbwritel(dev, FSM_GAIN_N8, FSM_GAIN);
@@ -507,84 +523,12 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan, u32 MaxUsedChannels
 
 static int mod_set_vga(struct ddb *dev, u32 Gain)
 {
-	if( Gain > 255 )
+	if (Gain > 255)
 		return -EINVAL;
 	ddbwritel(dev, Gain, RF_VGA);
 	return 0;
 }
 
-#if 0
-static int mod_get_vga(struct ddb *dev, u32 *pGain)
-{
-	*pGain = ddbreadl(dev, RF_VGA);
-	return 0;
-}
-
-static void TemperatureMonitorSetFan(struct ddb *dev)
-{
-	u32 tqam, pwm;
-	
-	if ((ddbreadl(dev, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0) {
-		pr_info("DDBridge: Over temperature condition\n");
-		dev->OverTemperatureError = 1;
-	}
-	tqam  = (ddbreadl(dev, TEMPMON2_QAMCORE) >> 8) & 0xFF;
-	if (tqam & 0x80)
-		tqam = 0;
-	
-	pwm = (ddbreadl(dev, TEMPMON_FANCONTROL) >> 8) & 0x0F;
-	if (pwm > 10)
-		pwm = 10;   
-	
-	if (tqam >= dev->temp_tab[pwm]) {
-		while( pwm < 10 && tqam >= dev->temp_tab[pwm + 1])
-			pwm += 1;
-	} else {
-		while( pwm > 1 && tqam < dev->temp_tab[pwm - 2])
-			pwm -= 1;
-	}
-	ddbwritel(dev, (pwm << 8), TEMPMON_FANCONTROL);
-}
-
-
-static void temp_handler(unsigned long data)
-{
-	struct ddb *dev = (struct ddb *) data;
-
-	pr_info("DDBridge: temp_handler\n");
-
-	spin_lock(&dev->temp_lock);
-	TemperatureMonitorSetFan(dev);
-	spin_unlock(&dev->temp_lock);
-}
-
-static int TemperatureMonitorInit(struct ddb *dev, int FirstTime) {
-	int status = 0;
-	
-	spin_lock_irq(&dev->temp_lock);
-	if (FirstTime) {
-		static u8 TemperatureTable[11] = {30,35,40,45,50,55,60,65,70,75,80};
-		
-		memcpy(dev->temp_tab, TemperatureTable, sizeof(TemperatureTable));
-	}
-	dev->handler[0][8] = temp_handler;
-	dev->handler_data[0][8] = (unsigned long) dev;
-	ddbwritel(dev, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN |
-			TEMPMON_CONTROL_INTENABLE),
-		  TEMPMON_CONTROL);
-	ddbwritel(dev, (3 << 8), TEMPMON_FANCONTROL);
-	
-	dev->OverTemperatureError =
-		((ddbreadl(dev, TEMPMON_CONTROL) & TEMPMON_CONTROL_OVERTEMP ) != 0);
-	if (dev->OverTemperatureError)	{
-		pr_info("DDBridge: Over temperature condition\n");
-		status = -1;
-	}
-	TemperatureMonitorSetFan(dev);
-	spin_unlock_irq(&dev->temp_lock);
-	return status;
-}
-#endif
 /****************************************************************************/
 /****************************************************************************/
 /****************************************************************************/
@@ -749,7 +693,8 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 		     ((u32)(Data[1] & 0xE0) >> 6)) + 1;
 		fDCO = fOut * (u64)(HSDiv * N);
 		m_fXtal = fDCO << 28;
-		pr_info("DDBridge: fxtal %016llx  rfreq %016llx\n", m_fXtal, RFreq);
+		pr_info("DDBridge: fxtal %016llx  rfreq %016llx\n",
+			m_fXtal, RFreq);
 
 		m_fXtal += RFreq >> 1;
 		m_fXtal = div64_u64(m_fXtal, RFreq);
@@ -950,9 +895,9 @@ static int mod_init_dac_input(struct ddb *dev)
 	Seek = 1;
 	for (Sample = 0; Sample < 32; Sample += 1) {
 		/* printk(" %2d: %d %2d %2d\n",
-		   Sample, SeekTable[Sample], SetTable[Sample],
-		   HldTable[Sample]);
-		*/
+		 * Sample, SeekTable[Sample], SetTable[Sample],
+		 * HldTable[Sample]);
+		 */
 
 		if (Sample1 == 0xFF && SeekTable[Sample] == 1 && Seek == 0)
 			Sample1 = Sample;
@@ -1244,7 +1189,8 @@ static int mod_init_1(struct ddb *dev, u32 Frequency)
 	FrequencyCH10 = flash->DataSet[0].FlatStart + 4;
 	DownFrequency = Frequency + 9 * 8 + FrequencyCH10 +
 		UP1Frequency + UP2Frequency;
-	pr_info("DDBridge: CH10 = %d, Down = %d\n", FrequencyCH10, DownFrequency);
+	pr_info("DDBridge: CH10 = %d, Down = %d\n",
+			FrequencyCH10, DownFrequency);
 
 	if ((FrequencyCH10 + 9 * 8) > (flash->DataSet[0].FlatEnd - 4)) {
 		pr_err("DDBridge: Frequency out of range %d\n", FrequencyCH10);
@@ -1296,10 +1242,10 @@ fail:
 #define FACTOR         (1ULL << 22)
 
 /*
-  double Increment =  FACTOR*PACKET_CLOCKS/double(m_OutputBitrate);
-  double Decrement =  FACTOR*PACKET_CLOCKS/double(m_InputBitrate);
-  27000000 * 1504 * 2^22 / (6900000 * 188 / 204) = 26785190066.1
-*/
+ * double Increment =  FACTOR*PACKET_CLOCKS/double(m_OutputBitrate);
+ * double Decrement =  FACTOR*PACKET_CLOCKS/double(m_InputBitrate);
+ * 27000000 * 1504 * 2^22 / (6900000 * 188 / 204) = 26785190066.1
+ */
 
 void ddbridge_mod_rate_handler(unsigned long data)
 {
@@ -1484,7 +1430,7 @@ void ddbridge_mod_rate_handler(unsigned long data)
 static int mod3_set_base_frequency(struct ddb *dev, u32 frequency)
 {
 	u64 tmp;
-	
+
 	if (frequency % 1000)
 		return -EINVAL;
 	if ((frequency < 114000000) || (frequency > 874000000))
@@ -1493,7 +1439,7 @@ static int mod3_set_base_frequency(struct ddb *dev, u32 frequency)
 	tmp = frequency;
 	tmp <<= 33;
 	tmp = div64_s64(tmp, 4915200000);
-	printk("set base frequency = %u  regs = 0x%08llx\n", frequency, tmp);
+	pr_info("set base frequency = %u  regs = 0x%08llx\n", frequency, tmp);
 	ddbwritel(dev, (u32) tmp, RFDAC_FCW);
 	return 0;
 }
@@ -1505,18 +1451,18 @@ static void mod3_set_cfcw(struct ddb_mod *mod, u32 f)
 	s32 dcf = dev->mod_base.frequency;
 	s64 tmp, srdac = 245760000;
 	u32 cfcw;
-	
+
 	tmp = ((s64) (freq - dcf)) << 32;
 	tmp = div64_s64(tmp, srdac);
 	cfcw = (u32) tmp;
-	printk("f=%u cfcw = %08x nr = %u\n", f, cfcw, mod->port->nr);
+	pr_info("f=%u cfcw = %08x nr = %u\n", f, cfcw, mod->port->nr);
 	ddbwritel(dev, cfcw, SDR_CHANNEL_CFCW(mod->port->nr));
 }
 
 static int mod3_set_frequency(struct ddb_mod *mod, u32 frequency)
 {
 	struct ddb *dev = mod->port->dev;
-	
+
 #if 0
 	if (frequency % 1000)
 		return -EINVAL;
@@ -1542,7 +1488,7 @@ static int mod3_set_ari(struct ddb_mod *mod, u32 rate)
 
 static int mod3_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
 {
-	switch(tvp->cmd) {
+	switch (tvp->cmd) {
 	case MODULATOR_OUTPUT_ARI:
 		return mod3_set_ari(mod, tvp->u.data);
 
@@ -1559,7 +1505,7 @@ static int mod_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
 {
 	if (mod->port->dev->link[0].info->version == 3)
 		return mod3_prop_proc(mod, tvp);
-	switch(tvp->cmd) {
+	switch (tvp->cmd) {
 	case MODULATOR_SYMBOL_RATE:
 		return mod_set_symbolrate(mod, tvp->u.data);
 
@@ -1586,20 +1532,22 @@ int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg)
 	struct ddb *dev = output->port->dev;
 	struct ddb_mod *mod = &dev->mod[output->nr];
 	int ret = 0;
-	
+
 	if (dev->link[0].info->version == 3 && cmd != FE_SET_PROPERTY)
 		return -EINVAL;
 	switch (cmd) {
 	case FE_SET_PROPERTY:
 	{
-		struct dtv_properties *tvps = (struct dtv_properties __user *) parg;
+		struct dtv_properties *tvps =
+			(struct dtv_properties __user *) parg;
 		struct dtv_property *tvp = NULL;
 		int i;
-		
+
 		if ((tvps->num == 0) || (tvps->num > DTV_IOCTL_MAX_MSGS))
 			return -EINVAL;
-		
-		tvp = kmalloc(tvps->num * sizeof(struct dtv_property), GFP_KERNEL);
+
+		tvp = kmalloc(tvps->num * sizeof(struct dtv_property),
+			      GFP_KERNEL);
 		if (!tvp) {
 			ret = -ENOMEM;
 			goto out;
@@ -1610,11 +1558,12 @@ int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg)
 			goto out;
 		}
 		for (i = 0; i < tvps->num; i++) {
-			if ((ret = mod_prop_proc(mod, tvp + i)) < 0)
+			ret = mod_prop_proc(mod, tvp + i);
+			if (ret < 0)
 				goto out;
 			(tvp + i)->result = ret;
 		}
-	out:
+out:
 		kfree(tvp);
 		return ret;
 	}
@@ -1677,7 +1626,7 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
 		pr_err("FSM setup failed!\n");
 		return -1;
 	}
-	
+
 	for (i = 0; i < streams; i++) {
 		struct ddb_mod *mod = &dev->mod[i];
 
@@ -1692,7 +1641,7 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
 		mod_set_vga(dev, RF_VGA_GAIN_N16);
 	else
 		mod_set_vga(dev, RF_VGA_GAIN_N24);
-	
+
 	mod_set_attenuator(dev, 0);
 	return 0;
 }
@@ -1732,7 +1681,7 @@ static void mod_set_sdr_table(struct ddb_mod *mod, u32 *tab, u32 len)
 	struct ddb *dev = mod->port->dev;
 	u32 i;
 
-	for (i = 0; i < len; i++) 
+	for (i = 0; i < len; i++)
 		ddbwritel(dev, tab[i], SDR_CHANNEL_SETFIR(mod->port->nr));
 }
 
@@ -1740,45 +1689,45 @@ static int rfdac_init(struct ddb *dev)
 {
 	int i;
 	u32 tmp;
-	
+
 	ddbwritel(dev, RFDAC_CMD_POWERDOWN, RFDAC_CONTROL);
 	for (i = 0; i < 10; i++) {
-		msleep(10);
+		msleep(20);
 		tmp = ddbreadl(dev, RFDAC_CONTROL);
 		if ((tmp & RFDAC_CMD_STATUS) == 0x00)
 			break;
 	}
 	if (tmp & 0x80)
 		return -1;
-	printk("sync %d:%08x\n", i, tmp);
+	pr_info("sync %d:%08x\n", i, tmp);
 	ddbwritel(dev, RFDAC_CMD_RESET, RFDAC_CONTROL);
 	for (i = 0; i < 10; i++) {
-		msleep(10);
+		msleep(20);
 		tmp = ddbreadl(dev, RFDAC_CONTROL);
 		if ((tmp & RFDAC_CMD_STATUS) == 0x00)
 			break;
 	}
 	if (tmp & 0x80)
 		return -1;
-	printk("sync %d:%08x\n", i, tmp);
+	pr_info("sync %d:%08x\n", i, tmp);
 	ddbwritel(dev, RFDAC_CMD_SETUP, RFDAC_CONTROL);
 	for (i = 0; i < 10; i++) {
-		msleep(10);
+		msleep(20);
 		tmp = ddbreadl(dev, RFDAC_CONTROL);
 		if ((tmp & RFDAC_CMD_STATUS) == 0x00)
 			break;
 	}
 	if (tmp & 0x80)
 		return -1;
-	printk("sync %d:%08x\n", i, tmp);
- 	ddbwritel(dev, 0x01, JESD204B_BASE);
+	pr_info("sync %d:%08x\n", i, tmp);
+	ddbwritel(dev, 0x01, JESD204B_BASE);
 	for (i = 0; i < 400; i++) {
-		msleep(10);
+		msleep(20);
 		tmp = ddbreadl(dev, JESD204B_BASE);
 		if ((tmp & 0xc0000000) == 0xc0000000)
 			break;
 	}
-	printk("sync %d:%08x\n", i, tmp);
+	pr_info("sync %d:%08x\n", i, tmp);
 	if ((tmp & 0xc0000000) != 0xc0000000)
 		return -1;
 	return 0;
@@ -1801,8 +1750,8 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 
 	for (i = 0; i < streams; i++) {
 		struct ddb_mod *mod = &dev->mod[i];
+
 		mod->port = &dev->port[i];
-		
 		mod_set_sdr_table(mod, vsb13500, 64);
 		mod_set_sdr_table(mod, stage2, 16);
 	}
diff --git a/ddbridge/ddbridge-ns.c b/ddbridge/ddbridge-ns.c
index e5e69cf..9e3fcd6 100644
--- a/ddbridge/ddbridge-ns.c
+++ b/ddbridge/ddbridge-ns.c
@@ -87,7 +87,6 @@ static int ns_alloc(struct dvbnss *nss)
 		dev->ns[i].fe = input;
 		nss->priv = &dev->ns[i];
 		ret = 0;
-		/*pr_info("DDBridge: %s i=%d fe=%d\n", __func__, i, input->nr); */
 		break;
 	}
 	ddbwritel(dev, 0x03, RTP_MASTER_CONTROL);
@@ -446,8 +445,6 @@ static int ns_start(struct dvbnss *nss)
 	if (dns->fe != input)
 		ddb_dvb_ns_input_start(dns->fe);
 	ddb_dvb_ns_input_start(input);
-	/* printk("ns start ns %u, fe %u link %u\n",
-	   dns->nr, dns->fe->nr, dns->fe->port->lnr); */
 	ddbwritel(dev, reg | (dns->fe->nr << 8) | (dns->fe->port->lnr << 16),
 		  STREAM_CONTROL(dns->nr));
 	return 0;
diff --git a/ddbridge/ddbridge-regs.h b/ddbridge/ddbridge-regs.h
index 28d33c1..b62a5b2 100644
--- a/ddbridge/ddbridge-regs.h
+++ b/ddbridge/ddbridge-regs.h
@@ -58,9 +58,9 @@
 /* ------------------------------------------------------------------------- */
 
 /* Interrupt controller
-   How many MSI's are available depends on HW (Min 2 max 8)
-   How many are usable also depends on Host platform
-*/
+ * How many MSI's are available depends on HW (Min 2 max 8)
+ * How many are usable also depends on Host platform
+ */
 
 #define INTERRUPT_BASE   (0x40)
 
@@ -167,13 +167,15 @@
 #define TEMPMON_FANPWM      (0x00000F00)            // PWM speed in 10% steps
 #define TEMPMON_FANTACHO    (0x000000FF)            // Rotations in 100/min steps
 
-// V1 Temperature Monitor
-// Temperature Monitor TEMPMON_CONTROL & 0x8000 == 0 : ( 2x LM75A @ 0x90,0x92 )
-// Temperature Monitor TEMPMON_CONTROL & 0x8000 == 1 : ( 1x LM75A @ 0x90, 1x ADM1032 @ 0x9A )
+/* V1 Temperature Monitor
+ * Temperature Monitor TEMPMON_CONTROL & 0x8000 == 0 : ( 2x LM75A @ 0x90,0x92 )
+ * Temperature Monitor TEMPMON_CONTROL & 0x8000 == 1 :
+ * ( 1x LM75A @ 0x90, 1x ADM1032 @ 0x9A )
+ */
 
-#define TEMPMON1_CORE       (TEMPMON_SENSOR0)    // SHORT Temperature in °C x 256 (ADM1032 ext)
-#define TEMPMON1_SENSOR1    (TEMPMON_BASE + 0x08)    // SHORT Temperature in °C x 256 (LM75A 0x90)
-#define TEMPMON1_SENSOR2    (TEMPMON_BASE + 0x0C)    // SHORT Temperature in °C x 256 (LM75A 0x92 or ADM1032 Int)
+#define TEMPMON1_CORE       (TEMPMON_SENSOR0)    // u16 Temperature in °C x 256 (ADM1032 ext)
+#define TEMPMON1_SENSOR1    (TEMPMON_BASE + 0x08) // SHORT Temperature in °C x 256 (LM75A 0x90)
+#define TEMPMON1_SENSOR2    (TEMPMON_BASE + 0x0C) // SHORT Temperature in °C x 256 (LM75A 0x92 or ADM1032 Int)
 
 // V2 Temperature Monitor 2 ADM1032
 
@@ -332,16 +334,16 @@
 /* Muxout from VCO (usually = Lock) */
 #define VCO3_CONTROL_MUXOUT (0x00000004)
 
-// V2
+/* V2 */
 
 #define MAX2871_BASE            (0xC0)
 #define MAX2871_CONTROL         (MAX2871_BASE + 0x00)
-#define MAX2871_OUTDATA         (MAX2871_BASE + 0x04)  // 32 Bit
-#define MAX2871_INDATA          (MAX2871_BASE + 0x08)  // 32 Bit
+#define MAX2871_OUTDATA         (MAX2871_BASE + 0x04)
+#define MAX2871_INDATA          (MAX2871_BASE + 0x08)
 #define MAX2871_CONTROL_WRITE   (0x00000001)   // 1 = Trigger write, resets when done
 #define MAX2871_CONTROL_CE      (0x00000002)   // 0 = Put VCO into power down
-#define MAX2871_CONTROL_MUXOUT  (0x00000004)   // Muxout from VCO 
-#define MAX2871_CONTROL_LOCK    (0x00000008)   // Lock from VCO 
+#define MAX2871_CONTROL_MUXOUT  (0x00000004)   // Muxout from VCO
+#define MAX2871_CONTROL_LOCK    (0x00000008)   // Lock from VCO
 
 #define FSM_BASE                (0x200)
 #define FSM_CONTROL             (FSM_BASE + 0x00)
@@ -360,9 +362,9 @@
 
 
 #define FSM_CAPACITY            (FSM_BASE + 0x04)
-#define FSM_CAPACITY_MAX        (0x3F000000)  
-#define FSM_CAPACITY_CUR        (0x003F0000)  
-#define FSM_CAPACITY_INUSE      (0x0000003F)  
+#define FSM_CAPACITY_MAX        (0x3F000000)
+#define FSM_CAPACITY_CUR        (0x003F0000)
+#define FSM_CAPACITY_INUSE      (0x0000003F)
 
 #define FSM_GAIN                (FSM_BASE + 0x10)
 #define FSM_GAINMASK            (0x000000FF)
@@ -381,15 +383,15 @@
 #define RF_ATTENUATOR   (0xD8)
 #define RF_ATTENUATOR   (0xD8)
 /*  0x00 =  0 dB
-    0x01 =  1 dB
-      ...
-    0x1F = 31 dB
-*/
+ *  0x01 =  1 dB
+ *    ...
+ *  0x1F = 31 dB
+ */
 
 #define RF_VGA  (0xDC)
 /* Only V2 */
 /* 8 bit range 0 - 31.75 dB Gain  */
-	
+
 /* VGA Gain for same output level as V1 Modulator */
 #define RF_VGA_GAIN_N8          (85)
 #define RF_VGA_GAIN_N16         (117)
@@ -411,9 +413,9 @@
 #define RF_POWER_CONTROL_VALID     (0x00000500)
 
 
-/* --------------------------------------------------------------------------
-   Output control
-*/
+/*
+ *  Output control
+ */
 
 #define IQOUTPUT_BASE           (0x240)
 #define IQOUTPUT_CONTROL        (IQOUTPUT_BASE + 0x00)
@@ -581,7 +583,7 @@
 
 // Additional Status Bits
 
-#define DMA_PCIE_LANES_MASK       ( 0x00070000 )
+#define DMA_PCIE_LANES_MASK       (0x00070000)
 
 
 // --------------------------------------------------------------------------
@@ -619,7 +621,7 @@
 #define SDR_FIR_SELECT_MASK         (0x00C00000)
 #define SDR_VSB_LENGTH_MASK         (0x01000000)
 
-#define SDR_SET_FIR(select,tap,coeff,vsblen)	\
+#define SDR_SET_FIR(select, tap, coeff, vsblen)	\
 	((((select)<<22)&SDR_FIR_SELECT_MASK)|			\
 	 (((tap)<<16)&SDR_FIR_TAP_MASK)|				\
 	 ((coeff)&SDR_FIR_COEFF_MASK)|					\
diff --git a/ddbridge/ddbridge.c b/ddbridge/ddbridge.c
index 5c2b2a7..a4b19d1 100644
--- a/ddbridge/ddbridge.c
+++ b/ddbridge/ddbridge.c
@@ -129,7 +129,7 @@ static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
 				dev->msi);
 		} else
 			pr_info("DDBridge: MSI not available.\n");
-		
+
 #else
 		stat = pci_enable_msi_block(dev->pdev, nr);
 		if (stat == 0) {
@@ -139,7 +139,7 @@ static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
 			stat = pci_enable_msi(dev->pdev);
 			dev->msi = 1;
 		}
-		if (stat < 0) 
+		if (stat < 0)
 			pr_info("DDBridge: MSI not available.\n");
 #endif
 	}
@@ -170,7 +170,7 @@ static int __devinit ddb_irq_init2(struct ddb *dev)
 			   irq_flag, "ddbridge", (void *) dev);
 	if (stat < 0)
 		return stat;
-	
+
 	ddbwritel(dev, 0x0000ff7f, INTERRUPT_V2_CONTROL);
 	ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_1);
 	ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_2);
@@ -181,15 +181,15 @@ static int __devinit ddb_irq_init2(struct ddb *dev)
 	ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_7);
 	return stat;
 }
-	
+
 static int __devinit ddb_irq_init(struct ddb *dev)
 {
 	int stat;
 	int irq_flag = IRQF_SHARED;
-	
+
 	if (dev->link[0].info->regmap->irq_version == 2)
 		return ddb_irq_init2(dev);
-	
+
 	ddbwritel(dev, 0x00000000, INTERRUPT_ENABLE);
 	ddbwritel(dev, 0x00000000, MSI1_ENABLE);
 	ddbwritel(dev, 0x00000000, MSI2_ENABLE);
@@ -254,7 +254,7 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
 		if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
 			return -ENODEV;
-	
+
 	dev = vzalloc(sizeof(struct ddb));
 	if (dev == NULL)
 		return -ENOMEM;
@@ -315,7 +315,7 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	stat = ddb_irq_init(dev);
 	if (stat < 0)
 		goto fail0;
-	
+
 	if (ddb_init(dev) == 0)
 		return 0;
 
diff --git a/ddbridge/ddbridge.h b/ddbridge/ddbridge.h
index add55b3..44ee9ba 100644
--- a/ddbridge/ddbridge.h
+++ b/ddbridge/ddbridge.h
@@ -122,7 +122,7 @@ struct ddb_regmap {
 
 	struct ddb_regset *input;
 	struct ddb_regset *output;
-	
+
 	struct ddb_regset *channel;
 	//struct ddb_regset *ci;
 	//struct ddb_regset *pid_filter;
@@ -191,7 +191,8 @@ struct ddb_info {
 };
 
 /* DMA_SIZE MUST be smaller than 256k and
-   MUST be divisible by 188 and 128 !!! */
+ * MUST be divisible by 188 and 128 !!!
+ */
 
 #define DMA_MAX_BUFS 32      /* hardware table limit */
 
@@ -364,11 +365,11 @@ struct ddb_mod {
 	struct ddb_port       *port;
 	//u32                    nr;
 	//u32                    regs;
-	
+
 	u32                    frequency;
 	u32                    modulation;
 	u32                    symbolrate;
-	
+
 	u64                    obitrate;
 	u64                    ibitrate;
 	u32                    pcr_correction;

From 4699a19bfb3ce9fd0d6184b00d0bc38d1aa66f8c Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Thu, 20 Apr 2017 15:55:27 +0200
Subject: [PATCH 40/47] increase default adapter number to 64

---
 dvb-core/dvbdev.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/dvb-core/dvbdev.h b/dvb-core/dvbdev.h
index e534ef1..5a559e9 100644
--- a/dvb-core/dvbdev.h
+++ b/dvb-core/dvbdev.h
@@ -33,7 +33,7 @@
 #if defined(CONFIG_DVB_MAX_ADAPTERS) && CONFIG_DVB_MAX_ADAPTERS > 0
   #define DVB_MAX_ADAPTERS CONFIG_DVB_MAX_ADAPTERS
 #else
-  #define DVB_MAX_ADAPTERS 8
+  #define DVB_MAX_ADAPTERS 64
 #endif
 
 #define DVB_UNSET (-1)

From 04294ab5ef86e5ede539a40d654cd9d2ff12db87 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Tue, 25 Apr 2017 18:59:47 +0200
Subject: [PATCH 41/47] increase to 32 buffers for SDR

---
 ddbridge/ddbridge.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge.h b/ddbridge/ddbridge.h
index 44ee9ba..1b50573 100644
--- a/ddbridge/ddbridge.h
+++ b/ddbridge/ddbridge.h
@@ -213,7 +213,7 @@ struct ddb_info {
 #define OUTPUT_DMA_SIZE (128*47*21)
 #define OUTPUT_DMA_IRQ_DIV 1
 #endif
-#define OUTPUT_DMA_BUFS_SDR 8
+#define OUTPUT_DMA_BUFS_SDR 32
 #define OUTPUT_DMA_SIZE_SDR (256*1024)
 #define OUTPUT_DMA_IRQ_DIV_SDR 1
 

From 5d4259f6f65ca7dbf64cf067fa13555b3fce233d Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Tue, 25 Apr 2017 19:00:19 +0200
Subject: [PATCH 42/47] remove warning for unused code

---
 ddbridge/ddbridge-mod.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index 549e210..016fb25 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -1461,9 +1461,9 @@ static void mod3_set_cfcw(struct ddb_mod *mod, u32 f)
 
 static int mod3_set_frequency(struct ddb_mod *mod, u32 frequency)
 {
+#if 0
 	struct ddb *dev = mod->port->dev;
 
-#if 0
 	if (frequency % 1000)
 		return -EINVAL;
 	if ((frequency < 114000000) || (frequency > 874000000))

From 7d73553b616ebc3b7059fac5df507c0f029bbdfe Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Thu, 4 May 2017 09:09:34 +0200
Subject: [PATCH 43/47] start output DMA with stall bit set

---
 ddbridge/ddbridge-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c
index 153928e..9b5eaad 100644
--- a/ddbridge/ddbridge-core.c
+++ b/ddbridge/ddbridge-core.c
@@ -770,7 +770,7 @@ static void ddb_output_start(struct ddb_output *output)
 			  DMA_BUFFER_SIZE(output->dma));
 		ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma));
 		ddbwritel(dev, 1, DMA_BASE_READ);
-		ddbwritel(dev, 3, DMA_BUFFER_CONTROL(output->dma));
+		ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma));
 	}
 	if (output->port->class != DDB_PORT_MOD)
 		ddbwritel(dev, con | 1, TS_CONTROL(output));

From 3063b8e88bb0baf36eeae3f6c0d4166d5c4a5d66 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Thu, 4 May 2017 16:08:13 +0200
Subject: [PATCH 44/47] revert struct name change

---
 ddbridge/ddbridge.h | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/ddbridge/ddbridge.h b/ddbridge/ddbridge.h
index 1b50573..8d9e2b4 100644
--- a/ddbridge/ddbridge.h
+++ b/ddbridge/ddbridge.h
@@ -143,19 +143,6 @@ struct ddb_ids {
 	u32 mac;
 };
 
-#if 0
-struct ddb_ddata {
-	u32 id;
-#define DDB_NONE         0
-#define DDB_OCTOPUS      1
-#define DDB_OCTOPUS_CI   2
-#define DDB_MODULATOR    3
-#define DDB_OCTONET      4
-#define DDB_OCTOPUS_MAX  5
-#define DDB_OCTOPUS_MAX_CT  6
-#define DDB_OCTOPRO      7
-#define DDB_OCTOPRO_HDIN 8
-#else
 struct ddb_info {
 	u32   type;
 #define DDB_NONE         0
@@ -167,7 +154,6 @@ struct ddb_info {
 #define DDB_OCTOPUS_MAX_CT  6
 #define DDB_OCTOPRO      7
 #define DDB_OCTOPRO_HDIN 8
-#endif
 	u32   version;
 	char *name;
 	u32   i2c_mask;

From 12b792ef3f85b89a0851284202886202579814d3 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Tue, 16 May 2017 21:24:48 +0200
Subject: [PATCH 45/47] remove possible mutex deadlock

---
 frontends/cxd2843.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/frontends/cxd2843.c b/frontends/cxd2843.c
index e91153b..f8dd623 100644
--- a/frontends/cxd2843.c
+++ b/frontends/cxd2843.c
@@ -270,9 +270,10 @@ static int writebitsx(struct cxd_state *cxd, u8 Bank, u8 Address,
 	mutex_lock(&cxd->mutex);
 	status = readregsx_unlocked(cxd, Bank, Address, &tmp, 1);
 	if (status < 0)
-		return status;
+		goto out;
 	tmp = (tmp & ~Mask) | Value;
 	status = writeregsx_unlocked(cxd, Bank, Address, &tmp, 1);
+out:
 	mutex_unlock(&cxd->mutex);
 	return status;
 }
@@ -286,9 +287,10 @@ static int writebitst(struct cxd_state *cxd, u8 Bank, u8 Address,
 	mutex_lock(&cxd->mutex);
 	status = readregst_unlocked(cxd, Bank, Address, &Tmp, 1);
 	if (status < 0)
-		return status;
+		goto out;
 	Tmp = (Tmp & ~Mask) | Value;
 	status = writeregst_unlocked(cxd, Bank, Address, &Tmp, 1);
+out:
 	mutex_unlock(&cxd->mutex);
 	return status;
 }

From 8704ceaf9431bb8b0b494d5a34040bc1ba1b2488 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Tue, 16 May 2017 21:25:30 +0200
Subject: [PATCH 46/47] change default frequencies for SDR modulator

---
 ddbridge/ddbridge-mod.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/ddbridge/ddbridge-mod.c b/ddbridge/ddbridge-mod.c
index 016fb25..90a4062 100644
--- a/ddbridge/ddbridge-mod.c
+++ b/ddbridge/ddbridge-mod.c
@@ -1758,14 +1758,14 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 	ddbwritel(dev, 0x1800, 0x244);
 	ddbwritel(dev, 0x01, 0x240);
 
-	mod3_set_base_frequency(dev, 188000000);
+	mod3_set_base_frequency(dev, 602000000);
 	for (i = 0; i < streams; i++) {
 		struct ddb_mod *mod = &dev->mod[i];
 
 		ddbwritel(dev, 0x00, SDR_CHANNEL_CONTROL(i));
 		ddbwritel(dev, 0x06, SDR_CHANNEL_CONFIG(i));
 		ddbwritel(dev, 0x70800000, SDR_CHANNEL_ARICW(i));
-		mod3_set_frequency(mod, 182250000 + 7000000 * i);
+		mod3_set_frequency(mod, Frequency + 7000000 * i);
 
 		ddbwritel(dev, 0x00011f80, SDR_CHANNEL_RGAIN(i));
 		ddbwritel(dev, 0x00001000, SDR_CHANNEL_FM1GAIN(i));
@@ -1781,6 +1781,6 @@ int ddbridge_mod_init(struct ddb *dev)
 	if (dev->link[0].info->version == 2)
 		return mod_init_2(dev, 114000000);
 	if (dev->link[0].info->version == 3)
-		return mod_init_3(dev, 114000000);
+		return mod_init_3(dev, 503250000);
 	return -1;
 }

From 40c32767ecf587c1c0b41a7616a538df995f2f65 Mon Sep 17 00:00:00 2001
From: Ralph Metzler <rjkm@metzlerbros.de>
Date: Wed, 17 May 2017 19:42:25 +0200
Subject: [PATCH 47/47] new release

---
 CHANGELOG                | 4 ++++
 ddbridge/ddbridge-i2c.c  | 2 +-
 ddbridge/ddbridge-i2c.h  | 2 +-
 ddbridge/ddbridge-ns.c   | 2 +-
 ddbridge/ddbridge-regs.h | 2 +-
 ddbridge/ddbridge.c      | 4 ++--
 ddbridge/ddbridge.h      | 4 ++--
 ddbridge/octonet.c       | 2 +-
 8 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/CHANGELOG b/CHANGELOG
index 95a20cd..b184a06 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,7 @@
+0.9.29 compiles with most kernels up to 4.11.1
+
+see git commit messages for newer changes
+
 0.9.24 2016.08.03
 - suport new V2 modulator cards
 
diff --git a/ddbridge/ddbridge-i2c.c b/ddbridge/ddbridge-i2c.c
index 8691eb9..f5374d1 100644
--- a/ddbridge/ddbridge-i2c.c
+++ b/ddbridge/ddbridge-i2c.c
@@ -1,7 +1,7 @@
 /*
  * ddbridge-i2c.c: Digital Devices bridge i2c driver
  *
- * Copyright (C) 2010-2015 Digital Devices GmbH
+ * Copyright (C) 2010-2017 Digital Devices GmbH
  *                         Ralph Metzler <rjkm@metzlerbros.de>
  *                         Marcus Metzler <mocm@metzlerbros.de>
  *
diff --git a/ddbridge/ddbridge-i2c.h b/ddbridge/ddbridge-i2c.h
index c20a2ba..0133e65 100644
--- a/ddbridge/ddbridge-i2c.h
+++ b/ddbridge/ddbridge-i2c.h
@@ -1,7 +1,7 @@
 /*
  * ddbridge-i2c.h: Digital Devices bridge i2c driver
  *
- * Copyright (C) 2010-2015 Digital Devices GmbH
+ * Copyright (C) 2010-2017 Digital Devices GmbH
  *                         Marcus Metzler <mocm@metzlerbros.de>
  *                         Ralph Metzler <rjkm@metzlerbros.de>
  *
diff --git a/ddbridge/ddbridge-ns.c b/ddbridge/ddbridge-ns.c
index 9e3fcd6..b2bca85 100644
--- a/ddbridge/ddbridge-ns.c
+++ b/ddbridge/ddbridge-ns.c
@@ -1,7 +1,7 @@
 /*
  * ddbridge-ns.c: Digital Devices PCIe bridge driver net streaming
  *
- * Copyright (C) 2010-2015 Marcus Metzler <mocm@metzlerbros.de>
+ * Copyright (C) 2010-2017Marcus Metzler <mocm@metzlerbros.de>
  *                         Ralph Metzler <rjkm@metzlerbros.de>
  *                         Digital Devices GmbH
  *
diff --git a/ddbridge/ddbridge-regs.h b/ddbridge/ddbridge-regs.h
index b62a5b2..4935b12 100644
--- a/ddbridge/ddbridge-regs.h
+++ b/ddbridge/ddbridge-regs.h
@@ -1,7 +1,7 @@
 /*
  * ddbridge-regs.h: Digital Devices PCIe bridge driver
  *
- * Copyright (C) 2010-2016 Digital Devices GmbH
+ * Copyright (C) 2010-2017 Digital Devices GmbH
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
diff --git a/ddbridge/ddbridge.c b/ddbridge/ddbridge.c
index a4b19d1..0ec1761 100644
--- a/ddbridge/ddbridge.c
+++ b/ddbridge/ddbridge.c
@@ -1,7 +1,7 @@
 /*
  * ddbridge.c: Digital Devices PCIe bridge driver
  *
- * Copyright (C) 2010-2015 Digital Devices GmbH
+ * Copyright (C) 2010-2017 Digital Devices GmbH
  *                         Ralph Metzler <rjkm@metzlerbros.de>
  *                         Marcus Metzler <mocm@metzlerbros.de>
  *
@@ -646,7 +646,7 @@ static __init int module_init_ddbridge(void)
 
 	pr_info("DDBridge: Digital Devices PCIE bridge driver "
 		DDBRIDGE_VERSION
-		", Copyright (C) 2010-16 Digital Devices GmbH\n");
+		", Copyright (C) 2010-17 Digital Devices GmbH\n");
 	if (ddb_class_create() < 0)
 		return -1;
 	ddb_wq = create_workqueue("ddbridge");
diff --git a/ddbridge/ddbridge.h b/ddbridge/ddbridge.h
index 8d9e2b4..28dd20d 100644
--- a/ddbridge/ddbridge.h
+++ b/ddbridge/ddbridge.h
@@ -1,7 +1,7 @@
 /*
  * ddbridge.h: Digital Devices PCIe bridge driver
  *
- * Copyright (C) 2010-2015 Digital Devices GmbH
+ * Copyright (C) 2010-2017 Digital Devices GmbH
  *                         Ralph Metzler <rmetzler@digitaldevices.de>
  *
  * This program is free software; you can redistribute it and/or
@@ -748,6 +748,6 @@ void ddbridge_mod_rate_handler(unsigned long data);
 
 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
 
-#define DDBRIDGE_VERSION "0.9.28"
+#define DDBRIDGE_VERSION "0.9.29"
 
 #endif
diff --git a/ddbridge/octonet.c b/ddbridge/octonet.c
index 1d51ffc..fd686c6 100644
--- a/ddbridge/octonet.c
+++ b/ddbridge/octonet.c
@@ -1,7 +1,7 @@
 /*
  * octonet.c: Digital Devices network tuner driver
  *
- * Copyright (C) 2012-16 Digital Devices GmbH
+ * Copyright (C) 2012-17 Digital Devices GmbH
  *                       Marcus Metzler <mocm@metzlerbros.de>
  *                       Ralph Metzler <rjkm@metzlerbros.de>
  *