1
0
mirror of https://github.com/DigitalDevices/dddvb.git synced 2023-10-10 13:37:43 +02:00
This commit is contained in:
Ralph Metzler 2016-03-24 12:10:20 +01:00 committed by mvoelkel
parent c18503fcad
commit 1d3bb91eb8
9 changed files with 238 additions and 183 deletions

View File

@ -292,20 +292,24 @@ static int ddb_buffers_alloc(struct ddb *dev)
switch (port->class) {
case DDB_PORT_TUNER:
if (port->input[0]->dma)
if (dma_alloc(dev->pdev, port->input[0]->dma, 0) < 0)
if (dma_alloc(dev->pdev,
port->input[0]->dma, 0) < 0)
return -1;
if (port->input[1]->dma)
if (dma_alloc(dev->pdev, port->input[1]->dma, 0) < 0)
if (dma_alloc(dev->pdev,
port->input[1]->dma, 0) < 0)
return -1;
break;
case DDB_PORT_CI:
case DDB_PORT_LOOP:
if (port->input[0]->dma)
if (dma_alloc(dev->pdev, port->input[0]->dma, 0) < 0)
if (dma_alloc(dev->pdev,
port->input[0]->dma, 0) < 0)
return -1;
case DDB_PORT_MOD:
if (port->output->dma)
if (dma_alloc(dev->pdev, port->output->dma, 1) < 0)
if (dma_alloc(dev->pdev,
port->output->dma, 1) < 0)
return -1;
break;
default:
@ -410,7 +414,8 @@ static void ddb_input_stop(struct ddb_input *input)
input->dma->running = 0;
spin_unlock_irq(&input->dma->lock);
}
//printk("input_stop %u.%u.%u\n", dev->nr, input->port->lnr, input->nr);
/*printk("input_stop %u.%u.%u\n",
dev->nr, input->port->lnr, input->nr);*/
}
static void ddb_input_start(struct ddb_input *input)
@ -446,7 +451,8 @@ static void ddb_input_start(struct ddb_input *input)
input->dma->running = 1;
spin_unlock_irq(&input->dma->lock);
}
//printk("input_start %u.%u.%u\n", dev->nr, input->port->lnr, input->nr);
/*printk("input_start %u.%u.%u\n",
dev->nr, input->port->lnr, input->nr); */
}
@ -691,7 +697,8 @@ static u32 ddb_input_avail(struct ddb_input *input)
return 0;
}
static size_t ddb_input_read(struct ddb_input *input, __user u8 *buf, size_t count)
static size_t ddb_input_read(struct ddb_input *input,
__user u8 *buf, size_t count)
{
struct ddb *dev = input->port->dev;
u32 left = count;
@ -1282,11 +1289,11 @@ static int lnb_command(struct ddb *dev, u32 link, u32 lnb, u32 cmd)
u32 c, v = 0, tag = DDB_LINK_TAG(link);
v = LNB_TONE & (dev->link[link].lnb.tone << (15 - lnb));
//pr_info("lnb_control[%u] = %08x\n", lnb, cmd | v);
/*pr_info("lnb_control[%u] = %08x\n", lnb, cmd | v);*/
ddbwritel(dev, cmd | v, tag | LNB_CONTROL(lnb));
for (c = 0; c < 10; c++) {
v = ddbreadl(dev, tag | LNB_CONTROL(lnb));
//pr_info("ctrl = %08x\n", v);
/*pr_info("ctrl = %08x\n", v);*/
if ((v & LNB_BUSY) == 0)
break;
msleep(20);
@ -1321,7 +1328,8 @@ static int max_send_master_cmd(struct dvb_frontend *fe,
return 0;
}
static int lnb_set_tone(struct ddb *dev, u32 link, u32 input, fe_sec_tone_mode_t tone)
static int lnb_set_tone(struct ddb *dev, u32 link, u32 input,
fe_sec_tone_mode_t tone)
{
int s = 0;
u32 mask = (1ULL << input);
@ -1346,7 +1354,8 @@ static int lnb_set_tone(struct ddb *dev, u32 link, u32 input, fe_sec_tone_mode_t
return s;
}
static int lnb_set_voltage(struct ddb *dev, u32 link, u32 input, fe_sec_voltage_t voltage)
static int lnb_set_voltage(struct ddb *dev, u32 link, u32 input,
fe_sec_voltage_t voltage)
{
int s = 0;
@ -1466,18 +1475,22 @@ static int max_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
if (fmode == 3)
max_set_input_unlocked(fe, 0);
if (voltage == SEC_VOLTAGE_OFF)
dev->link[port->lnr].lnb.voltage[dvb->input] &= ~(1ULL << input->nr);
dev->link[port->lnr].lnb.voltage[dvb->input] &=
~(1ULL << input->nr);
else
dev->link[port->lnr].lnb.voltage[dvb->input] |= (1ULL << input->nr);
dev->link[port->lnr].lnb.voltage[dvb->input] |=
(1ULL << input->nr);
res = lnb_set_voltage(dev, port->lnr, dvb->input, voltage);
break;
case 1:
case 2:
if (voltage == SEC_VOLTAGE_OFF)
dev->link[port->lnr].lnb.voltages &= ~(1ULL << input->nr);
dev->link[port->lnr].lnb.voltages &=
~(1ULL << input->nr);
else
dev->link[port->lnr].lnb.voltages |= (1ULL << input->nr);
dev->link[port->lnr].lnb.voltages |=
(1ULL << input->nr);
nv = dev->link[port->lnr].lnb.voltages;
if (old_quattro) {
@ -1495,24 +1508,39 @@ static int max_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
if (nv != ov) {
if (nv) {
lnb_set_voltage(dev, port->lnr, 0, SEC_VOLTAGE_13);
lnb_set_voltage(dev, port->lnr, 0,
SEC_VOLTAGE_13);
if (fmode == 1) {
lnb_set_voltage(dev, port->lnr, 0, SEC_VOLTAGE_13);
lnb_set_voltage(dev, port->lnr, 0,
SEC_VOLTAGE_13);
if (old_quattro) {
lnb_set_voltage(dev, port->lnr, 1, SEC_VOLTAGE_18);
lnb_set_voltage(dev, port->lnr, 2, SEC_VOLTAGE_13);
lnb_set_voltage(dev,
port->lnr, 1,
SEC_VOLTAGE_18);
lnb_set_voltage(dev, port->lnr,
2,
SEC_VOLTAGE_13);
} else {
lnb_set_voltage(dev, port->lnr, 1, SEC_VOLTAGE_13);
lnb_set_voltage(dev, port->lnr, 2, SEC_VOLTAGE_18);
lnb_set_voltage(dev, port->lnr,
1,
SEC_VOLTAGE_13);
lnb_set_voltage(dev, port->lnr,
2,
SEC_VOLTAGE_18);
}
lnb_set_voltage(dev, port->lnr, 3, SEC_VOLTAGE_18);
lnb_set_voltage(dev, port->lnr, 3,
SEC_VOLTAGE_18);
}
} else {
lnb_set_voltage(dev, port->lnr, 0, SEC_VOLTAGE_OFF);
lnb_set_voltage(dev, port->lnr,
0, SEC_VOLTAGE_OFF);
if (fmode == 1) {
lnb_set_voltage(dev, port->lnr, 1, SEC_VOLTAGE_OFF);
lnb_set_voltage(dev, port->lnr, 2, SEC_VOLTAGE_OFF);
lnb_set_voltage(dev, port->lnr, 3, SEC_VOLTAGE_OFF);
lnb_set_voltage(dev, port->lnr, 1,
SEC_VOLTAGE_OFF);
lnb_set_voltage(dev, port->lnr, 2,
SEC_VOLTAGE_OFF);
lnb_set_voltage(dev, port->lnr, 3,
SEC_VOLTAGE_OFF);
}
}
}
@ -1589,7 +1617,7 @@ static int fe_attach_mxl5xx(struct ddb_input *input)
cfg = mxl5xx;
cfg.fw_priv = link;
if (dev->link[0].info->type == DDB_OCTONET)
;//cfg.ts_clk = 69;
;/*cfg.ts_clk = 69;*/
demod = input->nr;
tuner = demod & 3;
@ -1937,7 +1965,8 @@ static int dvb_input_attach(struct ddb_input *input)
case DDB_TUNER_DVBCT2_SONY_P:
case DDB_TUNER_DVBC2T2_SONY_P:
case DDB_TUNER_ISDBT_SONY_P:
if (input->port->dev->link[input->port->lnr].info->ts_quirks & TS_QUIRK_SERIAL)
if (input->port->dev->link[input->port->lnr].info->ts_quirks &
TS_QUIRK_SERIAL)
par = 0;
else
par = 1;
@ -2559,8 +2588,8 @@ static int slot_shutdown_xo2(struct dvb_ca_en50221 *ca, int slot)
struct ddb_ci *ci = ca->data;
pr_info("%s\n", __func__);
//i2c_write_reg(i2c, adr, 0x03, 0x60);
//i2c_write_reg(i2c, adr, 0x00, 0xc0);
/*i2c_write_reg(i2c, adr, 0x03, 0x60);*/
/*i2c_write_reg(i2c, adr, 0x00, 0xc0);*/
write_creg(ci, 0x10, 0xff);
write_creg(ci, 0x08, 0x08);
return 0;
@ -2584,7 +2613,6 @@ static int poll_slot_status_xo2(struct dvb_ca_en50221 *ca, int slot, int open)
int stat = 0;
i2c_read_reg(i2c, adr, 0x01, &val);
//pr_info("%s %02x\n", __func__, val);
if (val & 2)
stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
@ -2927,7 +2955,8 @@ static void ddb_dma_init(struct ddb_dma *dma, int nr, void *io, int out)
}
}
static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int dma_nr, int anr)
static void ddb_input_init(struct ddb_port *port, int nr, int pnr,
int dma_nr, int anr)
{
struct ddb *dev = port->dev;
struct ddb_input *input = &dev->input[anr];
@ -3038,7 +3067,8 @@ static void ddb_ports_init(struct ddb *dev)
}
pr_info("Port %u: Link %u, Link Port %u (TAB %u): %s\n",
port->pnr, port->lnr, port->nr, port->nr + 1, port->name);
port->pnr, port->lnr, port->nr,
port->nr + 1, port->name);
if (port->class == DDB_PORT_CI &&
port->type == DDB_CI_EXTERNAL_XO2) {
@ -3049,7 +3079,8 @@ static void ddb_ports_init(struct ddb *dev)
if (port->class == DDB_PORT_CI &&
port->type == DDB_CI_EXTERNAL_XO2_B) {
ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1, 2 * i - 1);
ddb_input_init(port, 2 * i - 1, 0,
2 * i - 1, 2 * i - 1);
ddb_output_init(port, i, i + 8);
continue;
}
@ -3057,25 +3088,30 @@ static void ddb_ports_init(struct ddb *dev)
switch (dev->link[l].info->type) {
case DDB_OCTOPUS_CI:
if (i >= 2) {
ddb_input_init(port, 2 + i, 0, 2 + i, 2 + i);
ddb_input_init(port, 4 + i, 1, 4 + i, 4 + i);
ddb_input_init(port, 2 + i, 0,
2 + i, 2 + i);
ddb_input_init(port, 4 + i, 1,
4 + i, 4 + i);
ddb_output_init(port, i, i + 8);
break;
} /* fallthrough */
case DDB_OCTONET:
case DDB_OCTOPUS:
ddb_input_init(port, 2 * i, 0, 2 * i, 2 * i);
ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1, 2 * i + 1);
ddb_input_init(port, 2 * i + 1, 1,
2 * i + 1, 2 * i + 1);
ddb_output_init(port, i, i + 8);
break;
case DDB_OCTOPUS_MAX:
case DDB_OCTOPUS_MAX_CT:
ddb_input_init(port, 2 * i, 0, 2 * i, 2 * p);
ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1, 2 * p + 1);
ddb_input_init(port, 2 * i + 1,
1, 2 * i + 1, 2 * p + 1);
break;
case DDB_MOD:
ddb_output_init(port, i, i);
dev->handler[i + 18] = ddbridge_mod_rate_handler;
dev->handler[i + 18] =
ddbridge_mod_rate_handler;
dev->handler_data[i + 18] =
(unsigned long) &dev->output[i];
break;
@ -3303,7 +3339,7 @@ static int nsd_do_ioctl(struct file *file, unsigned int cmd, void *parg)
return -EINVAL;
ctrl = (input->port->lnr << 16) | ((input->nr & 7) << 8) |
((ts->filter_mask & 3) << 2);
//pr_info("GET_TS %u.%u\n", input->port->lnr, input->nr);
/*pr_info("GET_TS %u.%u\n", input->port->lnr, input->nr);*/
if (ddbreadl(dev, TS_CAPTURE_CONTROL) & 1) {
pr_info("ts capture busy\n");
return -EBUSY;
@ -3368,7 +3404,7 @@ static int nsd_do_ioctl(struct file *file, unsigned int cmd, void *parg)
if (!input)
return -EINVAL;
if (ctrl & 1) {
pr_info("cannot stop ts capture, while it was neither finished not canceled\n");
pr_info("cannot stop ts capture, while it was neither finished nor canceled\n");
return -EBUSY;
}
/*pr_info("ts capture stopped\n");*/
@ -3447,7 +3483,8 @@ static int reg_wait(struct ddb *dev, u32 reg, u32 bit)
return 0;
}
static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen)
static int flashio(struct ddb *dev, u32 lnr,
u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen)
{
u32 data, shift;
u32 tag = DDB_LINK_TAG(lnr);
@ -3502,7 +3539,8 @@ static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf, u32 r
rbuf += 4;
rlen -= 4;
}
ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00), tag | SPI_CONTROL);
ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00),
tag | SPI_CONTROL);
ddbwritel(dev, 0xffffffff, tag | SPI_DATA);
if (reg_wait(dev, tag | SPI_CONTROL, 4))
goto fail;
@ -3670,7 +3708,8 @@ static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
if (copy_from_user(wbuf, fio.write_buf, fio.write_len))
return -EFAULT;
res = flashio(dev, fio.link, wbuf, fio.write_len, rbuf, fio.read_len);
res = flashio(dev, fio.link, wbuf,
fio.write_len, rbuf, fio.read_len);
if (res)
return res;
if (copy_to_user(fio.read_buf, rbuf, fio.read_len))
@ -4458,7 +4497,7 @@ static void gtl_link_handler(unsigned long priv)
struct ddb *dev = (struct ddb *) priv;
u32 regs = dev->link[0].info->regmap->gtl->base;
printk("GT link change: %u\n",
pr_info("GT link change: %u\n",
(1 & ddbreadl(dev, regs)));
}
@ -4469,7 +4508,7 @@ static void link_tasklet(unsigned long data)
u32 s, off = 32 * link->nr, tag = DDB_LINK_TAG(link->nr);
s = ddbreadl(dev, tag | INTERRUPT_STATUS);
printk("gtl_irq %08x = %08x\n", tag | INTERRUPT_STATUS, s);
pr_info("gtl_irq %08x = %08x\n", tag | INTERRUPT_STATUS, s);
if (!s)
return;
@ -4495,7 +4534,6 @@ static void gtl_irq_handler(unsigned long priv)
LINK_IRQ_HANDLE(3);
}
#else
printk("gtlirq\n");
tasklet_schedule(&link->tasklet);
#endif
}
@ -4563,7 +4601,7 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l)
(l - 1) * dev->link[0].info->regmap->gtl->size;
u32 id;
printk("Checking GT link %u: regs = %08x\n", l, regs);
pr_info("Checking GT link %u: regs = %08x\n", l, regs);
spin_lock_init(&link->lock);
mutex_init(&link->lnb.lock);
@ -4597,8 +4635,7 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l)
link->info = &octopus_ct_gtl;
break;
default:
pr_info("DDBridge: Detected GT link but found invalid ID %08x. "
"You might have to update (flash) the add-on card first.",
pr_info("DDBridge: Detected GT link but found invalid ID %08x. You might have to update (flash) the add-on card first.",
id);
return -1;
}
@ -4630,9 +4667,8 @@ static int ddb_gtl_init(struct ddb *dev)
dev->handler_data[10] = (unsigned long) dev;
dev->handler[10] = gtl_link_handler;
for (l = 1; l < dev->link[0].info->regmap->gtl->num + 1; l++) {
for (l = 1; l < dev->link[0].info->regmap->gtl->num + 1; l++)
ddb_gtl_init_link(dev, l);
}
return 0;
}
@ -4648,9 +4684,11 @@ static int ddb_init_boards(struct ddb *dev)
if (info->board_control) {
ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL);
msleep(100);
ddbwritel(dev, info->board_control_2, DDB_LINK_TAG(l) | BOARD_CONTROL);
ddbwritel(dev, info->board_control_2,
DDB_LINK_TAG(l) | BOARD_CONTROL);
usleep_range(2000, 3000);
ddbwritel(dev, info->board_control_2 | info->board_control,
ddbwritel(dev, info->board_control_2 |
info->board_control,
DDB_LINK_TAG(l) | BOARD_CONTROL);
usleep_range(2000, 3000);
}

View File

@ -123,14 +123,19 @@ static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
dev_err(dev->dev, "DDBridge IRS %08x\n", istat);
if (i2c->link) {
u32 listat = ddbreadl(dev, DDB_LINK_TAG(i2c->link) | INTERRUPT_STATUS);
dev_err(dev->dev, "DDBridge link %u IRS %08x\n",
u32 listat =
ddbreadl(dev,
DDB_LINK_TAG(i2c->link) |
INTERRUPT_STATUS);
dev_err(dev->dev,
"DDBridge link %u IRS %08x\n",
i2c->link, listat);
}
if (istat & 1) {
ddbwritel(dev, istat & 1, INTERRUPT_ACK);
} else {
u32 mon = ddbreadl(dev, i2c->regs + I2C_MONITOR);
u32 mon = ddbreadl(dev,
i2c->regs + I2C_MONITOR);
dev_err(dev->dev, "I2C cmd=%08x mon=%08x\n",
val, mon);
@ -224,14 +229,15 @@ static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
i2c->dev = dev;
i2c->link = link;
i2c->bsize = regmap->i2c_buf->size;
i2c->wbuf = DDB_LINK_TAG(link) | (regmap->i2c_buf->base + i2c->bsize * i);
i2c->rbuf = i2c->wbuf;// + i2c->bsize / 2;
i2c->regs = DDB_LINK_TAG(link) | (regmap->i2c->base + regmap->i2c->size * i);
i2c->wbuf = DDB_LINK_TAG(link) |
(regmap->i2c_buf->base + i2c->bsize * i);
i2c->rbuf = i2c->wbuf;/* + i2c->bsize / 2; */
i2c->regs = DDB_LINK_TAG(link) |
(regmap->i2c->base + regmap->i2c->size * i);
ddbwritel(dev, I2C_SPEED_100, i2c->regs + I2C_TIMING);
ddbwritel(dev, ((i2c->rbuf & 0xffff) << 16) | (i2c->wbuf & 0xffff),
i2c->regs + I2C_TASKADDRESS);
init_completion(&i2c->completion);
adap = &i2c->adap;
i2c_set_adapdata(adap, i2c);
#ifdef I2C_ADAP_CLASS_TV_DIGITAL

View File

@ -965,7 +965,8 @@ void ddbridge_mod_rate_handler(unsigned long data)
InPacketDiff/1000));
if (OutPacketDiff)
mod->rate_inc =
div_u64(mul, OutPacketDiff);
div_u64(mul,
OutPacketDiff);
else
mod->rate_inc = 0;
mod_set_rateinc(dev, output->nr);
@ -975,7 +976,8 @@ void ddbridge_mod_rate_handler(unsigned long data)
if (InPacketDiff)
mod->PCRDecrement =
div_u64(mod->PCRIncrement *
(u64) OutPacketDiff,
(u64)
OutPacketDiff,
InPacketDiff);
else
mod->PCRDecrement = 0;

View File

@ -198,10 +198,13 @@ static int ns_set_ci(struct dvbnss *nss, u8 ci)
if (ciport < 0)
return -EINVAL;
pr_info("input %d.%d to ci %d at port %d\n", input->port->lnr, input->nr, ci, ciport);
ddbwritel(dev, (input->port->lnr << 21) | (input->nr << 16) | 0x1c, TS_OUTPUT_CONTROL(ciport));
pr_info("input %d.%d to ci %d at port %d\n",
input->port->lnr, input->nr, ci, ciport);
ddbwritel(dev, (input->port->lnr << 21) | (input->nr << 16) | 0x1c,
TS_OUTPUT_CONTROL(ciport));
usleep_range(1, 5);
ddbwritel(dev, (input->port->lnr << 21) | (input->nr << 16) | 0x1d, TS_OUTPUT_CONTROL(ciport));
ddbwritel(dev, (input->port->lnr << 21) | (input->nr << 16) | 0x1d,
TS_OUTPUT_CONTROL(ciport));
dns->fe = dev->port[ciport].input[0];
return 0;
}
@ -443,7 +446,8 @@ static int ns_start(struct dvbnss *nss)
if (dns->fe != input)
ddb_dvb_ns_input_start(dns->fe);
ddb_dvb_ns_input_start(input);
/* printk("ns start ns %u, fe %u link %u\n", dns->nr, dns->fe->nr, dns->fe->port->lnr); */
/* printk("ns start ns %u, fe %u link %u\n",
dns->nr, dns->fe->nr, dns->fe->port->lnr); */
ddbwritel(dev, reg | (dns->fe->nr << 8) | (dns->fe->port->lnr << 16),
STREAM_CONTROL(dns->nr));
return 0;

View File

@ -166,7 +166,8 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
stat = pci_enable_msi_range(dev->pdev, 1, 2);
if (stat >= 1) {
dev->msi = stat;
pr_info("DDBridge: using %d MSI interrupt(s)\n", dev->msi);
pr_info("DDBridge: using %d MSI interrupt(s)\n",
dev->msi);
irq_flag = 0;
} else
pr_info("DDBridge: MSI not available.\n");

View File

@ -41,7 +41,7 @@
#include <linux/poll.h>
#include <linux/io.h>
#include <linux/pci.h>
//#include <linux/pci_ids.h>
/*#include <linux/pci_ids.h>*/
#include <linux/timer.h>
#include <linux/i2c.h>
#include <linux/swab.h>
@ -228,7 +228,8 @@ struct ddb_dvb {
int (*i2c_gate_ctrl)(struct dvb_frontend *, int);
int (*set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
int (*set_input)(struct dvb_frontend *fe, int input);
int (*diseqc_send_master_cmd)(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd);
int (*diseqc_send_master_cmd)(struct dvb_frontend *fe,
struct dvb_diseqc_master_cmd *cmd);
};
struct ddb_ci {
@ -462,25 +463,26 @@ static inline u32 ddbreadl0(struct ddb_link *link, u32 adr)
static inline void gtlw(struct ddb_link *link)
{
u32 count = 0;
static u32 max = 0;
static u32 max;
while (1 & ddbreadl0(link, link->regs + 0x10)) {
if (++count == 1024) {
printk("LTO\n");
pr_info("LTO\n");
break;
}
}
if (count > max) {
max = count;
printk("TO=%u\n", max);
pr_info("TO=%u\n", max);
}
if (ddbreadl0(link, link->regs + 0x10) & 0x8000)
printk("link error\n");
pr_err("link error\n");
}
#else
static inline void gtlw(struct ddb_link *link)
{
while (1 & ddbreadl0(link, link->regs + 0x10));
while (1 & ddbreadl0(link, link->regs + 0x10))
;
}
#endif

View File

@ -177,8 +177,10 @@ static int __init octonet_probe(struct platform_device *pdev)
else
dev->link[0].info = &ddb_octonet_tbd;
pr_info("HW %08x REGMAP %08x\n", dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
pr_info("MAC %08x DEVID %08x\n", dev->link[0].ids.mac, dev->link[0].ids.devid);
pr_info("HW %08x REGMAP %08x\n",
dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
pr_info("MAC %08x DEVID %08x\n",
dev->link[0].ids.mac, dev->link[0].ids.devid);
ddbwritel(dev, 0, ETHER_CONTROL);
ddbwritel(dev, 0x00000000, INTERRUPT_ENABLE);