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https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
remove or comment out some unused code
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46641db50e
commit
3c3430cdbc
@ -98,26 +98,6 @@ struct mxl {
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unsigned long tune_time;
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unsigned long tune_time;
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};
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};
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static void le32_to_cpusn(u32 *data, u32 size)
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{
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u32 i;
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for (i = 0; i < size; data++, i += 4)
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le32_to_cpus(data);
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}
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static void flip_data_in_dword(u32 size, u8 *d)
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{
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u32 i;
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u8 t;
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for (i = 0; i < size; i += 4) {
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t = d[i + 3]; d[i + 3] = d[i]; d[i] = t;
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t = d[i + 2]; d[i + 2] = d[i + 1]; d[i + 1] = t;
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}
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}
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static void convert_endian(u8 flag, u32 size, u8 *d)
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static void convert_endian(u8 flag, u32 size, u8 *d)
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{
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{
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u32 i;
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u32 i;
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@ -249,6 +229,7 @@ static int write_register(struct mxl *state, u32 reg, u32 val)
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return stat;
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return stat;
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}
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}
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#if 0
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static int write_register_block(struct mxl *state, u32 reg,
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static int write_register_block(struct mxl *state, u32 reg,
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u32 size, u8 *data)
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u32 size, u8 *data)
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{
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{
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@ -272,6 +253,7 @@ static int write_register_block(struct mxl *state, u32 reg,
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mutex_unlock(&state->base->i2c_lock);
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mutex_unlock(&state->base->i2c_lock);
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return stat;
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return stat;
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}
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}
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#endif
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static int write_firmware_block(struct mxl *state,
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static int write_firmware_block(struct mxl *state,
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u32 reg, u32 size, u8 *regDataPtr)
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u32 reg, u32 size, u8 *regDataPtr)
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@ -375,6 +357,7 @@ static int update_by_mnemonic(struct mxl *state,
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return stat;
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return stat;
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}
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}
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#if 0
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static void extract_from_mnemonic(u32 regAddr, u8 lsbPos, u8 width,
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static void extract_from_mnemonic(u32 regAddr, u8 lsbPos, u8 width,
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u32 *toAddr, u8 *toLsbPos, u8 *toWidth)
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u32 *toAddr, u8 *toLsbPos, u8 *toWidth)
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{
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{
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@ -385,6 +368,7 @@ static void extract_from_mnemonic(u32 regAddr, u8 lsbPos, u8 width,
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if (toWidth)
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if (toWidth)
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*toWidth = width;
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*toWidth = width;
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}
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}
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#endif
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static int firmware_is_alive(struct mxl *state)
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static int firmware_is_alive(struct mxl *state)
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{
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{
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@ -397,6 +381,8 @@ static int firmware_is_alive(struct mxl *state)
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return 0;
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return 0;
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if (hb1 == hb0)
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if (hb1 == hb0)
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return 0;
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return 0;
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pr_info("mxl5xx: Hydra FW alive. Hail!\n");
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return 1;
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return 1;
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}
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}
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@ -470,9 +456,9 @@ static int CfgDemodAbortTune(struct mxl *state)
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&cmdBuff[0]);
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&cmdBuff[0]);
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}
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}
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#if 0
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static int reset_fec_counter(struct mxl *state)
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static int reset_fec_counter(struct mxl *state)
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{
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{
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MXL_HYDRA_DEMOD_ABORT_TUNE_T abortTuneCmd;
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u32 demodIndex = (u32) state->demod;
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u32 demodIndex = (u32) state->demod;
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u8 cmdSize = sizeof(u32);
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u8 cmdSize = sizeof(u32);
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u8 cmdBuff[MXL_HYDRA_OEM_MAX_CMD_BUFF_LEN];
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u8 cmdBuff[MXL_HYDRA_OEM_MAX_CMD_BUFF_LEN];
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@ -482,6 +468,7 @@ static int reset_fec_counter(struct mxl *state)
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return send_command(state, cmdSize + MXL_HYDRA_CMD_HEADER_SIZE,
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return send_command(state, cmdSize + MXL_HYDRA_CMD_HEADER_SIZE,
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&cmdBuff[0]);
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&cmdBuff[0]);
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}
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}
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#endif
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static int send_master_cmd(struct dvb_frontend *fe,
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static int send_master_cmd(struct dvb_frontend *fe,
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struct dvb_diseqc_master_cmd *cmd)
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struct dvb_diseqc_master_cmd *cmd)
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@ -1118,8 +1105,6 @@ static int firmware_download(struct mxl *state, u8 *mbin, u32 mbin_len)
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if (!firmware_is_alive(state))
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if (!firmware_is_alive(state))
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return -1;
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return -1;
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pr_info("mxl5xx: Hydra FW alive. Hail!\n");
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/* sometimes register values are wrong shortly
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/* sometimes register values are wrong shortly
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after first heart beats */
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after first heart beats */
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msleep(50);
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msleep(50);
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@ -1437,6 +1422,7 @@ static int config_ts(struct mxl *state, MXL_HYDRA_DEMOD_ID_E demodId,
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{XPT_NCO_COUNT_MIN4}, {XPT_NCO_COUNT_MIN5},
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{XPT_NCO_COUNT_MIN4}, {XPT_NCO_COUNT_MIN5},
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{XPT_NCO_COUNT_MIN6}, {XPT_NCO_COUNT_MIN7} };
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{XPT_NCO_COUNT_MIN6}, {XPT_NCO_COUNT_MIN7} };
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#if 0
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MXL_REG_FIELD_T mxl561_xpt_ts_sync[MXL_HYDRA_DEMOD_ID_6] = {
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MXL_REG_FIELD_T mxl561_xpt_ts_sync[MXL_HYDRA_DEMOD_ID_6] = {
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{PAD_MUX_DIGIO_25_PINMUX_SEL}, {PAD_MUX_DIGIO_20_PINMUX_SEL},
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{PAD_MUX_DIGIO_25_PINMUX_SEL}, {PAD_MUX_DIGIO_20_PINMUX_SEL},
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{PAD_MUX_DIGIO_17_PINMUX_SEL}, {PAD_MUX_DIGIO_11_PINMUX_SEL},
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{PAD_MUX_DIGIO_17_PINMUX_SEL}, {PAD_MUX_DIGIO_11_PINMUX_SEL},
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@ -1445,6 +1431,7 @@ static int config_ts(struct mxl *state, MXL_HYDRA_DEMOD_ID_E demodId,
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{PAD_MUX_DIGIO_26_PINMUX_SEL}, {PAD_MUX_DIGIO_19_PINMUX_SEL},
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{PAD_MUX_DIGIO_26_PINMUX_SEL}, {PAD_MUX_DIGIO_19_PINMUX_SEL},
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{PAD_MUX_DIGIO_18_PINMUX_SEL}, {PAD_MUX_DIGIO_10_PINMUX_SEL},
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{PAD_MUX_DIGIO_18_PINMUX_SEL}, {PAD_MUX_DIGIO_10_PINMUX_SEL},
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{PAD_MUX_DIGIO_09_PINMUX_SEL}, {PAD_MUX_DIGIO_02_PINMUX_SEL}};
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{PAD_MUX_DIGIO_09_PINMUX_SEL}, {PAD_MUX_DIGIO_02_PINMUX_SEL}};
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#endif
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demodId = state->base->ts_map[demodId];
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demodId = state->base->ts_map[demodId];
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@ -1609,6 +1596,7 @@ static int config_mux(struct mxl *state)
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return 0;
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return 0;
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}
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}
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#if 0
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static int config_dis(struct mxl *state, u32 id)
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static int config_dis(struct mxl *state, u32 id)
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{
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{
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MXL_HYDRA_DISEQC_ID_E diseqcId = id;
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MXL_HYDRA_DISEQC_ID_E diseqcId = id;
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@ -1630,6 +1618,7 @@ static int config_dis(struct mxl *state, u32 id)
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return send_command(state, cmdSize + MXL_HYDRA_CMD_HEADER_SIZE,
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return send_command(state, cmdSize + MXL_HYDRA_CMD_HEADER_SIZE,
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&cmdBuff[0]);
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&cmdBuff[0]);
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}
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}
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#endif
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static int load_fw(struct mxl *state, struct mxl5xx_cfg *cfg)
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static int load_fw(struct mxl *state, struct mxl5xx_cfg *cfg)
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{
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{
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