mirror of
https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
initial support for SDR IQ card
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parent
dc45a08c10
commit
448b07091d
@ -267,7 +267,11 @@ int main(int argc, char **argv)
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break;
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case 0x0220:
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fname="SDRModulatorV1A_DD01_0220.fpga";
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printf("SDRModulator\n");
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printf("SDRModulator ATV\n");
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break;
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case 0x0221:
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fname="SDRModulatorV1A_DD01_0221_IQ.fpga";
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printf("SDRModulator IQ\n");
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break;
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default:
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printf("UNKNOWN\n");
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@ -517,10 +517,20 @@ static const struct ddb_info ddb_mod_fsm_4 = {
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.lostlock_irq = 9,
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};
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static const struct ddb_info ddb_sdr = {
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static const struct ddb_info ddb_sdr_atv = {
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.type = DDB_MOD,
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.name = "Digital Devices SDR",
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.version = 3,
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.name = "Digital Devices SDR ATV",
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.version = 16,
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.regmap = &octopus_sdr_map,
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.port_num = 16,
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.temp_num = 1,
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.tempmon_irq = 8,
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};
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static const struct ddb_info ddb_sdr_iq = {
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.type = DDB_MOD,
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.name = "Digital Devices SDR IQ",
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.version = 17,
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.regmap = &octopus_sdr_map,
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.port_num = 16,
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.temp_num = 1,
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@ -777,7 +787,8 @@ static const struct ddb_device_id ddb_device_ids[] = {
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DDB_DEVID(0x0210, 0x0001, ddb_mod_fsm_24),
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DDB_DEVID(0x0210, 0x0002, ddb_mod_fsm_16),
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DDB_DEVID(0x0210, 0x0003, ddb_mod_fsm_8),
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DDB_DEVID(0x0220, 0x0001, ddb_sdr),
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DDB_DEVID(0x0220, 0x0001, ddb_sdr_atv),
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DDB_DEVID(0x0221, 0x0001, ddb_sdr_iq),
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/* testing on OctopusNet Pro */
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DDB_DEVID(0x0320, 0xffff, ddb_octopro_hdin),
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@ -424,6 +424,7 @@ static const struct pci_device_id ddb_id_table[] __devinitconst = {
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DDB_DEVICE_ANY(0x0203),
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DDB_DEVICE_ANY(0x0210),
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DDB_DEVICE_ANY(0x0220),
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DDB_DEVICE_ANY(0x0221),
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DDB_DEVICE_ANY(0x0320),
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DDB_DEVICE_ANY(0x0321),
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DDB_DEVICE_ANY(0x0322),
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@ -292,7 +292,7 @@ int ddbridge_mod_output_start(struct ddb_output *output)
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struct ddb_mod *mod = &dev->mod[output->nr];
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u32 Symbolrate = mod->symbolrate;
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if (dev->link[0].info->version < 3)
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if (dev->link[0].info->version < 16)
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mod_calc_rateinc(mod);
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mod->LastInPacketCount = 0;
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@ -311,7 +311,7 @@ int ddbridge_mod_output_start(struct ddb_output *output)
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mod->State = CM_STARTUP;
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mod->StateCounter = CM_STARTUP_DELAY;
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if (dev->link[0].info->version == 3)
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if (dev->link[0].info->version >= 16)
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mod->Control = 0xfffffff0 &
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ddbreadl(dev, CHANNEL_CONTROL(output->nr));
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else
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@ -363,11 +363,11 @@ int ddbridge_mod_output_start(struct ddb_output *output)
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CHANNEL_SETTINGS(output->nr));
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mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ |
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CHANNEL_CONTROL_ENABLE_DVB);
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} else if (dev->link[0].info->version == 3) {
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} else if (dev->link[0].info->version >= 16) {
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mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ |
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CHANNEL_CONTROL_ENABLE_DVB);
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}
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if (dev->link[0].info->version < 3) {
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if (dev->link[0].info->version < 16) {
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mod_set_rateinc(dev, output->nr);
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mod_set_incs(output);
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}
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@ -1499,7 +1499,7 @@ static int mod3_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
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static int mod_prop_proc(struct ddb_mod *mod, struct dtv_property *tvp)
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{
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if (mod->port->dev->link[0].info->version == 3)
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if (mod->port->dev->link[0].info->version >= 16)
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return mod3_prop_proc(mod, tvp);
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switch (tvp->cmd) {
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case MODULATOR_SYMBOL_RATE:
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@ -1592,7 +1592,7 @@ int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg)
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(struct dtv_properties __user *) parg;
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int i, ret = 0;
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if (dev->link[0].info->version == 3 && cmd != FE_SET_PROPERTY)
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if (dev->link[0].info->version >= 16 && cmd != FE_SET_PROPERTY)
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return -EINVAL;
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mutex_lock(&dev->ioctl_mutex);
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switch (cmd) {
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@ -1852,6 +1852,41 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
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return ret;
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}
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static int mod_init_sdr_iq(struct ddb *dev, u32 Frequency)
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{
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int streams = dev->link[0].info->port_num;
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int i, ret = 0;
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ret = mod_setup_max2871(dev, max2871_sdr);
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if (ret)
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dev_err(dev->dev, "PLL setup failed\n");
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ret = rfdac_init(dev);
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if (ret)
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ret = rfdac_init(dev);
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if (ret)
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dev_err(dev->dev, "RFDAC setup failed\n");
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ddbwritel(dev, 0x3000, 0x244);
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ddbwritel(dev, 0x01, 0x240);
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//mod3_set_base_frequency(dev, 602000000);
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for (i = 0; i < streams; i++) {
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struct ddb_mod *mod = &dev->mod[i];
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ddbwritel(dev, 0x00, SDR_CHANNEL_CONTROL(i));
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ddbwritel(dev, 0x306, SDR_CHANNEL_CONFIG(i));
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ddbwritel(dev, 0x72492492, SDR_CHANNEL_ARICW(i));
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//mod3_set_frequency(mod, Frequency + 8000000 * i);
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ddbwritel(dev, 0x00011f80, SDR_CHANNEL_RGAIN(i));
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}
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ddbwritel(dev, -699050667, SDR_CHANNEL_CFCW(0));
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ddbwritel(dev, 699050667, SDR_CHANNEL_CFCW(1));
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mod_set_attenuator(dev, 0);
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mod_set_vga(dev, 64);
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return ret;
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}
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int ddbridge_mod_init(struct ddb *dev)
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{
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switch (dev->link[0].info->version) {
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@ -1860,8 +1895,10 @@ int ddbridge_mod_init(struct ddb *dev)
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return mod_init_1(dev, 722000000);
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case 2:
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return mod_init_2(dev, 114000000);
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case 3:
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case 16:
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return mod_init_3(dev, 503250000);
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case 17:
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return mod_init_sdr_iq(dev, 503250000);
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default:
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return -1;
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}
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