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https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
rename M4_ defines to MX_
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parent
7118ecd9f5
commit
4943ea294a
@ -274,7 +274,7 @@ void print_info(int dev, uint32_t link, uint8_t demod, struct mci_result *res)
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if (res->status == MCI_DEMOD_LOCKED) {
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switch (res->mode) {
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case 0:
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case M4_MODE_DVBSX:
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case MX_MODE_DVBSX:
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if (res->dvbs2_signal_info.standard != 1) {
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int short_frame = 0, pilots = 0;
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char *modcod = "unknown";
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@ -308,10 +308,10 @@ void print_info(int dev, uint32_t link, uint8_t demod, struct mci_result *res)
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}
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printf("Inversion: %s\n", (res->dvbs2_signal_info.roll_off & 0x80) ? "on": "off");
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break;
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case M4_MODE_DVBT:
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case MX_MODE_DVBT:
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printf("Locked DVB-T\n");
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break;
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case M4_MODE_DVBT2:
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case MX_MODE_DVBT2:
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printf("Locked DVB-T2\n");
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break;
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}
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@ -404,7 +404,7 @@ static int read_status(struct dvb_frontend *fe, enum fe_status *status)
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ddb_mci_get_strength(fe);
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if (res.status == MCI_DEMOD_WAIT_SIGNAL)
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*status = 0x01;
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else if (res.status == M4_DEMOD_WAIT_TS)
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else if (res.status == MX_DEMOD_WAIT_TS)
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*status = 0x03;
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else if (res.status == MCI_DEMOD_TIMEOUT)
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*status = FE_TIMEDOUT;
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@ -96,8 +96,8 @@
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#define SX8_DEMOD_IQ_MODE (1)
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#define SX8_DEMOD_WAIT_MATYPE (3)
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#define M4_DEMOD_WAIT_TS (6)
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#define M4_DEMOD_C2SCAN (16)
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#define MX_DEMOD_WAIT_TS (6)
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#define MX_DEMOD_C2SCAN (16)
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#define MCI_STATUS_OK (0x00)
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#define MCI_STATUS_UNSUPPORTED (0x80)
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@ -142,42 +142,45 @@
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#define SX8_CMD_ENABLE_IQOUTPUT (0x44)
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#define SX8_CMD_DISABLE_IQOUTPUT (0x45)
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#define M4_CMD_GET_L1INFO (0x50)
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#define M4_CMD_GET_IDS (0x51)
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#define M4_CMD_GET_DVBT_TPS (0x52)
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#define MX_CMD_GET_L1INFO (0x50)
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#define MX_CMD_GET_IDS (0x51)
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#define MX_CMD_GET_DVBT_TPS (0x52)
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#define MCI_CMD_GET_BBHEADER (0x53)
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#define M4_CMD_GET_ISDBT_TMCC (0x54)
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#define M4_CMD_GET_ISDBS_TMCC (0x55)
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#define M4_CMD_GET_ISDBC_TSMF (0x56)
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#define MX_CMD_GET_ISDBT_TMCC (0x54)
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#define MX_CMD_GET_ISDBS_TMCC (0x55)
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#define MX_CMD_GET_ISDBC_TSMF (0x56)
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#define M4_CMD_GET_BBHEADER (MCI_CMD_GET_BBHEADER)
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#define MX_CMD_GET_BBHEADER (MCI_CMD_GET_BBHEADER)
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#define M4_L1INFO_SEL_PRE (0)
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#define M4_L1INFO_SEL_DSINFO (1)
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#define M4_L1INFO_SEL_PLPINFO (2)
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#define M4_L1INFO_SEL_PLPINFO_C (3)
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#define M4_L1INFO_SEL_SETID (0x80)
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#define MX_L1INFO_SEL_PRE (0)
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#define MX_L1INFO_SEL_DSINFO (1)
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#define MX_L1INFO_SEL_PLPINFO (2)
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#define MX_L1INFO_SEL_PLPINFO_C (3)
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#define MX_L1INFO_SEL_SETID (0x80)
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#define MCI_BANDWIDTH_EXTENSION (0x80) // currently used only for J83B in Japan
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#define M4_MODE_DVBSX (2)
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#define M4_MODE_DVBC (3)
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#define M4_MODE_DVBT (4)
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#define M4_MODE_DVBT2 (5)
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#define M4_MODE_DVBC2 (6)
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#define M4_MODE_J83B (7)
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#define M4_MODE_ISDBT (8)
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#define M4_MODE_ISDBC (9)
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#define M4_MODE_ISDBS (10)
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#define MX_MODE_DVBSX (2)
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#define MX_MODE_DVBC (3)
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#define MX_MODE_DVBT (4)
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#define MX_MODE_DVBT2 (5)
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#define MX_MODE_DVBC2 (6)
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#define MX_MODE_J83B (7)
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#define MX_MODE_ISDBT (8)
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#define MX_MODE_ISDBC (9)
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#define MX_MODE_ISDBS (10)
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#define MX_MODE_ISDBS3 (11)
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#define MX_MODE_ATSC (12)
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#define MX_MODE_ATSC3 (13)
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#define M4_DVBC_CONSTELLATION_16QAM (0)
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#define M4_DVBC_CONSTELLATION_32QAM (1)
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#define M4_DVBC_CONSTELLATION_64QAM (2) // also valid for J83B and ISDB-C
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#define M4_DVBC_CONSTELLATION_128QAM (3)
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#define M4_DVBC_CONSTELLATION_256QAM (4) // also valid for J83B and ISDB-C
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#define MX_DVBC_CONSTELLATION_16QAM (0)
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#define MX_DVBC_CONSTELLATION_32QAM (1)
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#define MX_DVBC_CONSTELLATION_64QAM (2) // also valid for J83B and ISDB-C
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#define MX_DVBC_CONSTELLATION_128QAM (3)
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#define MX_DVBC_CONSTELLATION_256QAM (4) // also valid for J83B and ISDB-C
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#define M4_SIGNALINFO_FLAG_CHANGE (0x01)
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#define M4_SIGNALINFO_FLAG_EWS (0x02)
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#define MX_SIGNALINFO_FLAG_CHANGE (0x01)
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#define MX_SIGNALINFO_FLAG_EWS (0x02)
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#define SX8_ROLLOFF_35 0
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#define SX8_ROLLOFF_25 1
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