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https://github.com/DigitalDevices/dddvb.git
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Set input IQ swap to match hardware, fiexes sign issue with offset
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parent
f20b16cd12
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@ -1139,6 +1139,9 @@ static int probe(struct stv *state)
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write_reg(state, RSTV0910_CFGEXT, 0x02); /* CFGEXT */
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write_reg(state, RSTV0910_CFGEXT, 0x02); /* CFGEXT */
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write_reg(state, RSTV0910_GENCFG, 0x15); /* GENCFG */
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write_reg(state, RSTV0910_GENCFG, 0x15); /* GENCFG */
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write_reg(state, RSTV0910_P1_TNRCFG2, 0x02); /* IQSWAP = 0 */
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write_reg(state, RSTV0910_P2_TNRCFG2, 0x82); /* IQSWAP = 1 */
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write_reg(state, RSTV0910_P1_CAR3CFG, 0x02);
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write_reg(state, RSTV0910_P1_CAR3CFG, 0x02);
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write_reg(state, RSTV0910_P2_CAR3CFG, 0x02);
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write_reg(state, RSTV0910_P2_CAR3CFG, 0x02);
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write_reg(state, RSTV0910_P1_DMDCFG4, 0x04);
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write_reg(state, RSTV0910_P1_DMDCFG4, 0x04);
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@ -1251,7 +1254,7 @@ static int get_frequency_offset(struct stv *state, s32 *off)
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derot = ((u32) cfr2 << 16) | ((u32)cfr1 << 8) | cfr0;
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derot = ((u32) cfr2 << 16) | ((u32)cfr1 << 8) | cfr0;
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if (derot & (1<<23))
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if (derot & (1<<23))
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derot |= 0xFF000000;
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derot |= 0xFF000000;
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*off = - (s32) (((s64) derot * (s64) state->base->mclk) >> 24);
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*off = (s32) (((s64) derot * (s64) state->base->mclk) >> 24);
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//pr_info("foff = %d\n", *off);
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//pr_info("foff = %d\n", *off);
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return 0;
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return 0;
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}
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}
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