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https://github.com/DigitalDevices/dddvb.git
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fixed regression for FSM modulators
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bf0315bcc0
commit
7602ecf3e5
@ -286,7 +286,7 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
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ddbwritel(dev, 0, DMA_BASE_WRITE);
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ddbwritel(dev, 0, DMA_BASE_WRITE);
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if (dev->link[0].info->type == DDB_MOD) {
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if (dev->link[0].info->type == DDB_MOD) {
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if (dev->link[0].info->version == 1)
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if (dev->link[0].info->version <= 1)
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if (ddbreadl(dev, 0x1c) == 4)
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if (ddbreadl(dev, 0x1c) == 4)
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dev->link[0].info->port_num = 4;
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dev->link[0].info->port_num = 4;
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}
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}
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@ -516,6 +516,7 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan,
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else
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else
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ddbwritel(dev, FSM_GAIN_N96, FSM_GAIN);
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ddbwritel(dev, FSM_GAIN_N96, FSM_GAIN);
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ddbwritel(dev, FSM_CONTROL_ENABLE, FSM_CONTROL);
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dev->link[0].info->port_num = MaxUsedChannels;
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dev->link[0].info->port_num = MaxUsedChannels;
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return status;
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return status;
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@ -1644,6 +1645,13 @@ static int mod_init_2(struct ddb *dev, u32 Frequency)
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mod_set_symbolrate(mod, 6900000);
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mod_set_symbolrate(mod, 6900000);
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mod_set_frequency(mod, dev->mod_base.frequency + i * 8000000);
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mod_set_frequency(mod, dev->mod_base.frequency + i * 8000000);
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}
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}
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if (streams <= 8)
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mod_set_vga(dev, RF_VGA_GAIN_N8);
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else if (streams <= 16)
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mod_set_vga(dev, RF_VGA_GAIN_N16);
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else
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mod_set_vga(dev, RF_VGA_GAIN_N24);
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mod_set_attenuator(dev, 0);
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mod_set_attenuator(dev, 0);
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return 0;
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return 0;
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}
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}
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