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https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
change dma buffer number and size from defines to module parameters
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e239a6d772
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@ -66,7 +66,16 @@ MODULE_PARM_DESC(no_init, "do not initialize most devices");
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static int stv0910_single;
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static int stv0910_single;
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module_param(stv0910_single, int, 0444);
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module_param(stv0910_single, int, 0444);
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MODULE_PARM_DESC(no_init, "use stv0910 cards as single demods");
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MODULE_PARM_DESC(stv0910_single, "use stv0910 cards as single demods");
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static int dma_buf_num = 8;
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module_param(dma_buf_num, int, 0444);
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MODULE_PARM_DESC(dma_buf_num, "dma buffer number, possible values: 8-32");
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static int dma_buf_size = 21;
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module_param(dma_buf_size, int, 0444);
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MODULE_PARM_DESC(dma_buf_size,
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"dma buffer size as multiple of 128*47, possible values: 1-43");
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#define DDB_MAX_ADAPTER 64
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#define DDB_MAX_ADAPTER 64
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static struct ddb *ddbs[DDB_MAX_ADAPTER];
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static struct ddb *ddbs[DDB_MAX_ADAPTER];
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@ -2324,11 +2333,11 @@ static void ddb_dma_init(struct ddb_io *io, int nr, int out)
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io->port->dev->link[0].info->version == 3) {
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io->port->dev->link[0].info->version == 3) {
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dma->num = OUTPUT_DMA_BUFS_SDR;
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dma->num = OUTPUT_DMA_BUFS_SDR;
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dma->size = OUTPUT_DMA_SIZE_SDR;
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dma->size = OUTPUT_DMA_SIZE_SDR;
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dma->div = OUTPUT_DMA_IRQ_DIV_SDR;
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dma->div = 1;
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} else {
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} else {
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dma->num = OUTPUT_DMA_BUFS;
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dma->num = dma_buf_num;
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dma->size = OUTPUT_DMA_SIZE;
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dma->size = dma_buf_size * 128 * 47;
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dma->div = OUTPUT_DMA_IRQ_DIV;
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dma->div = 1;
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}
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}
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} else {
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} else {
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#ifdef DDB_USE_WORK
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#ifdef DDB_USE_WORK
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@ -2338,9 +2347,9 @@ static void ddb_dma_init(struct ddb_io *io, int nr, int out)
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#endif
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#endif
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dma->regs = rm->idma->base + rm->idma->size * nr;
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dma->regs = rm->idma->base + rm->idma->size * nr;
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dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr;
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dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr;
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dma->num = INPUT_DMA_BUFS;
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dma->num = dma_buf_num;
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dma->size = INPUT_DMA_SIZE;
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dma->size = dma_buf_size * 128 * 47;
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dma->div = INPUT_DMA_IRQ_DIV;
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dma->div = 1;
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}
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}
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ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma));
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ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma));
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dev_info(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n",
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dev_info(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n",
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@ -4436,6 +4445,16 @@ int ddb_exit_ddbridge(int stage, int error)
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int ddb_init_ddbridge(void)
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int ddb_init_ddbridge(void)
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{
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{
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if (dma_buf_num < 8)
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dma_buf_num = 8;
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if (dma_buf_num > 32)
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dma_buf_num = 32;
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if (dma_buf_size < 1)
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dma_buf_size = 1;
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if (dma_buf_size > 43)
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dma_buf_size = 43;
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printk("dma_buf_num = %u, dma_buf_size = %u\n", dma_buf_num, dma_buf_size);
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if (ddb_class_create() < 0)
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if (ddb_class_create() < 0)
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return -1;
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return -1;
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ddb_wq = alloc_workqueue("ddbridge", 0, 0);
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ddb_wq = alloc_workqueue("ddbridge", 0, 0);
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@ -176,32 +176,9 @@ struct ddb_info {
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const struct ddb_regmap *regmap;
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const struct ddb_regmap *regmap;
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};
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};
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/* DMA_SIZE MUST be smaller than 256k and
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* MUST be divisible by 188 and 128 !!!
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*/
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#define DMA_MAX_BUFS 32 /* hardware table limit */
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#define DMA_MAX_BUFS 32 /* hardware table limit */
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#ifdef SMALL_DMA_BUFS
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#define INPUT_DMA_BUFS 32
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#define INPUT_DMA_SIZE (128 * 47 * 5)
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#define INPUT_DMA_IRQ_DIV 1
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#define OUTPUT_DMA_BUFS 32
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#define OUTPUT_DMA_SIZE (128 * 47 * 5)
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#define OUTPUT_DMA_IRQ_DIV 1
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#else
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#define INPUT_DMA_BUFS 8
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#define INPUT_DMA_SIZE (128 * 47 * 21)
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#define INPUT_DMA_IRQ_DIV 1
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#define OUTPUT_DMA_BUFS 8
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#define OUTPUT_DMA_SIZE (128 * 47 * 21)
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#define OUTPUT_DMA_IRQ_DIV 1
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#endif
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#define OUTPUT_DMA_BUFS_SDR 32
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#define OUTPUT_DMA_BUFS_SDR 32
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#define OUTPUT_DMA_SIZE_SDR (256 * 1024)
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#define OUTPUT_DMA_SIZE_SDR (256 * 1024)
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#define OUTPUT_DMA_IRQ_DIV_SDR 1
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struct ddb;
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struct ddb;
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struct ddb_port;
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struct ddb_port;
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