mirror of
https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
strict checkpatch style fixes
This commit is contained in:
parent
2b6babfdc0
commit
b2ca06e639
@ -85,7 +85,6 @@ static struct ddb *ddbs[DDB_MAX_ADAPTER];
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DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
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DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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@ -123,7 +122,6 @@ static void ddb_set_dma_tables(struct ddb *dev)
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}
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}
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}
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}
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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@ -218,9 +216,10 @@ static int ddb_redirect(u32 i, u32 p)
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if (input->redi) {
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if (input->redi) {
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input2->redi = input->redi;
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input2->redi = input->redi;
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input->redi = 0;
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input->redi = 0;
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} else
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} else {
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input2->redi = input;
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input2->redi = input;
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}
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}
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}
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input->redo = port->output;
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input->redo = port->output;
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port->output->redi = input;
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port->output->redi = input;
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@ -247,10 +246,11 @@ static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
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dir ? DMA_TO_DEVICE :
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dir ? DMA_TO_DEVICE :
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DMA_FROM_DEVICE);
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DMA_FROM_DEVICE);
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kfree(dma->vbuf[i]);
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kfree(dma->vbuf[i]);
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} else
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} else {
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dma_free_coherent(&pdev->dev, dma->size,
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dma_free_coherent(&pdev->dev, dma->size,
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dma->vbuf[i],
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dma->vbuf[i],
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dma->pbuf[i]);
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dma->pbuf[i]);
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}
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dma->vbuf[i] = 0;
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dma->vbuf[i] = 0;
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}
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}
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}
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}
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@ -391,9 +391,9 @@ static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
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max_bitrate = 0;
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max_bitrate = 0;
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gap = 0;
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gap = 0;
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if (bitrate != 72000) {
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if (bitrate != 72000) {
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if (bitrate >= 96000)
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if (bitrate >= 96000) {
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*con |= 0x800;
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*con |= 0x800;
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else {
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} else {
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*con |= 0x1000;
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*con |= 0x1000;
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nco = (bitrate *
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nco = (bitrate *
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8192 + 71999) / 72000;
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8192 + 71999) / 72000;
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@ -449,9 +449,9 @@ static void ddb_output_start(struct ddb_output *output)
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output->dma->stat = 0;
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output->dma->stat = 0;
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ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
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ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
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}
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}
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if (output->port->class == DDB_PORT_MOD)
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if (output->port->class == DDB_PORT_MOD) {
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ddbridge_mod_output_start(output);
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ddbridge_mod_output_start(output);
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else {
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} else {
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if (output->port->input[0]->port->class == DDB_PORT_LOOP)
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if (output->port->input[0]->port->class == DDB_PORT_LOOP)
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con = (1UL << 13) | 0x14;
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con = (1UL << 13) | 0x14;
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else
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else
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@ -544,7 +544,6 @@ static void ddb_input_start(struct ddb_input *input)
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}
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}
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}
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}
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int ddb_dvb_ns_input_start(struct ddb_input *input)
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int ddb_dvb_ns_input_start(struct ddb_input *input)
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{
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{
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struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
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struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
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@ -709,8 +708,6 @@ static u32 ddb_input_free_bytes(struct ddb_input *input)
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return 0;
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return 0;
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}
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}
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static s32 ddb_output_used_bufs(struct ddb_output *output)
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static s32 ddb_output_used_bufs(struct ddb_output *output)
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{
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{
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u32 idx, off, stat, ctrl;
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u32 idx, off, stat, ctrl;
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@ -940,8 +937,9 @@ static int ts_open(struct inode *inode, struct file *file)
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} else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
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} else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
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if (!output)
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if (!output)
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return -EINVAL;
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return -EINVAL;
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} else
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} else {
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return -EINVAL;
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return -EINVAL;
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}
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err = dvb_generic_open(inode, file);
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err = dvb_generic_open(inode, file);
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if (err < 0)
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if (err < 0)
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return err;
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return err;
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@ -982,6 +980,7 @@ static int mod_open(struct inode *inode, struct file *file)
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ddb_output_start(output);
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ddb_output_start(output);
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return err;
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return err;
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}
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}
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static const struct file_operations ci_fops = {
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static const struct file_operations ci_fops = {
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.owner = THIS_MODULE,
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.owner = THIS_MODULE,
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.read = ts_read,
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.read = ts_read,
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@ -1000,7 +999,6 @@ static struct dvb_device dvbdev_ci = {
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.fops = &ci_fops,
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.fops = &ci_fops,
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};
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};
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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@ -1051,19 +1049,18 @@ static int demod_attach_drxk(struct ddb_input *input)
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{
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{
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struct i2c_adapter *i2c = &input->port->i2c->adap;
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struct i2c_adapter *i2c = &input->port->i2c->adap;
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struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
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struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
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struct dvb_frontend *fe;
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fe = dvb->fe = dvb_attach(drxk_attach,
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dvb->fe = dvb_attach(drxk_attach,
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i2c, 0x29 + (input->nr & 1),
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i2c, 0x29 + (input->nr & 1),
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&dvb->fe2);
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&dvb->fe2);
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if (!fe) {
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if (!dvb->fe) {
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dev_err(input->port->dev->dev,
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dev_err(input->port->dev->dev,
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"No DRXK found!\n");
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"No DRXK found!\n");
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return -ENODEV;
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return -ENODEV;
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}
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}
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fe->sec_priv = input;
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dvb->fe->sec_priv = input;
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dvb->i2c_gate_ctrl = fe->ops.i2c_gate_ctrl;
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dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
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fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
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dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
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return 0;
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return 0;
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}
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}
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#endif
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#endif
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@ -1072,23 +1069,22 @@ static int demod_attach_cxd2843(struct ddb_input *input, int par, int osc24)
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{
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{
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struct i2c_adapter *i2c = &input->port->i2c->adap;
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struct i2c_adapter *i2c = &input->port->i2c->adap;
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struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
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struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
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struct dvb_frontend *fe;
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struct cxd2843_cfg cfg;
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struct cxd2843_cfg cfg;
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cfg.adr = (input->nr & 1) ? 0x6d : 0x6c;
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cfg.adr = (input->nr & 1) ? 0x6d : 0x6c;
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cfg.ts_clock = par ? 0 : 1;
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cfg.ts_clock = par ? 0 : 1;
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cfg.parallel = par ? 1 : 0;
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cfg.parallel = par ? 1 : 0;
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cfg.osc = osc24 ? 24000000 : 20500000;
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cfg.osc = osc24 ? 24000000 : 20500000;
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fe = dvb->fe = dvb_attach(cxd2843_attach, i2c, &cfg);
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dvb->fe = dvb_attach(cxd2843_attach, i2c, &cfg);
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if (!dvb->fe) {
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if (!dvb->fe) {
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dev_err(input->port->dev->dev,
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dev_err(input->port->dev->dev,
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"No cxd2837/38/43/54 found!\n");
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"No cxd2837/38/43/54 found!\n");
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return -ENODEV;
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return -ENODEV;
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}
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}
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fe->sec_priv = input;
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dvb->fe->sec_priv = input;
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dvb->i2c_gate_ctrl = fe->ops.i2c_gate_ctrl;
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dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
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fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
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dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
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return 0;
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return 0;
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}
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}
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@ -1096,13 +1092,12 @@ static int demod_attach_stv0367dd(struct ddb_input *input)
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{
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{
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struct i2c_adapter *i2c = &input->port->i2c->adap;
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struct i2c_adapter *i2c = &input->port->i2c->adap;
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struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
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struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
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struct dvb_frontend *fe;
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struct stv0367_cfg cfg = { .cont_clock = 0 };
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struct stv0367_cfg cfg = { .cont_clock = 0 };
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cfg.adr = 0x1f - (input->nr & 1);
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cfg.adr = 0x1f - (input->nr & 1);
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if (input->port->dev->link[input->port->lnr].info->con_clock)
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if (input->port->dev->link[input->port->lnr].info->con_clock)
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cfg.cont_clock = 1;
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cfg.cont_clock = 1;
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fe = dvb->fe = dvb_attach(stv0367_attach, i2c,
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dvb->fe = dvb_attach(stv0367_attach, i2c,
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&cfg,
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&cfg,
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&dvb->fe2);
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&dvb->fe2);
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if (!dvb->fe) {
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if (!dvb->fe) {
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@ -1110,9 +1105,9 @@ static int demod_attach_stv0367dd(struct ddb_input *input)
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"No stv0367 found!\n");
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"No stv0367 found!\n");
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return -ENODEV;
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return -ENODEV;
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}
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}
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fe->sec_priv = input;
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dvb->fe->sec_priv = input;
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dvb->i2c_gate_ctrl = fe->ops.i2c_gate_ctrl;
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dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
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fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
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dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
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return 0;
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return 0;
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}
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}
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@ -1648,7 +1643,6 @@ static int max_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
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static int max_enable_high_lnb_voltage(struct dvb_frontend *fe, long arg)
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static int max_enable_high_lnb_voltage(struct dvb_frontend *fe, long arg)
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{
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{
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return 0;
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return 0;
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}
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}
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@ -1817,7 +1811,8 @@ static void dvb_input_detach(struct ddb_input *input)
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/* fallthrough */
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/* fallthrough */
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case 0x30:
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case 0x30:
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dvb_frontend_detach(dvb->fe);
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dvb_frontend_detach(dvb->fe);
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dvb->fe = dvb->fe2 = NULL;
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dvb->fe = NULL;
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dvb->fe2 = NULL;
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/* fallthrough */
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/* fallthrough */
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case 0x21:
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case 0x21:
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if (input->port->dev->ns_num)
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if (input->port->dev->ns_num)
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@ -1960,7 +1955,8 @@ static int dvb_input_attach(struct ddb_input *input)
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DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
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DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
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dvbdemux->start_feed = start_feed;
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dvbdemux->start_feed = start_feed;
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dvbdemux->stop_feed = stop_feed;
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dvbdemux->stop_feed = stop_feed;
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dvbdemux->filternum = dvbdemux->feednum = 256;
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dvbdemux->filternum = 256;
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dvbdemux->feednum = 256;
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ret = dvb_dmx_init(dvbdemux);
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ret = dvb_dmx_init(dvbdemux);
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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@ -1993,7 +1989,8 @@ static int dvb_input_attach(struct ddb_input *input)
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return ret;
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return ret;
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dvb->attached = 0x21;
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dvb->attached = 0x21;
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}
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}
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dvb->fe = dvb->fe2 = NULL;
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dvb->fe = NULL;
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dvb->fe2 = NULL;
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switch (port->type) {
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switch (port->type) {
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case DDB_TUNER_MXL5XX:
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case DDB_TUNER_MXL5XX:
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if (fe_attach_mxl5xx(input) < 0)
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if (fe_attach_mxl5xx(input) < 0)
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@ -2093,7 +2090,6 @@ static int dvb_input_attach(struct ddb_input *input)
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return 0;
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return 0;
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}
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}
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static int port_has_encti(struct ddb_port *port)
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static int port_has_encti(struct ddb_port *port)
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{
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{
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u8 val;
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u8 val;
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@ -2259,7 +2255,6 @@ static int init_xo2_ci(struct ddb_port *port)
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i2c_write_reg(i2c, 0x10, 0x08, 3);
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i2c_write_reg(i2c, 0x10, 0x08, 3);
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usleep_range(2000, 3000);
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usleep_range(2000, 3000);
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/* speed: 0=55,1=75,2=90,3=104 MBit/s */
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/* speed: 0=55,1=75,2=90,3=104 MBit/s */
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i2c_write_reg(i2c, 0x10, 0x09, 1);
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i2c_write_reg(i2c, 0x10, 0x09, 1);
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@ -2468,7 +2463,6 @@ static void ddb_port_probe(struct ddb_port *port)
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}
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}
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}
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}
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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@ -2558,7 +2552,7 @@ static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
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CI_CONTROL(ci->nr));
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CI_CONTROL(ci->nr));
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ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON | CI_RESET_CAM,
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ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON | CI_RESET_CAM,
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CI_CONTROL(ci->nr));
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CI_CONTROL(ci->nr));
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udelay(20);
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usleep_range(20, 25);
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ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON,
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ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON,
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CI_CONTROL(ci->nr));
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CI_CONTROL(ci->nr));
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return 0;
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return 0;
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@ -2763,7 +2757,6 @@ static void ci_xo2_attach(struct ddb_port *port)
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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struct cxd2099_cfg cxd_cfg = {
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struct cxd2099_cfg cxd_cfg = {
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.bitrate = 72000,
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.bitrate = 72000,
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.adr = 0x40,
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.adr = 0x40,
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@ -2902,7 +2895,6 @@ void ddb_ports_detach(struct ddb *dev)
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dvb_unregister_adapters(dev);
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dvb_unregister_adapters(dev);
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}
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}
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/* Copy input DMA pointers to output DMA and ACK. */
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/* Copy input DMA pointers to output DMA and ACK. */
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static void input_write_output(struct ddb_input *input,
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static void input_write_output(struct ddb_input *input,
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@ -2929,7 +2921,8 @@ static void input_write_dvb(struct ddb_input *input,
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struct ddb *dev = input->port->dev;
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struct ddb *dev = input->port->dev;
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int ack = 1;
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int ack = 1;
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dma = dma2 = input->dma;
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dma = input->dma;
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dma2 = input->dma;
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/* if there also is an output connected, do not ACK.
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/* if there also is an output connected, do not ACK.
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* input_write_output will ACK.
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* input_write_output will ACK.
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*/
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*/
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@ -2937,8 +2930,7 @@ static void input_write_dvb(struct ddb_input *input,
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dma2 = input->redo->dma;
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dma2 = input->redo->dma;
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ack = 0;
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ack = 0;
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}
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}
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while (dma->cbuf != ((dma->stat >> 11) & 0x1f)
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while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || (4 & dma->ctrl)) {
|
||||||
|| (4 & dma->ctrl)) {
|
|
||||||
if (4 & dma->ctrl) {
|
if (4 & dma->ctrl) {
|
||||||
/*dev_err(dev->dev, "Overflow dma %d\n", dma->nr);*/
|
/*dev_err(dev->dev, "Overflow dma %d\n", dma->nr);*/
|
||||||
ack = 1;
|
ack = 1;
|
||||||
@ -3002,7 +2994,6 @@ static void input_handler(unsigned long data)
|
|||||||
struct ddb_input *input = (struct ddb_input *)data;
|
struct ddb_input *input = (struct ddb_input *)data;
|
||||||
struct ddb_dma *dma = input->dma;
|
struct ddb_dma *dma = input->dma;
|
||||||
|
|
||||||
|
|
||||||
/* If there is no input connected, input_tasklet() will
|
/* If there is no input connected, input_tasklet() will
|
||||||
* just copy pointers and ACK. So, there is no need to go
|
* just copy pointers and ACK. So, there is no need to go
|
||||||
* through the tasklet scheduler.
|
* through the tasklet scheduler.
|
||||||
@ -3039,11 +3030,9 @@ static void output_handler(unsigned long data)
|
|||||||
spin_unlock(&dma->lock);
|
spin_unlock(&dma->lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
static struct ddb_regmap *io_regmap(struct ddb_io *io, int link)
|
static struct ddb_regmap *io_regmap(struct ddb_io *io, int link)
|
||||||
{
|
{
|
||||||
struct ddb_info *info;
|
struct ddb_info *info;
|
||||||
@ -3302,21 +3291,21 @@ void ddb_ports_release(struct ddb *dev)
|
|||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
|
|
||||||
#define IRQ_HANDLE(_nr) \
|
#define IRQ_HANDLE(_n) \
|
||||||
do { if ((s & (1UL << ((_nr) & 0x1f))) && dev->handler[0][_nr]) \
|
do { if ((s & (1UL << ((_n) & 0x1f))) && dev->handler[0][_n]) \
|
||||||
dev->handler[0][_nr](dev->handler_data[0][_nr]); } \
|
dev->handler[0][_n](dev->handler_data[0][_n]); } \
|
||||||
while (0)
|
while (0)
|
||||||
|
|
||||||
#define IRQ_HANDLE_BYTE(_n) { \
|
#define IRQ_HANDLE_BYTE(_shift) { \
|
||||||
if (s & (0x000000ff << ((_n) & 0x1f))) { \
|
if (s & (0x000000ff << ((_shift) & 0x1f))) { \
|
||||||
IRQ_HANDLE(0 + (_n)); \
|
IRQ_HANDLE(0 + (_shift)); \
|
||||||
IRQ_HANDLE(1 + (_n)); \
|
IRQ_HANDLE(1 + (_shift)); \
|
||||||
IRQ_HANDLE(2 + (_n)); \
|
IRQ_HANDLE(2 + (_shift)); \
|
||||||
IRQ_HANDLE(3 + (_n)); \
|
IRQ_HANDLE(3 + (_shift)); \
|
||||||
IRQ_HANDLE(4 + (_n)); \
|
IRQ_HANDLE(4 + (_shift)); \
|
||||||
IRQ_HANDLE(5 + (_n)); \
|
IRQ_HANDLE(5 + (_shift)); \
|
||||||
IRQ_HANDLE(6 + (_n)); \
|
IRQ_HANDLE(6 + (_shift)); \
|
||||||
IRQ_HANDLE(7 + (_n)); \
|
IRQ_HANDLE(7 + (_shift)); \
|
||||||
} \
|
} \
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3703,7 +3692,6 @@ void ddb_nsd_detach(struct ddb *dev)
|
|||||||
dvb_unregister_device(dev->nsd_dev);
|
dvb_unregister_device(dev->nsd_dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
@ -4071,7 +4059,6 @@ static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||||||
adap = &dev->i2c[i2c.bus].adap;
|
adap = &dev->i2c[i2c.bus].adap;
|
||||||
mbuf = hbuf + i2c.hlen;
|
mbuf = hbuf + i2c.hlen;
|
||||||
|
|
||||||
|
|
||||||
if (copy_from_user(hbuf, i2c.hdr, i2c.hlen))
|
if (copy_from_user(hbuf, i2c.hdr, i2c.hlen))
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
if (i2c_io(adap, i2c.adr, hbuf, i2c.hlen, mbuf, i2c.mlen) < 0)
|
if (i2c_io(adap, i2c.adr, hbuf, i2c.hlen, mbuf, i2c.mlen) < 0)
|
||||||
@ -4313,7 +4300,6 @@ static ssize_t led_show(struct device *device,
|
|||||||
return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0);
|
return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void ddb_set_led(struct ddb *dev, int num, int val)
|
static void ddb_set_led(struct ddb *dev, int num, int val)
|
||||||
{
|
{
|
||||||
if (!dev->link[0].info->led_num)
|
if (!dev->link[0].info->led_num)
|
||||||
@ -4388,7 +4374,6 @@ static ssize_t snr_show(struct device *device,
|
|||||||
return sprintf(buf, "%s\n", snr);
|
return sprintf(buf, "%s\n", snr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static ssize_t snr_store(struct device *device, struct device_attribute *attr,
|
static ssize_t snr_store(struct device *device, struct device_attribute *attr,
|
||||||
const char *buf, size_t count)
|
const char *buf, size_t count)
|
||||||
{
|
{
|
||||||
@ -4490,7 +4475,6 @@ static ssize_t gap_show(struct device *device,
|
|||||||
int num = attr->attr.name[3] - 0x30;
|
int num = attr->attr.name[3] - 0x30;
|
||||||
|
|
||||||
return sprintf(buf, "%d\n", dev->port[num].gap);
|
return sprintf(buf, "%d\n", dev->port[num].gap);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t gap_store(struct device *device, struct device_attribute *attr,
|
static ssize_t gap_store(struct device *device, struct device_attribute *attr,
|
||||||
@ -4517,7 +4501,6 @@ static ssize_t obr_show(struct device *device,
|
|||||||
int num = attr->attr.name[3] - 0x30;
|
int num = attr->attr.name[3] - 0x30;
|
||||||
|
|
||||||
return sprintf(buf, "%d\n", dev->port[num].obr);
|
return sprintf(buf, "%d\n", dev->port[num].obr);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t obr_store(struct device *device, struct device_attribute *attr,
|
static ssize_t obr_store(struct device *device, struct device_attribute *attr,
|
||||||
@ -4746,7 +4729,7 @@ static void ddb_device_attrs_del(struct ddb *dev)
|
|||||||
device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]);
|
device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]);
|
||||||
device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]);
|
device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]);
|
||||||
}
|
}
|
||||||
for (i = 0; ddb_attrs[i].attr.name != NULL; i++)
|
for (i = 0; ddb_attrs[i].attr.name; i++)
|
||||||
device_remove_file(dev->ddb_dev, &ddb_attrs[i]);
|
device_remove_file(dev->ddb_dev, &ddb_attrs[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -4754,7 +4737,7 @@ static int ddb_device_attrs_add(struct ddb *dev)
|
|||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 0; ddb_attrs[i].attr.name != NULL; i++)
|
for (i = 0; ddb_attrs[i].attr.name; i++)
|
||||||
if (device_create_file(dev->ddb_dev, &ddb_attrs[i]))
|
if (device_create_file(dev->ddb_dev, &ddb_attrs[i]))
|
||||||
goto fail;
|
goto fail;
|
||||||
for (i = 0; i < dev->link[0].info->temp_num; i++)
|
for (i = 0; i < dev->link[0].info->temp_num; i++)
|
||||||
@ -4810,8 +4793,9 @@ static int ddb_device_create(struct ddb *dev)
|
|||||||
device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
|
device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
|
||||||
ddbs[dev->nr] = 0;
|
ddbs[dev->nr] = 0;
|
||||||
dev->ddb_dev = ERR_PTR(-ENODEV);
|
dev->ddb_dev = ERR_PTR(-ENODEV);
|
||||||
} else
|
} else {
|
||||||
ddb_num++;
|
ddb_num++;
|
||||||
|
}
|
||||||
fail:
|
fail:
|
||||||
mutex_unlock(&ddb_mutex);
|
mutex_unlock(&ddb_mutex);
|
||||||
return res;
|
return res;
|
||||||
@ -4826,7 +4810,7 @@ void ddb_device_destroy(struct ddb *dev)
|
|||||||
}
|
}
|
||||||
|
|
||||||
#define LINK_IRQ_HANDLE(_l, _nr) \
|
#define LINK_IRQ_HANDLE(_l, _nr) \
|
||||||
do { if ((s & (1UL << _nr)) && dev->handler[_l][_nr]) \
|
do { if ((s & (1UL << (_nr))) && dev->handler[_l][_nr]) \
|
||||||
dev->handler[_l][_nr](dev->handler_data[_l][_nr]); } \
|
dev->handler[_l][_nr](dev->handler_data[_l][_nr]); } \
|
||||||
while (0)
|
while (0)
|
||||||
|
|
||||||
@ -4973,7 +4957,7 @@ static void tempmon_setfan(struct ddb_link *link)
|
|||||||
if ((ddblreadl(link, TEMPMON_CONTROL) &
|
if ((ddblreadl(link, TEMPMON_CONTROL) &
|
||||||
TEMPMON_CONTROL_OVERTEMP) != 0) {
|
TEMPMON_CONTROL_OVERTEMP) != 0) {
|
||||||
dev_info(link->dev->dev, "Over temperature condition\n");
|
dev_info(link->dev->dev, "Over temperature condition\n");
|
||||||
link->OverTemperatureError = 1;
|
link->over_temperature_error = 1;
|
||||||
}
|
}
|
||||||
temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF;
|
temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF;
|
||||||
if (temp & 0x80)
|
if (temp & 0x80)
|
||||||
@ -4998,7 +4982,6 @@ static void tempmon_setfan(struct ddb_link *link)
|
|||||||
ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
|
ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void temp_handler(unsigned long data)
|
static void temp_handler(unsigned long data)
|
||||||
{
|
{
|
||||||
struct ddb_link *link = (struct ddb_link *)data;
|
struct ddb_link *link = (struct ddb_link *)data;
|
||||||
@ -5008,14 +4991,14 @@ static void temp_handler(unsigned long data)
|
|||||||
spin_unlock(&link->temp_lock);
|
spin_unlock(&link->temp_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int tempmon_init(struct ddb_link *link, int FirstTime)
|
static int tempmon_init(struct ddb_link *link, int first_time)
|
||||||
{
|
{
|
||||||
struct ddb *dev = link->dev;
|
struct ddb *dev = link->dev;
|
||||||
int status = 0;
|
int status = 0;
|
||||||
u32 l = link->nr;
|
u32 l = link->nr;
|
||||||
|
|
||||||
spin_lock_irq(&link->temp_lock);
|
spin_lock_irq(&link->temp_lock);
|
||||||
if (FirstTime) {
|
if (first_time) {
|
||||||
static u8 temperature_table[11] = {
|
static u8 temperature_table[11] = {
|
||||||
30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80};
|
30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80};
|
||||||
|
|
||||||
@ -5029,10 +5012,10 @@ static int tempmon_init(struct ddb_link *link, int FirstTime)
|
|||||||
TEMPMON_CONTROL);
|
TEMPMON_CONTROL);
|
||||||
ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL);
|
ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL);
|
||||||
|
|
||||||
link->OverTemperatureError =
|
link->over_temperature_error =
|
||||||
((ddblreadl(link, TEMPMON_CONTROL) &
|
((ddblreadl(link, TEMPMON_CONTROL) &
|
||||||
TEMPMON_CONTROL_OVERTEMP) != 0);
|
TEMPMON_CONTROL_OVERTEMP) != 0);
|
||||||
if (link->OverTemperatureError) {
|
if (link->over_temperature_error) {
|
||||||
dev_info(dev->dev, "Over temperature condition\n");
|
dev_info(dev->dev, "Over temperature condition\n");
|
||||||
status = -1;
|
status = -1;
|
||||||
}
|
}
|
||||||
|
@ -181,7 +181,6 @@ static struct ddb_regset octopro_gtl = {
|
|||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
static struct ddb_regmap octopus_map = {
|
static struct ddb_regmap octopus_map = {
|
||||||
.irq_version = 1,
|
.irq_version = 1,
|
||||||
.irq_base_i2c = 0,
|
.irq_base_i2c = 0,
|
||||||
@ -259,7 +258,6 @@ static struct ddb_regmap octopus_sdr_map = {
|
|||||||
.channel = &octopus_mod_2_channel,
|
.channel = &octopus_mod_2_channel,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
|
|
||||||
@ -361,7 +359,7 @@ static struct ddb_info ddb_ctv7 = {
|
|||||||
.board_control_2 = 4,
|
.board_control_2 = 4,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct ddb_info ddb_satixS2v3 = {
|
static struct ddb_info ddb_satixs2v3 = {
|
||||||
.type = DDB_OCTOPUS,
|
.type = DDB_OCTOPUS,
|
||||||
.name = "Mystique SaTiX-S2 V3 DVB adapter",
|
.name = "Mystique SaTiX-S2 V3 DVB adapter",
|
||||||
.regmap = &octopus_map,
|
.regmap = &octopus_map,
|
||||||
@ -481,7 +479,6 @@ static struct ddb_info ddb_octopro = {
|
|||||||
.mdio_num = 1,
|
.mdio_num = 1,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
static struct ddb_info ddb_s2_48 = {
|
static struct ddb_info ddb_s2_48 = {
|
||||||
.type = DDB_OCTOPUS_MAX,
|
.type = DDB_OCTOPUS_MAX,
|
||||||
.name = "Digital Devices MAX S8 4/8",
|
.name = "Digital Devices MAX S8 4/8",
|
||||||
@ -552,7 +549,6 @@ static struct ddb_info ddb_c2t2i_8 = {
|
|||||||
.tempmon_irq = 24,
|
.tempmon_irq = 24,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
|
|
||||||
@ -565,7 +561,6 @@ static struct ddb_regmap octopus_net_map = {
|
|||||||
.output = &octopus_output,
|
.output = &octopus_output,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
static struct ddb_regset octopus_gtl = {
|
static struct ddb_regset octopus_gtl = {
|
||||||
.base = 0x180,
|
.base = 0x180,
|
||||||
.num = 0x01,
|
.num = 0x01,
|
||||||
@ -614,7 +609,6 @@ static struct ddb_info ddb_octonet_gtl = {
|
|||||||
.con_clock = 1,
|
.con_clock = 1,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
/****************************************************************************/
|
/****************************************************************************/
|
||||||
@ -632,7 +626,7 @@ struct ddb_device_id {
|
|||||||
.device = _device, \
|
.device = _device, \
|
||||||
.subvendor = 0xdd01, \
|
.subvendor = 0xdd01, \
|
||||||
.subdevice = _subdevice, \
|
.subdevice = _subdevice, \
|
||||||
.info = &_info }
|
.info = &(_info) }
|
||||||
|
|
||||||
static struct ddb_device_id ddb_device_ids[] = {
|
static struct ddb_device_id ddb_device_ids[] = {
|
||||||
/* OctopusNet */
|
/* OctopusNet */
|
||||||
@ -652,7 +646,7 @@ static struct ddb_device_id ddb_device_ids[] = {
|
|||||||
DDB_DEVID(0x0006, 0x0022, ddb_v7),
|
DDB_DEVID(0x0006, 0x0022, ddb_v7),
|
||||||
DDB_DEVID(0x0006, 0x0024, ddb_v7a),
|
DDB_DEVID(0x0006, 0x0024, ddb_v7a),
|
||||||
DDB_DEVID(0x0003, 0x0030, ddb_dvbct),
|
DDB_DEVID(0x0003, 0x0030, ddb_dvbct),
|
||||||
DDB_DEVID(0x0003, 0xdb03, ddb_satixS2v3),
|
DDB_DEVID(0x0003, 0xdb03, ddb_satixs2v3),
|
||||||
DDB_DEVID(0x0006, 0x0031, ddb_ctv7),
|
DDB_DEVID(0x0006, 0x0031, ddb_ctv7),
|
||||||
DDB_DEVID(0x0006, 0x0032, ddb_ctv7),
|
DDB_DEVID(0x0006, 0x0032, ddb_ctv7),
|
||||||
DDB_DEVID(0x0006, 0x0033, ddb_ctv7),
|
DDB_DEVID(0x0006, 0x0033, ddb_ctv7),
|
||||||
|
@ -212,8 +212,9 @@ int ddb_i2c_init(struct ddb *dev)
|
|||||||
adap = &i2c->adap;
|
adap = &i2c->adap;
|
||||||
i2c_del_adapter(adap);
|
i2c_del_adapter(adap);
|
||||||
}
|
}
|
||||||
} else
|
} else {
|
||||||
dev->i2c_num = num;
|
dev->i2c_num = num;
|
||||||
|
}
|
||||||
return stat;
|
return stat;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -176,6 +176,3 @@ void ddbcpyfrom(struct ddb *dev, void *dst, u32 adr, long count)
|
|||||||
return gtlcpyfrom(dev, dst, adr, count);
|
return gtlcpyfrom(dev, dst, adr, count);
|
||||||
return memcpy_fromio(dst, (char *)(dev->regs + adr), count);
|
return memcpy_fromio(dst, (char *)(dev->regs + adr), count);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
@ -82,6 +82,6 @@ static inline void gtlw(struct ddb_link *link)
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define ddbmemset(_dev, _adr, _val, _count) \
|
#define ddbmemset(_dev, _adr, _val, _count) \
|
||||||
memset_io((char *) (_dev->regs + (_adr)), (_val), (_count))
|
memset_io((char *)((_dev)->regs + (_adr)), (_val), (_count))
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -107,9 +107,9 @@ static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
|
|||||||
dev->msi = stat;
|
dev->msi = stat;
|
||||||
dev_info(dev->dev, "using %d MSI interrupt(s)\n",
|
dev_info(dev->dev, "using %d MSI interrupt(s)\n",
|
||||||
dev->msi);
|
dev->msi);
|
||||||
} else
|
} else {
|
||||||
dev_info(dev->dev, "MSI not available.\n");
|
dev_info(dev->dev, "MSI not available.\n");
|
||||||
|
}
|
||||||
#else
|
#else
|
||||||
stat = pci_enable_msi_block(dev->pdev, nr);
|
stat = pci_enable_msi_block(dev->pdev, nr);
|
||||||
if (stat == 0) {
|
if (stat == 0) {
|
||||||
@ -234,8 +234,8 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
|
|||||||
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
|
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
dev = vzalloc(sizeof(struct ddb));
|
dev = vzalloc(sizeof(*dev));
|
||||||
if (dev == NULL)
|
if (!dev)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
mutex_init(&dev->mutex);
|
mutex_init(&dev->mutex);
|
||||||
@ -358,7 +358,7 @@ static __init int module_init_ddbridge(void)
|
|||||||
if (ddb_class_create() < 0)
|
if (ddb_class_create() < 0)
|
||||||
return -1;
|
return -1;
|
||||||
ddb_wq = create_workqueue("ddbridge");
|
ddb_wq = create_workqueue("ddbridge");
|
||||||
if (ddb_wq == NULL)
|
if (!ddb_wq)
|
||||||
goto exit1;
|
goto exit1;
|
||||||
stat = pci_register_driver(&ddb_pci_driver);
|
stat = pci_register_driver(&ddb_pci_driver);
|
||||||
if (stat < 0)
|
if (stat < 0)
|
||||||
|
@ -115,8 +115,9 @@ static int ns_set_pids(struct dvbnss *nss)
|
|||||||
/* disable unused pids */
|
/* disable unused pids */
|
||||||
for (; j < 5; j++)
|
for (; j < 5; j++)
|
||||||
ddbwritel(dev, 0, PID_FILTER_PID(dns->nr, j));
|
ddbwritel(dev, 0, PID_FILTER_PID(dns->nr, j));
|
||||||
} else
|
} else {
|
||||||
ddbcpyto(dev, STREAM_PIDS(dns->nr), nss->pids, 0x400);
|
ddbcpyto(dev, STREAM_PIDS(dns->nr), nss->pids, 0x400);
|
||||||
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -104,7 +104,6 @@
|
|||||||
#define INTMASK_TSOUTPUT3 (0x00040000)
|
#define INTMASK_TSOUTPUT3 (0x00040000)
|
||||||
#define INTMASK_TSOUTPUT4 (0x00080000)
|
#define INTMASK_TSOUTPUT4 (0x00080000)
|
||||||
|
|
||||||
|
|
||||||
#define INTERRUPT_V2_CONTROL (INTERRUPT_BASE + 0x00)
|
#define INTERRUPT_V2_CONTROL (INTERRUPT_BASE + 0x00)
|
||||||
#define INTERRUPT_V2_ENABLE_1 (INTERRUPT_BASE + 0x04)
|
#define INTERRUPT_V2_ENABLE_1 (INTERRUPT_BASE + 0x04)
|
||||||
#define INTERRUPT_V2_ENABLE_2 (INTERRUPT_BASE + 0x08)
|
#define INTERRUPT_V2_ENABLE_2 (INTERRUPT_BASE + 0x08)
|
||||||
@ -123,9 +122,6 @@
|
|||||||
#define INTERRUPT_V2_STATUS_6 (INTERRUPT_BASE + 0x38)
|
#define INTERRUPT_V2_STATUS_6 (INTERRUPT_BASE + 0x38)
|
||||||
#define INTERRUPT_V2_STATUS_7 (INTERRUPT_BASE + 0x3c)
|
#define INTERRUPT_V2_STATUS_7 (INTERRUPT_BASE + 0x3c)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Modulator registers */
|
/* Modulator registers */
|
||||||
|
|
||||||
/* Clock Generator ( Sil598 @ 0xAA I2c ) */
|
/* Clock Generator ( Sil598 @ 0xAA I2c ) */
|
||||||
@ -154,8 +150,7 @@
|
|||||||
#define TEMPMON_CONTROL_INTENABLE (0x00000004)
|
#define TEMPMON_CONTROL_INTENABLE (0x00000004)
|
||||||
#define TEMPMON_CONTROL_OVERTEMP (0x00008000)
|
#define TEMPMON_CONTROL_OVERTEMP (0x00008000)
|
||||||
|
|
||||||
|
/* Temperature in C x 256 */
|
||||||
/* SHORT Temperature in °C x 256 */
|
|
||||||
#define TEMPMON_CORE (TEMPMON_BASE + 0x04)
|
#define TEMPMON_CORE (TEMPMON_BASE + 0x04)
|
||||||
#define TEMPMON_SENSOR0 (TEMPMON_BASE + 0x04)
|
#define TEMPMON_SENSOR0 (TEMPMON_BASE + 0x04)
|
||||||
#define TEMPMON_SENSOR1 (TEMPMON_BASE + 0x08)
|
#define TEMPMON_SENSOR1 (TEMPMON_BASE + 0x08)
|
||||||
@ -171,22 +166,22 @@
|
|||||||
* ( 1x LM75A @ 0x90, 1x ADM1032 @ 0x9A )
|
* ( 1x LM75A @ 0x90, 1x ADM1032 @ 0x9A )
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Temperature in °C x 256 (ADM1032 ext) */
|
/* Temperature in C x 256 (ADM1032 ext) */
|
||||||
#define TEMPMON1_CORE (TEMPMON_SENSOR0)
|
#define TEMPMON1_CORE (TEMPMON_SENSOR0)
|
||||||
/* Temperature in °C x 256 (LM75A 0x90) */
|
/* Temperature in C x 256 (LM75A 0x90) */
|
||||||
#define TEMPMON1_SENSOR1 (TEMPMON_BASE + 0x08)
|
#define TEMPMON1_SENSOR1 (TEMPMON_BASE + 0x08)
|
||||||
/* Temperature in °C x 256 (LM75A 0x92 or ADM1032 Int) */
|
/* Temperature in C x 256 (LM75A 0x92 or ADM1032 Int) */
|
||||||
#define TEMPMON1_SENSOR2 (TEMPMON_BASE + 0x0C)
|
#define TEMPMON1_SENSOR2 (TEMPMON_BASE + 0x0C)
|
||||||
|
|
||||||
/* V2 Temperature Monitor 2 ADM1032 */
|
/* V2 Temperature Monitor 2 ADM1032 */
|
||||||
|
|
||||||
/* Temperature in °C x 256 (ADM1032 int) */
|
/* Temperature in C x 256 (ADM1032 int) */
|
||||||
#define TEMPMON2_BOARD (TEMPMON_SENSOR0)
|
#define TEMPMON2_BOARD (TEMPMON_SENSOR0)
|
||||||
/* Temperature in °C x 256 (ADM1032 ext) */
|
/* Temperature in C x 256 (ADM1032 ext) */
|
||||||
#define TEMPMON2_FPGACORE (TEMPMON_SENSOR1)
|
#define TEMPMON2_FPGACORE (TEMPMON_SENSOR1)
|
||||||
/* Temperature in °C x 256 (ADM1032 ext) */
|
/* Temperature in C x 256 (ADM1032 ext) */
|
||||||
#define TEMPMON2_QAMCORE (TEMPMON_SENSOR2)
|
#define TEMPMON2_QAMCORE (TEMPMON_SENSOR2)
|
||||||
/* SHORT Temperature in °C x 256 (ADM1032 ext) */
|
/* SHORT Temperature in C x 256 (ADM1032 ext) */
|
||||||
#define TEMPMON2_DACCORE (TEMPMON_SENSOR2)
|
#define TEMPMON2_DACCORE (TEMPMON_SENSOR2)
|
||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
@ -206,7 +201,6 @@
|
|||||||
#define I2C_SPEED_77 (0x19181919)
|
#define I2C_SPEED_77 (0x19181919)
|
||||||
#define I2C_SPEED_50 (0x27262727)
|
#define I2C_SPEED_50 (0x27262727)
|
||||||
|
|
||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
/* DMA Controller */
|
/* DMA Controller */
|
||||||
|
|
||||||
@ -226,18 +220,16 @@
|
|||||||
#define DMA_DIAG_WAITOVERFLOWCOUNTER (0x38)
|
#define DMA_DIAG_WAITOVERFLOWCOUNTER (0x38)
|
||||||
#define DMA_DIAG_WAITCOUNTER (0x3C)
|
#define DMA_DIAG_WAITCOUNTER (0x3C)
|
||||||
|
|
||||||
#define TS_CONTROL(_io) (_io->regs + 0x00)
|
#define TS_CONTROL(_io) ((_io)->regs + 0x00)
|
||||||
#define TS_CONTROL2(_io) (_io->regs + 0x04)
|
#define TS_CONTROL2(_io) ((_io)->regs + 0x04)
|
||||||
|
|
||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
/* DMA Buffer */
|
/* DMA Buffer */
|
||||||
|
|
||||||
#define DMA_BUFFER_CONTROL(_dma) (_dma->regs + 0x00)
|
#define DMA_BUFFER_CONTROL(_dma) ((_dma)->regs + 0x00)
|
||||||
#define DMA_BUFFER_ACK(_dma) (_dma->regs + 0x04)
|
#define DMA_BUFFER_ACK(_dma) ((_dma)->regs + 0x04)
|
||||||
#define DMA_BUFFER_CURRENT(_dma) (_dma->regs + 0x08)
|
#define DMA_BUFFER_CURRENT(_dma) ((_dma)->regs + 0x08)
|
||||||
#define DMA_BUFFER_SIZE(_dma) (_dma->regs + 0x0c)
|
#define DMA_BUFFER_SIZE(_dma) ((_dma)->regs + 0x0c)
|
||||||
|
|
||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
||||||
@ -253,8 +245,8 @@
|
|||||||
#define LNB_CMD_DISEQC 6
|
#define LNB_CMD_DISEQC 6
|
||||||
#define LNB_CMD_SCIF 7
|
#define LNB_CMD_SCIF 7
|
||||||
|
|
||||||
#define LNB_BUSY (1ULL << 4)
|
#define LNB_BUSY BIT_ULL(4)
|
||||||
#define LNB_TONE (1ULL << 15)
|
#define LNB_TONE BIT_ULL(15)
|
||||||
|
|
||||||
#define LNB_STATUS(i) (LNB_BASE + (i) * 0x20 + 0x04)
|
#define LNB_STATUS(i) (LNB_BASE + (i) * 0x20 + 0x04)
|
||||||
#define LNB_VOLTAGE(i) (LNB_BASE + (i) * 0x20 + 0x08)
|
#define LNB_VOLTAGE(i) (LNB_BASE + (i) * 0x20 + 0x08)
|
||||||
@ -369,7 +361,6 @@
|
|||||||
#define FSM_STATUS_READY (0x00010000)
|
#define FSM_STATUS_READY (0x00010000)
|
||||||
#define FSM_STATUS_QAMREADY (0x00020000)
|
#define FSM_STATUS_QAMREADY (0x00020000)
|
||||||
|
|
||||||
|
|
||||||
#define FSM_CAPACITY (FSM_BASE + 0x04)
|
#define FSM_CAPACITY (FSM_BASE + 0x04)
|
||||||
#define FSM_CAPACITY_MAX (0x3F000000)
|
#define FSM_CAPACITY_MAX (0x3F000000)
|
||||||
#define FSM_CAPACITY_CUR (0x003F0000)
|
#define FSM_CAPACITY_CUR (0x003F0000)
|
||||||
@ -386,7 +377,6 @@
|
|||||||
#define FSM_GAIN_N24 (0x00000029)
|
#define FSM_GAIN_N24 (0x00000029)
|
||||||
#define FSM_GAIN_N96 (0x00000011)
|
#define FSM_GAIN_N96 (0x00000011)
|
||||||
|
|
||||||
|
|
||||||
/* Attenuator/VGA */
|
/* Attenuator/VGA */
|
||||||
|
|
||||||
#define RF_ATTENUATOR (0xD8)
|
#define RF_ATTENUATOR (0xD8)
|
||||||
@ -408,7 +398,6 @@
|
|||||||
|
|
||||||
#define RF_VGA_GAIN_MAX (200)
|
#define RF_VGA_GAIN_MAX (200)
|
||||||
|
|
||||||
|
|
||||||
/* V1 only */
|
/* V1 only */
|
||||||
|
|
||||||
#define RF_POWER (0xE0)
|
#define RF_POWER (0xE0)
|
||||||
@ -421,7 +410,6 @@
|
|||||||
#define RF_POWER_CONTROL_VALIDMASK (0x00000700)
|
#define RF_POWER_CONTROL_VALIDMASK (0x00000700)
|
||||||
#define RF_POWER_CONTROL_VALID (0x00000500)
|
#define RF_POWER_CONTROL_VALID (0x00000500)
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Output control
|
* Output control
|
||||||
*/
|
*/
|
||||||
@ -453,7 +441,6 @@
|
|||||||
#define IQOUTPUT_CONTROL_ENABLE_PEAK (0x00000008)
|
#define IQOUTPUT_CONTROL_ENABLE_PEAK (0x00000008)
|
||||||
#define IQOUTPUT_CONTROL_BYPASS_EQUALIZER (0x00000010)
|
#define IQOUTPUT_CONTROL_BYPASS_EQUALIZER (0x00000010)
|
||||||
|
|
||||||
|
|
||||||
/* Modulator Base V1 */
|
/* Modulator Base V1 */
|
||||||
|
|
||||||
#define MODULATOR_BASE (0x200)
|
#define MODULATOR_BASE (0x200)
|
||||||
@ -469,7 +456,6 @@
|
|||||||
#define MODULATOR_IQTABLE_INDEX_SEL_Q (MODULATOR_IQTABLE_INDEX_IQ_MASK)
|
#define MODULATOR_IQTABLE_INDEX_SEL_Q (MODULATOR_IQTABLE_INDEX_IQ_MASK)
|
||||||
#define MODULATOR_IQTABLE_SIZE (2048)
|
#define MODULATOR_IQTABLE_SIZE (2048)
|
||||||
|
|
||||||
|
|
||||||
/* Modulator Channels */
|
/* Modulator Channels */
|
||||||
|
|
||||||
#define CHANNEL_BASE dev->link[0].info->regmap->channel->base
|
#define CHANNEL_BASE dev->link[0].info->regmap->channel->base
|
||||||
@ -521,12 +507,11 @@
|
|||||||
#define CHANNEL_SETTINGS2_OUTPUT_MASK (0x0000007F)
|
#define CHANNEL_SETTINGS2_OUTPUT_MASK (0x0000007F)
|
||||||
|
|
||||||
#define KFLF_MAX (0x07FFFFFFUL)
|
#define KFLF_MAX (0x07FFFFFFUL)
|
||||||
#define KF_INIT(Symbolrate) (Symbolrate)
|
#define KF_INIT(_symbol_rate) (_symbol_rate)
|
||||||
#define LF_INIT(Symbolrate) (9000000UL)
|
#define LF_INIT(_symbol_rate) (9000000UL)
|
||||||
#define MIN_SYMBOLRATE (1000000)
|
#define MIN_SYMBOLRATE (1000000)
|
||||||
#define MAX_SYMBOLRATE (7100000)
|
#define MAX_SYMBOLRATE (7100000)
|
||||||
|
|
||||||
|
|
||||||
/* OCTONET */
|
/* OCTONET */
|
||||||
|
|
||||||
#define ETHER_BASE (0x100)
|
#define ETHER_BASE (0x100)
|
||||||
@ -563,8 +548,6 @@
|
|||||||
#define PID_FILTER_SYSTEM_PIDS(i) (PID_FILTER_BASE + (i) * 0x20)
|
#define PID_FILTER_SYSTEM_PIDS(i) (PID_FILTER_BASE + (i) * 0x20)
|
||||||
#define PID_FILTER_PID(i, j) (PID_FILTER_BASE + (i) * 0x20 + (j) * 4)
|
#define PID_FILTER_PID(i, j) (PID_FILTER_BASE + (i) * 0x20 + (j) * 4)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* V2 */
|
/* V2 */
|
||||||
|
|
||||||
/* MAX2871 same as DVB Modulator V2 */
|
/* MAX2871 same as DVB Modulator V2 */
|
||||||
@ -590,7 +573,6 @@
|
|||||||
|
|
||||||
#define DMA_PCIE_LANES_MASK (0x00070000)
|
#define DMA_PCIE_LANES_MASK (0x00070000)
|
||||||
|
|
||||||
|
|
||||||
/* Modulator Channels, partially compatible to DVB Modulator V1 */
|
/* Modulator Channels, partially compatible to DVB Modulator V1 */
|
||||||
|
|
||||||
#define SDR_CHANNEL_BASE (0x800)
|
#define SDR_CHANNEL_BASE (0x800)
|
||||||
|
@ -100,7 +100,7 @@
|
|||||||
#define DDB_MAX_LINK 4
|
#define DDB_MAX_LINK 4
|
||||||
#define DDB_LINK_SHIFT 28
|
#define DDB_LINK_SHIFT 28
|
||||||
|
|
||||||
#define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
|
#define DDB_LINK_TAG(_x) ((_x) << DDB_LINK_SHIFT)
|
||||||
|
|
||||||
struct ddb_regset {
|
struct ddb_regset {
|
||||||
u32 base;
|
u32 base;
|
||||||
@ -202,7 +202,6 @@ struct ddb_info {
|
|||||||
#define OUTPUT_DMA_SIZE_SDR (256 * 1024)
|
#define OUTPUT_DMA_SIZE_SDR (256 * 1024)
|
||||||
#define OUTPUT_DMA_IRQ_DIV_SDR 1
|
#define OUTPUT_DMA_IRQ_DIV_SDR 1
|
||||||
|
|
||||||
|
|
||||||
struct ddb;
|
struct ddb;
|
||||||
struct ddb_port;
|
struct ddb_port;
|
||||||
|
|
||||||
@ -223,7 +222,7 @@ struct ddb_dma {
|
|||||||
#else
|
#else
|
||||||
struct tasklet_struct tasklet;
|
struct tasklet_struct tasklet;
|
||||||
#endif
|
#endif
|
||||||
spinlock_t lock;
|
spinlock_t lock; /* DMA lock */
|
||||||
wait_queue_head_t wq;
|
wait_queue_head_t wq;
|
||||||
int running;
|
int running;
|
||||||
u32 stat;
|
u32 stat;
|
||||||
@ -262,7 +261,6 @@ struct ddb_ci {
|
|||||||
struct dvb_ca_en50221 en;
|
struct dvb_ca_en50221 en;
|
||||||
struct ddb_port *port;
|
struct ddb_port *port;
|
||||||
u32 nr;
|
u32 nr;
|
||||||
struct mutex lock;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
struct ddb_io {
|
struct ddb_io {
|
||||||
@ -296,7 +294,7 @@ struct ddb_port {
|
|||||||
u32 regs;
|
u32 regs;
|
||||||
u32 lnr;
|
u32 lnr;
|
||||||
struct ddb_i2c *i2c;
|
struct ddb_i2c *i2c;
|
||||||
struct mutex i2c_gate_lock;
|
struct mutex i2c_gate_lock; /* I2C access lock */
|
||||||
u32 class;
|
u32 class;
|
||||||
#define DDB_PORT_NONE 0
|
#define DDB_PORT_NONE 0
|
||||||
#define DDB_PORT_CI 1
|
#define DDB_PORT_CI 1
|
||||||
@ -406,7 +404,7 @@ struct ddb_ns {
|
|||||||
};
|
};
|
||||||
|
|
||||||
struct ddb_lnb {
|
struct ddb_lnb {
|
||||||
struct mutex lock;
|
struct mutex lock; /* lock lnb access */
|
||||||
u32 tone;
|
u32 tone;
|
||||||
fe_sec_voltage_t oldvoltage[4];
|
fe_sec_voltage_t oldvoltage[4];
|
||||||
u32 voltage[4];
|
u32 voltage[4];
|
||||||
@ -419,14 +417,14 @@ struct ddb_link {
|
|||||||
struct ddb_info *info;
|
struct ddb_info *info;
|
||||||
u32 nr;
|
u32 nr;
|
||||||
u32 regs;
|
u32 regs;
|
||||||
spinlock_t lock;
|
spinlock_t lock; /* lock link access */
|
||||||
struct mutex flash_mutex;
|
struct mutex flash_mutex; /* lock flash access */
|
||||||
struct ddb_lnb lnb;
|
struct ddb_lnb lnb;
|
||||||
struct tasklet_struct tasklet;
|
struct tasklet_struct tasklet;
|
||||||
struct ddb_ids ids;
|
struct ddb_ids ids;
|
||||||
|
|
||||||
spinlock_t temp_lock;
|
spinlock_t temp_lock; /* lock temp chip access */
|
||||||
int OverTemperatureError;
|
int over_temperature_error;
|
||||||
u8 temp_tab[11];
|
u8 temp_tab[11];
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -468,7 +466,7 @@ struct ddb {
|
|||||||
int ns_num;
|
int ns_num;
|
||||||
struct ddb_ns ns[DDB_NS_MAX];
|
struct ddb_ns ns[DDB_NS_MAX];
|
||||||
int vlan;
|
int vlan;
|
||||||
struct mutex mutex;
|
struct mutex mutex; /* lock accces to global ddb array */
|
||||||
|
|
||||||
struct dvb_device *nsd_dev;
|
struct dvb_device *nsd_dev;
|
||||||
u8 tsbuf[TS_CAPTURE_LEN];
|
u8 tsbuf[TS_CAPTURE_LEN];
|
||||||
@ -530,7 +528,6 @@ struct DDMOD_FLASH {
|
|||||||
|
|
||||||
#define DDMOD_FLASH_MAGIC 0x5F564d5F
|
#define DDMOD_FLASH_MAGIC 0x5F564d5F
|
||||||
|
|
||||||
|
|
||||||
int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
|
int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
|
||||||
|
|
||||||
#define DDBRIDGE_VERSION "0.9.31"
|
#define DDBRIDGE_VERSION "0.9.31"
|
||||||
|
@ -52,7 +52,7 @@ static int __init octonet_probe(struct platform_device *pdev)
|
|||||||
struct resource *regs;
|
struct resource *regs;
|
||||||
int irq;
|
int irq;
|
||||||
|
|
||||||
dev = vzalloc(sizeof(struct ddb));
|
dev = vzalloc(sizeof(*dev));
|
||||||
if (!dev)
|
if (!dev)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
platform_set_drvdata(pdev, dev);
|
platform_set_drvdata(pdev, dev);
|
||||||
@ -84,20 +84,9 @@ static int __init octonet_probe(struct platform_device *pdev)
|
|||||||
dev->link[0].ids.subdevice = dev->link[0].ids.devid >> 16;
|
dev->link[0].ids.subdevice = dev->link[0].ids.devid >> 16;
|
||||||
|
|
||||||
dev->link[0].dev = dev;
|
dev->link[0].dev = dev;
|
||||||
#if 0
|
|
||||||
if (dev->link[0].ids.devid == 0x0300dd01)
|
|
||||||
dev->link[0].info = &ddb_octonet;
|
|
||||||
else if (dev->link[0].ids.devid == 0x0301dd01)
|
|
||||||
dev->link[0].info = &ddb_octonet_jse;
|
|
||||||
else if (dev->link[0].ids.devid == 0x0307dd01)
|
|
||||||
dev->link[0].info = &ddb_octonet_gtl;
|
|
||||||
else
|
|
||||||
dev->link[0].info = &ddb_octonet_tbd;
|
|
||||||
#else
|
|
||||||
dev->link[0].info = get_ddb_info(dev->link[0].ids.vendor,
|
dev->link[0].info = get_ddb_info(dev->link[0].ids.vendor,
|
||||||
dev->link[0].ids.device,
|
dev->link[0].ids.device,
|
||||||
0xdd01, 0xffff);
|
0xdd01, 0xffff);
|
||||||
#endif
|
|
||||||
dev_info(dev->dev, "DDBridge: HW %08x REGMAP %08x\n",
|
dev_info(dev->dev, "DDBridge: HW %08x REGMAP %08x\n",
|
||||||
dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
|
dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
|
||||||
dev_info(dev->dev, "DDBridge: MAC %08x DEVID %08x\n",
|
dev_info(dev->dev, "DDBridge: MAC %08x DEVID %08x\n",
|
||||||
|
Loading…
Reference in New Issue
Block a user