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Code Issues Releases Wiki Activity

strict checkpatch style fixes

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This commit is contained in:
Ralph Metzler 2017-08-26 22:04:37 +02:00
parent 2b6babfdc0
commit b2ca06e639
10 changed files with 186 additions and 242 deletions
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187
ddbridge/ddbridge-core.c
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@ -85,7 +85,6 @@ static struct ddb *ddbs[DDB_MAX_ADAPTER];
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
@ -123,7 +122,6 @@ static void ddb_set_dma_tables(struct ddb *dev)
}
}
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
@ -218,9 +216,10 @@ static int ddb_redirect(u32 i, u32 p)
if (input->redi) {
input2->redi = input->redi;
input->redi = 0;
} else
} else {
input2->redi = input;
}
}
input->redo = port->output;
port->output->redi = input;
@ -247,10 +246,11 @@ static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
dir ? DMA_TO_DEVICE :
DMA_FROM_DEVICE);
kfree(dma->vbuf[i]);
} else
} else {
dma_free_coherent(&pdev->dev, dma->size,
dma->vbuf[i],
dma->pbuf[i]);
}
dma->vbuf[i] = 0;
}
}
@ -391,9 +391,9 @@ static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
max_bitrate = 0;
gap = 0;
if (bitrate != 72000) {
if (bitrate >= 96000)
if (bitrate >= 96000) {
*con |= 0x800;
else {
} else {
*con |= 0x1000;
nco = (bitrate *
8192 + 71999) / 72000;
@ -449,9 +449,9 @@ static void ddb_output_start(struct ddb_output *output)
output->dma->stat = 0;
ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
}
if (output->port->class == DDB_PORT_MOD)
if (output->port->class == DDB_PORT_MOD) {
ddbridge_mod_output_start(output);
else {
} else {
if (output->port->input[0]->port->class == DDB_PORT_LOOP)
con = (1UL << 13) | 0x14;
else
@ -544,7 +544,6 @@ static void ddb_input_start(struct ddb_input *input)
}
}
int ddb_dvb_ns_input_start(struct ddb_input *input)
{
struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
@ -709,8 +708,6 @@ static u32 ddb_input_free_bytes(struct ddb_input *input)
return 0;
}
static s32 ddb_output_used_bufs(struct ddb_output *output)
{
u32 idx, off, stat, ctrl;
@ -940,8 +937,9 @@ static int ts_open(struct inode *inode, struct file *file)
} else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
if (!output)
return -EINVAL;
} else
} else {
return -EINVAL;
}
err = dvb_generic_open(inode, file);
if (err < 0)
return err;
@ -982,6 +980,7 @@ static int mod_open(struct inode *inode, struct file *file)
ddb_output_start(output);
return err;
}
static const struct file_operations ci_fops = {
.owner = THIS_MODULE,
.read = ts_read,
@ -1000,7 +999,6 @@ static struct dvb_device dvbdev_ci = {
.fops = &ci_fops,
};
/****************************************************************************/
/****************************************************************************/
@ -1051,19 +1049,18 @@ static int demod_attach_drxk(struct ddb_input *input)
{
struct i2c_adapter *i2c = &input->port->i2c->adap;
struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
struct dvb_frontend *fe;
fe = dvb->fe = dvb_attach(drxk_attach,
dvb->fe = dvb_attach(drxk_attach,
i2c, 0x29 + (input->nr & 1),
&dvb->fe2);
if (!fe) {
if (!dvb->fe) {
dev_err(input->port->dev->dev,
"No DRXK found!\n");
return -ENODEV;
}
fe->sec_priv = input;
dvb->i2c_gate_ctrl = fe->ops.i2c_gate_ctrl;
fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
dvb->fe->sec_priv = input;
dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
return 0;
}
#endif
@ -1072,23 +1069,22 @@ static int demod_attach_cxd2843(struct ddb_input *input, int par, int osc24)
{
struct i2c_adapter *i2c = &input->port->i2c->adap;
struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
struct dvb_frontend *fe;
struct cxd2843_cfg cfg;
cfg.adr = (input->nr & 1) ? 0x6d : 0x6c;
cfg.ts_clock = par ? 0 : 1;
cfg.parallel = par ? 1 : 0;
cfg.osc = osc24 ? 24000000 : 20500000;
fe = dvb->fe = dvb_attach(cxd2843_attach, i2c, &cfg);
dvb->fe = dvb_attach(cxd2843_attach, i2c, &cfg);
if (!dvb->fe) {
dev_err(input->port->dev->dev,
"No cxd2837/38/43/54 found!\n");
return -ENODEV;
}
fe->sec_priv = input;
dvb->i2c_gate_ctrl = fe->ops.i2c_gate_ctrl;
fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
dvb->fe->sec_priv = input;
dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
return 0;
}
@ -1096,13 +1092,12 @@ static int demod_attach_stv0367dd(struct ddb_input *input)
{
struct i2c_adapter *i2c = &input->port->i2c->adap;
struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
struct dvb_frontend *fe;
struct stv0367_cfg cfg = { .cont_clock = 0 };
cfg.adr = 0x1f - (input->nr & 1);
if (input->port->dev->link[input->port->lnr].info->con_clock)
cfg.cont_clock = 1;
fe = dvb->fe = dvb_attach(stv0367_attach, i2c,
dvb->fe = dvb_attach(stv0367_attach, i2c,
&cfg,
&dvb->fe2);
if (!dvb->fe) {
@ -1110,9 +1105,9 @@ static int demod_attach_stv0367dd(struct ddb_input *input)
"No stv0367 found!\n");
return -ENODEV;
}
fe->sec_priv = input;
dvb->i2c_gate_ctrl = fe->ops.i2c_gate_ctrl;
fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
dvb->fe->sec_priv = input;
dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
return 0;
}
@ -1648,7 +1643,6 @@ static int max_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
static int max_enable_high_lnb_voltage(struct dvb_frontend *fe, long arg)
{
return 0;
}
@ -1817,7 +1811,8 @@ static void dvb_input_detach(struct ddb_input *input)
/* fallthrough */
case 0x30:
dvb_frontend_detach(dvb->fe);
dvb->fe = dvb->fe2 = NULL;
dvb->fe = NULL;
dvb->fe2 = NULL;
/* fallthrough */
case 0x21:
if (input->port->dev->ns_num)
@ -1960,7 +1955,8 @@ static int dvb_input_attach(struct ddb_input *input)
DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
dvbdemux->start_feed = start_feed;
dvbdemux->stop_feed = stop_feed;
dvbdemux->filternum = dvbdemux->feednum = 256;
dvbdemux->filternum = 256;
dvbdemux->feednum = 256;
ret = dvb_dmx_init(dvbdemux);
if (ret < 0)
return ret;
@ -1993,7 +1989,8 @@ static int dvb_input_attach(struct ddb_input *input)
return ret;
dvb->attached = 0x21;
}
dvb->fe = dvb->fe2 = NULL;
dvb->fe = NULL;
dvb->fe2 = NULL;
switch (port->type) {
case DDB_TUNER_MXL5XX:
if (fe_attach_mxl5xx(input) < 0)
@ -2093,7 +2090,6 @@ static int dvb_input_attach(struct ddb_input *input)
return 0;
}
static int port_has_encti(struct ddb_port *port)
{
u8 val;
@ -2259,7 +2255,6 @@ static int init_xo2_ci(struct ddb_port *port)
i2c_write_reg(i2c, 0x10, 0x08, 3);
usleep_range(2000, 3000);
/* speed: 0=55,1=75,2=90,3=104 MBit/s */
i2c_write_reg(i2c, 0x10, 0x09, 1);
@ -2468,7 +2463,6 @@ static void ddb_port_probe(struct ddb_port *port)
}
}
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
@ -2558,7 +2552,7 @@ static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
CI_CONTROL(ci->nr));
ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON | CI_RESET_CAM,
CI_CONTROL(ci->nr));
udelay(20);
usleep_range(20, 25);
ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON,
CI_CONTROL(ci->nr));
return 0;
@ -2763,7 +2757,6 @@ static void ci_xo2_attach(struct ddb_port *port)
/****************************************************************************/
/****************************************************************************/
struct cxd2099_cfg cxd_cfg = {
.bitrate = 72000,
.adr = 0x40,
@ -2824,13 +2817,13 @@ static int ddb_port_attach(struct ddb_port *port)
case DDB_PORT_LOOP:
ret = dvb_register_device(port->dvb[0].adap,
&port->dvb[0].dev,
&dvbdev_ci, (void *) port->output,
&dvbdev_ci, (void *)port->output,
DVB_DEVICE_CI);
break;
case DDB_PORT_MOD:
ret = dvb_register_device(port->dvb[0].adap,
&port->dvb[0].dev,
&dvbdev_mod, (void *) port->output,
&dvbdev_mod, (void *)port->output,
DVB_DEVICE_MOD);
break;
default:
@ -2902,7 +2895,6 @@ void ddb_ports_detach(struct ddb *dev)
dvb_unregister_adapters(dev);
}
/* Copy input DMA pointers to output DMA and ACK. */
static void input_write_output(struct ddb_input *input,
@ -2929,7 +2921,8 @@ static void input_write_dvb(struct ddb_input *input,
struct ddb *dev = input->port->dev;
int ack = 1;
dma = dma2 = input->dma;
dma = input->dma;
dma2 = input->dma;
/* if there also is an output connected, do not ACK.
* input_write_output will ACK.
*/
@ -2937,8 +2930,7 @@ static void input_write_dvb(struct ddb_input *input,
dma2 = input->redo->dma;
ack = 0;
}
while (dma->cbuf != ((dma->stat >> 11) & 0x1f)
|| (4 & dma->ctrl)) {
while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || (4 & dma->ctrl)) {
if (4 & dma->ctrl) {
/*dev_err(dev->dev, "Overflow dma %d\n", dma->nr);*/
ack = 1;
@ -2967,11 +2959,11 @@ static void input_write_dvb(struct ddb_input *input,
static void input_work(struct work_struct *work)
{
struct ddb_dma *dma = container_of(work, struct ddb_dma, work);
struct ddb_input *input = (struct ddb_input *) dma->io;
struct ddb_input *input = (struct ddb_input *)dma->io;
#else
static void input_tasklet(unsigned long data)
{
struct ddb_input *input = (struct ddb_input *) data;
struct ddb_input *input = (struct ddb_input *)data;
struct ddb_dma *dma = input->dma;
#endif
struct ddb *dev = input->port->dev;
@ -2999,10 +2991,9 @@ static void input_tasklet(unsigned long data)
static void input_handler(unsigned long data)
{
struct ddb_input *input = (struct ddb_input *) data;
struct ddb_input *input = (struct ddb_input *)data;
struct ddb_dma *dma = input->dma;
/* If there is no input connected, input_tasklet() will
* just copy pointers and ACK. So, there is no need to go
* through the tasklet scheduler.
@ -3022,7 +3013,7 @@ static void input_handler(unsigned long data)
static void output_handler(unsigned long data)
{
struct ddb_output *output = (struct ddb_output *) data;
struct ddb_output *output = (struct ddb_output *)data;
struct ddb_dma *dma = output->dma;
struct ddb *dev = output->port->dev;
@ -3039,11 +3030,9 @@ static void output_handler(unsigned long data)
spin_unlock(&dma->lock);
}
/****************************************************************************/
/****************************************************************************/
static struct ddb_regmap *io_regmap(struct ddb_io *io, int link)
{
struct ddb_info *info;
@ -3084,7 +3073,7 @@ static void ddb_dma_init(struct ddb_io *io, int nr, int out)
#ifdef DDB_USE_WORK
INIT_WORK(&dma->work, input_work);
#else
tasklet_init(&dma->tasklet, input_tasklet, (unsigned long) io);
tasklet_init(&dma->tasklet, input_tasklet, (unsigned long)io);
#endif
dma->regs = rm->idma->base + rm->idma->size * nr;
dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr;
@ -3122,7 +3111,7 @@ static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr)
dev_info(dev->dev, "init link %u, input %u, handler %u\n",
port->lnr, nr, dma_nr + base);
dev->handler[0][dma_nr + base] = input_handler;
dev->handler_data[0][dma_nr + base] = (unsigned long) input;
dev->handler_data[0][dma_nr + base] = (unsigned long)input;
ddb_dma_init(input, dma_nr, 0);
}
}
@ -3146,7 +3135,7 @@ static void ddb_output_init(struct ddb_port *port, int nr)
u32 base = rm0->irq_base_odma;
dev->handler[0][nr + base] = output_handler;
dev->handler_data[0][nr + base] = (unsigned long) output;
dev->handler_data[0][nr + base] = (unsigned long)output;
ddb_dma_init(output, nr, 1);
}
}
@ -3263,7 +3252,7 @@ static void ddb_ports_init(struct ddb *dev)
dev->handler[0][i + rm->irq_base_rate] =
ddbridge_mod_rate_handler;
dev->handler_data[0][i + rm->irq_base_rate] =
(unsigned long) &dev->output[i];
(unsigned long)&dev->output[i];
break;
default:
break;
@ -3302,21 +3291,21 @@ void ddb_ports_release(struct ddb *dev)
/****************************************************************************/
/****************************************************************************/
#define IRQ_HANDLE(_nr) \
do { if ((s & (1UL << ((_nr) & 0x1f))) && dev->handler[0][_nr]) \
dev->handler[0][_nr](dev->handler_data[0][_nr]); } \
#define IRQ_HANDLE(_n) \
do { if ((s & (1UL << ((_n) & 0x1f))) && dev->handler[0][_n]) \
dev->handler[0][_n](dev->handler_data[0][_n]); } \
while (0)
#define IRQ_HANDLE_BYTE(_n) { \
if (s & (0x000000ff << ((_n) & 0x1f))) { \
IRQ_HANDLE(0 + (_n)); \
IRQ_HANDLE(1 + (_n)); \
IRQ_HANDLE(2 + (_n)); \
IRQ_HANDLE(3 + (_n)); \
IRQ_HANDLE(4 + (_n)); \
IRQ_HANDLE(5 + (_n)); \
IRQ_HANDLE(6 + (_n)); \
IRQ_HANDLE(7 + (_n)); \
#define IRQ_HANDLE_BYTE(_shift) { \
if (s & (0x000000ff << ((_shift) & 0x1f))) { \
IRQ_HANDLE(0 + (_shift)); \
IRQ_HANDLE(1 + (_shift)); \
IRQ_HANDLE(2 + (_shift)); \
IRQ_HANDLE(3 + (_shift)); \
IRQ_HANDLE(4 + (_shift)); \
IRQ_HANDLE(5 + (_shift)); \
IRQ_HANDLE(6 + (_shift)); \
IRQ_HANDLE(7 + (_shift)); \
} \
}
@ -3372,7 +3361,7 @@ static void irq_handle_io(struct ddb *dev, u32 s)
irqreturn_t irq_handler0(int irq, void *dev_id)
{
struct ddb *dev = (struct ddb *) dev_id;
struct ddb *dev = (struct ddb *)dev_id;
u32 s = ddbreadl(dev, INTERRUPT_STATUS);
do {
@ -3389,7 +3378,7 @@ irqreturn_t irq_handler0(int irq, void *dev_id)
irqreturn_t irq_handler1(int irq, void *dev_id)
{
struct ddb *dev = (struct ddb *) dev_id;
struct ddb *dev = (struct ddb *)dev_id;
u32 s = ddbreadl(dev, INTERRUPT_STATUS);
do {
@ -3406,7 +3395,7 @@ irqreturn_t irq_handler1(int irq, void *dev_id)
irqreturn_t irq_handler(int irq, void *dev_id)
{
struct ddb *dev = (struct ddb *) dev_id;
struct ddb *dev = (struct ddb *)dev_id;
u32 s = ddbreadl(dev, INTERRUPT_STATUS);
int ret = IRQ_HANDLED;
@ -3485,7 +3474,7 @@ static irqreturn_t irq_handle_v2_n(struct ddb *dev, u32 n)
irqreturn_t irq_handler_v2(int irq, void *dev_id)
{
struct ddb *dev = (struct ddb *) dev_id;
struct ddb *dev = (struct ddb *)dev_id;
u32 s = 0xffff & ddbreadl(dev, INTERRUPT_V2_STATUS);
int ret = IRQ_HANDLED;
@ -3565,7 +3554,7 @@ static int nsd_do_ioctl(struct file *file, unsigned int cmd, void *parg)
struct dvb_device *dvbdev = file->private_data;
struct ddb *dev = dvbdev->priv;
/* unsigned long arg = (unsigned long) parg; */
/* unsigned long arg = (unsigned long)parg; */
int ret = 0;
switch (cmd) {
@ -3599,7 +3588,7 @@ static int nsd_do_ioctl(struct file *file, unsigned int cmd, void *parg)
to = 1024;
/* 21 packets default if num set to 0 */
if (ts->num)
to |= ((u32) ts->num << 16);
to |= ((u32)ts->num << 16);
else
to |= (21 << 16);
ddbwritel(dev, to, TS_CAPTURE_TIMEOUT);
@ -3686,7 +3675,7 @@ static int ddb_nsd_attach(struct ddb *dev)
return 0;
ret = dvb_register_device(&dev->adap[0],
&dev->nsd_dev,
&dvbdev_nsd, (void *) dev,
&dvbdev_nsd, (void *)dev,
DVB_DEVICE_NSD);
return ret;
}
@ -3703,7 +3692,6 @@ void ddb_nsd_detach(struct ddb *dev)
dvb_unregister_device(dev->nsd_dev);
}
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
@ -3732,7 +3720,7 @@ static int flashio(struct ddb *dev, u32 lnr,
ddbwritel(dev, 1, tag | SPI_CONTROL);
while (wlen > 4) {
/* FIXME: check for big-endian */
data = swab32(*(u32 *) wbuf);
data = swab32(*(u32 *)wbuf);
wbuf += 4;
wlen -= 4;
ddbwritel(dev, data, tag | SPI_DATA);
@ -3772,7 +3760,7 @@ static int flashio(struct ddb *dev, u32 lnr,
if (reg_wait(dev, tag | SPI_CONTROL, 4))
goto fail;
data = ddbreadl(dev, tag | SPI_DATA);
*(u32 *) rbuf = swab32(data);
*(u32 *)rbuf = swab32(data);
rbuf += 4;
rlen -= 4;
}
@ -4071,7 +4059,6 @@ static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
adap = &dev->i2c[i2c.bus].adap;
mbuf = hbuf + i2c.hlen;
if (copy_from_user(hbuf, i2c.hdr, i2c.hlen))
return -EFAULT;
if (i2c_io(adap, i2c.adr, hbuf, i2c.hlen, mbuf, i2c.mlen) < 0)
@ -4286,8 +4273,8 @@ static ssize_t qam_show(struct device *device,
adap = &dev->i2c[1].adap;
if (i2c_read_regs16(adap, 0x1f, 0xf480, tmp, 4) < 0)
return sprintf(buf, "read_error\n");
i = (s16) (((u16) tmp[1]) << 14) | (((u16) tmp[0]) << 6);
q = (s16) (((u16) tmp[3]) << 14) | (((u16) tmp[2]) << 6);
i = (s16)(((u16)tmp[1]) << 14) | (((u16)tmp[0]) << 6);
q = (s16)(((u16)tmp[3]) << 14) | (((u16)tmp[2]) << 6);
return sprintf(buf, "%d %d\n", i, q);
}
@ -4313,7 +4300,6 @@ static ssize_t led_show(struct device *device,
return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0);
}
static void ddb_set_led(struct ddb *dev, int num, int val)
{
if (!dev->link[0].info->led_num)
@ -4388,7 +4374,6 @@ static ssize_t snr_show(struct device *device,
return sprintf(buf, "%s\n", snr);
}
static ssize_t snr_store(struct device *device, struct device_attribute *attr,
const char *buf, size_t count)
{
@ -4490,7 +4475,6 @@ static ssize_t gap_show(struct device *device,
int num = attr->attr.name[3] - 0x30;
return sprintf(buf, "%d\n", dev->port[num].gap);
}
static ssize_t gap_store(struct device *device, struct device_attribute *attr,
@ -4517,7 +4501,6 @@ static ssize_t obr_show(struct device *device,
int num = attr->attr.name[3] - 0x30;
return sprintf(buf, "%d\n", dev->port[num].obr);
}
static ssize_t obr_store(struct device *device, struct device_attribute *attr,
@ -4746,7 +4729,7 @@ static void ddb_device_attrs_del(struct ddb *dev)
device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]);
device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]);
}
for (i = 0; ddb_attrs[i].attr.name != NULL; i++)
for (i = 0; ddb_attrs[i].attr.name; i++)
device_remove_file(dev->ddb_dev, &ddb_attrs[i]);
}
@ -4754,7 +4737,7 @@ static int ddb_device_attrs_add(struct ddb *dev)
{
int i;
for (i = 0; ddb_attrs[i].attr.name != NULL; i++)
for (i = 0; ddb_attrs[i].attr.name; i++)
if (device_create_file(dev->ddb_dev, &ddb_attrs[i]))
goto fail;
for (i = 0; i < dev->link[0].info->temp_num; i++)
@ -4810,8 +4793,9 @@ static int ddb_device_create(struct ddb *dev)
device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
ddbs[dev->nr] = 0;
dev->ddb_dev = ERR_PTR(-ENODEV);
} else
} else {
ddb_num++;
}
fail:
mutex_unlock(&ddb_mutex);
return res;
@ -4826,13 +4810,13 @@ void ddb_device_destroy(struct ddb *dev)
}
#define LINK_IRQ_HANDLE(_l, _nr) \
do { if ((s & (1UL << _nr)) && dev->handler[_l][_nr]) \
do { if ((s & (1UL << (_nr))) && dev->handler[_l][_nr]) \
dev->handler[_l][_nr](dev->handler_data[_l][_nr]); } \
while (0)
static void gtl_link_handler(unsigned long priv)
{
struct ddb *dev = (struct ddb *) priv;
struct ddb *dev = (struct ddb *)priv;
u32 regs = dev->link[0].info->regmap->gtl->base;
dev_info(dev->dev, "GT link change: %u\n",
@ -4841,7 +4825,7 @@ static void gtl_link_handler(unsigned long priv)
static void link_tasklet(unsigned long data)
{
struct ddb_link *link = (struct ddb_link *) data;
struct ddb_link *link = (struct ddb_link *)data;
struct ddb *dev = link->dev;
u32 s, tag = DDB_LINK_TAG(link->nr);
u32 l = link->nr;
@ -4861,7 +4845,7 @@ static void link_tasklet(unsigned long data)
static void gtl_irq_handler(unsigned long priv)
{
struct ddb_link *link = (struct ddb_link *) priv;
struct ddb_link *link = (struct ddb_link *)priv;
#if 1
struct ddb *dev = link->dev;
u32 s, l = link->nr, tag = DDB_LINK_TAG(link->nr);
@ -4926,7 +4910,7 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l)
ddbwritel(dev, 1, regs + 0x20);
dev->handler_data[0][base + l] = (unsigned long) link;
dev->handler_data[0][base + l] = (unsigned long)link;
dev->handler[0][base + l] = gtl_irq_handler;
dev->link[l].ids.hwid = ddbreadl(dev, DDB_LINK_TAG(l) | 0);
@ -4944,7 +4928,7 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l)
dev_info(dev->dev, "GTL ID %08x\n",
ddbreadl(dev, DDB_LINK_TAG(l) | 8));
tasklet_init(&link->tasklet, link_tasklet, (unsigned long) link);
tasklet_init(&link->tasklet, link_tasklet, (unsigned long)link);
ddbwritel(dev, 0xffffffff, DDB_LINK_TAG(l) | INTERRUPT_ACK);
ddbwritel(dev, 0x0100000f, DDB_LINK_TAG(l) | INTERRUPT_ENABLE);
@ -4955,7 +4939,7 @@ static int ddb_gtl_init(struct ddb *dev)
{
u32 l, base = dev->link[0].info->regmap->irq_base_gtl;
dev->handler_data[0][base] = (unsigned long) dev;
dev->handler_data[0][base] = (unsigned long)dev;
dev->handler[0][base] = gtl_link_handler;
for (l = 1; l < dev->link[0].info->regmap->gtl->num + 1; l++)
ddb_gtl_init_link(dev, l);
@ -4973,7 +4957,7 @@ static void tempmon_setfan(struct ddb_link *link)
if ((ddblreadl(link, TEMPMON_CONTROL) &
TEMPMON_CONTROL_OVERTEMP) != 0) {
dev_info(link->dev->dev, "Over temperature condition\n");
link->OverTemperatureError = 1;
link->over_temperature_error = 1;
}
temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF;
if (temp & 0x80)
@ -4998,24 +4982,23 @@ static void tempmon_setfan(struct ddb_link *link)
ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
}
static void temp_handler(unsigned long data)
{
struct ddb_link *link = (struct ddb_link *) data;
struct ddb_link *link = (struct ddb_link *)data;
spin_lock(&link->temp_lock);
tempmon_setfan(link);
spin_unlock(&link->temp_lock);
}
static int tempmon_init(struct ddb_link *link, int FirstTime)
static int tempmon_init(struct ddb_link *link, int first_time)
{
struct ddb *dev = link->dev;
int status = 0;
u32 l = link->nr;
spin_lock_irq(&link->temp_lock);
if (FirstTime) {
if (first_time) {
static u8 temperature_table[11] = {
30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80};
@ -5029,10 +5012,10 @@ static int tempmon_init(struct ddb_link *link, int FirstTime)
TEMPMON_CONTROL);
ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL);
link->OverTemperatureError =
link->over_temperature_error =
((ddblreadl(link, TEMPMON_CONTROL) &
TEMPMON_CONTROL_OVERTEMP) != 0);
if (link->OverTemperatureError) {
if (link->over_temperature_error) {
dev_info(dev->dev, "Over temperature condition\n");
status = -1;
}

12
ddbridge/ddbridge-hw.c
View File

@ -181,7 +181,6 @@ static struct ddb_regset octopro_gtl = {
/****************************************************************************/
/****************************************************************************/
static struct ddb_regmap octopus_map = {
.irq_version = 1,
.irq_base_i2c = 0,
@ -259,7 +258,6 @@ static struct ddb_regmap octopus_sdr_map = {
.channel = &octopus_mod_2_channel,
};
/****************************************************************************/
/****************************************************************************/
@ -361,7 +359,7 @@ static struct ddb_info ddb_ctv7 = {
.board_control_2 = 4,
};
static struct ddb_info ddb_satixS2v3 = {
static struct ddb_info ddb_satixs2v3 = {
.type = DDB_OCTOPUS,
.name = "Mystique SaTiX-S2 V3 DVB adapter",
.regmap = &octopus_map,
@ -481,7 +479,6 @@ static struct ddb_info ddb_octopro = {
.mdio_num = 1,
};
static struct ddb_info ddb_s2_48 = {
.type = DDB_OCTOPUS_MAX,
.name = "Digital Devices MAX S8 4/8",
@ -552,7 +549,6 @@ static struct ddb_info ddb_c2t2i_8 = {
.tempmon_irq = 24,
};
/****************************************************************************/
/****************************************************************************/
@ -565,7 +561,6 @@ static struct ddb_regmap octopus_net_map = {
.output = &octopus_output,
};
static struct ddb_regset octopus_gtl = {
.base = 0x180,
.num = 0x01,
@ -614,7 +609,6 @@ static struct ddb_info ddb_octonet_gtl = {
.con_clock = 1,
};
/****************************************************************************/
/****************************************************************************/
/****************************************************************************/
@ -632,7 +626,7 @@ struct ddb_device_id {
.device = _device, \
.subvendor = 0xdd01, \
.subdevice = _subdevice, \
.info = &_info }
.info = &(_info) }
static struct ddb_device_id ddb_device_ids[] = {
/* OctopusNet */
@ -652,7 +646,7 @@ static struct ddb_device_id ddb_device_ids[] = {
DDB_DEVID(0x0006, 0x0022, ddb_v7),
DDB_DEVID(0x0006, 0x0024, ddb_v7a),
DDB_DEVID(0x0003, 0x0030, ddb_dvbct),
DDB_DEVID(0x0003, 0xdb03, ddb_satixS2v3),
DDB_DEVID(0x0003, 0xdb03, ddb_satixs2v3),
DDB_DEVID(0x0006, 0x0031, ddb_ctv7),
DDB_DEVID(0x0006, 0x0032, ddb_ctv7),
DDB_DEVID(0x0006, 0x0033, ddb_ctv7),

13
ddbridge/ddbridge-i2c.c
View File

@ -71,7 +71,7 @@ static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
struct i2c_msg msg[], int num)
{
struct ddb_i2c *i2c = (struct ddb_i2c *) i2c_get_adapdata(adapter);
struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter);
struct ddb *dev = i2c->dev;
u8 addr = 0;
@ -139,7 +139,7 @@ void ddb_i2c_release(struct ddb *dev)
static void i2c_handler(unsigned long priv)
{
struct ddb_i2c *i2c = (struct ddb_i2c *) priv;
struct ddb_i2c *i2c = (struct ddb_i2c *)priv;
complete(&i2c->completion);
}
@ -165,7 +165,7 @@ static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
adap = &i2c->adap;
i2c_set_adapdata(adap, i2c);
#ifdef I2C_ADAP_CLASS_TV_DIGITAL
adap->class = I2C_ADAP_CLASS_TV_DIGITAL|I2C_CLASS_TV_ANALOG;
adap->class = I2C_ADAP_CLASS_TV_DIGITAL | I2C_CLASS_TV_ANALOG;
#else
#ifdef I2C_CLASS_TV_ANALOG
adap->class = I2C_CLASS_TV_ANALOG;
@ -174,7 +174,7 @@ static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
snprintf(adap->name, I2C_NAME_SIZE, "ddbridge_%02x.%x.%x",
dev->nr, i2c->link, i);
adap->algo = &ddb_i2c_algo;
adap->algo_data = (void *) i2c;
adap->algo_data = (void *)i2c;
adap->dev.parent = dev->dev;
return i2c_add_adapter(adap);
}
@ -198,7 +198,7 @@ int ddb_i2c_init(struct ddb *dev)
if (!(dev->link[l].info->i2c_mask & (1 << i)))
continue;
i2c = &dev->i2c[num];
dev->handler_data[l][i + base] = (unsigned long) i2c;
dev->handler_data[l][i + base] = (unsigned long)i2c;
dev->handler[l][i + base] = i2c_handler;
stat = ddb_i2c_add(dev, i2c, regmap, l, i, num);
if (stat)
@ -212,8 +212,9 @@ int ddb_i2c_init(struct ddb *dev)
adap = &i2c->adap;
i2c_del_adapter(adap);
}
} else
} else {
dev->i2c_num = num;
}
return stat;
}

15
ddbridge/ddbridge-io.c
View File

@ -39,7 +39,7 @@ u32 ddblreadl(struct ddb_link *link, u32 adr)
spin_unlock_irqrestore(&link->lock, flags);
return val;
}
return readl((char *) (link->dev->regs + (adr)));
return readl((char *)(link->dev->regs + (adr)));
}
void ddblwritel(struct ddb_link *link, u32 val, u32 adr)
@ -55,7 +55,7 @@ void ddblwritel(struct ddb_link *link, u32 val, u32 adr)
spin_unlock_irqrestore(&link->lock, flags);
return;
}
writel(val, (char *) (link->dev->regs + (adr)));
writel(val, (char *)(link->dev->regs + (adr)));
}
u32 ddbreadl(struct ddb *dev, u32 adr)
@ -74,7 +74,7 @@ u32 ddbreadl(struct ddb *dev, u32 adr)
spin_unlock_irqrestore(&link->lock, flags);
return val;
}
return readl((char *) (dev->regs + (adr)));
return readl((char *)(dev->regs + (adr)));
}
void ddbwritel(struct ddb *dev, u32 val, u32 adr)
@ -92,7 +92,7 @@ void ddbwritel(struct ddb *dev, u32 val, u32 adr)
spin_unlock_irqrestore(&link->lock, flags);
return;
}
writel(val, (char *) (dev->regs + (adr)));
writel(val, (char *)(dev->regs + (adr)));
}
void gtlcpyto(struct ddb *dev, u32 adr, const u8 *buf,
@ -167,15 +167,12 @@ void ddbcpyto(struct ddb *dev, u32 adr, void *src, long count)
{
if (unlikely(adr & 0xf0000000))
return gtlcpyto(dev, adr, src, count);
return memcpy_toio((char *) (dev->regs + adr), src, count);
return memcpy_toio((char *)(dev->regs + adr), src, count);
}
void ddbcpyfrom(struct ddb *dev, void *dst, u32 adr, long count)
{
if (unlikely(adr & 0xf0000000))
return gtlcpyfrom(dev, dst, adr, count);
return memcpy_fromio(dst, (char *) (dev->regs + adr), count);
return memcpy_fromio(dst, (char *)(dev->regs + adr), count);
}

10
ddbridge/ddbridge-io.h
View File

@ -36,22 +36,22 @@ void ddbcpyfrom(struct ddb *dev, void *dst, u32 adr, long count);
static inline void ddbwriteb(struct ddb *dev, u32 val, u32 adr)
{
writeb(val, (char *) (dev->regs + (adr)));
writeb(val, (char *)(dev->regs + (adr)));
}
static inline u32 ddbreadb(struct ddb *dev, u32 adr)
{
return readb((char *) (dev->regs + (adr)));
return readb((char *)(dev->regs + (adr)));
}
static inline void ddbwritel0(struct ddb_link *link, u32 val, u32 adr)
{
writel(val, (char *) (link->dev->regs + (adr)));
writel(val, (char *)(link->dev->regs + (adr)));
}
static inline u32 ddbreadl0(struct ddb_link *link, u32 adr)
{
return readl((char *) (link->dev->regs + (adr)));
return readl((char *)(link->dev->regs + (adr)));
}
#if 0
@ -82,6 +82,6 @@ static inline void gtlw(struct ddb_link *link)
#endif
#define ddbmemset(_dev, _adr, _val, _count) \
memset_io((char *) (_dev->regs + (_adr)), (_val), (_count))
memset_io((char *)((_dev)->regs + (_adr)), (_val), (_count))
#endif

22
ddbridge/ddbridge-main.c
View File

@ -68,7 +68,7 @@ static void __devexit ddb_irq_exit(struct ddb *dev)
static void __devexit ddb_remove(struct pci_dev *pdev)
{
struct ddb *dev = (struct ddb *) pci_get_drvdata(pdev);
struct ddb *dev = (struct ddb *)pci_get_drvdata(pdev);
ddb_device_destroy(dev);
ddb_nsd_detach(dev);
@ -107,9 +107,9 @@ static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
dev->msi = stat;
dev_info(dev->dev, "using %d MSI interrupt(s)\n",
dev->msi);
} else
} else {
dev_info(dev->dev, "MSI not available.\n");
}
#else
stat = pci_enable_msi_block(dev->pdev, nr);
if (stat == 0) {
@ -148,7 +148,7 @@ static int __devinit ddb_irq_init2(struct ddb *dev)
irq_flag = 0;
stat = request_irq(dev->pdev->irq, irq_handler_v2,
irq_flag, "ddbridge", (void *) dev);
irq_flag, "ddbridge", (void *)dev);
if (stat < 0)
return stat;
@ -186,11 +186,11 @@ static int __devinit ddb_irq_init(struct ddb *dev)
irq_flag = 0;
if (dev->msi == 2) {
stat = request_irq(dev->pdev->irq, irq_handler0,
irq_flag, "ddbridge", (void *) dev);
irq_flag, "ddbridge", (void *)dev);
if (stat < 0)
return stat;
stat = request_irq(dev->pdev->irq + 1, irq_handler1,
irq_flag, "ddbridge", (void *) dev);
irq_flag, "ddbridge", (void *)dev);
if (stat < 0) {
free_irq(dev->pdev->irq, dev);
return stat;
@ -200,10 +200,10 @@ static int __devinit ddb_irq_init(struct ddb *dev)
stat = request_threaded_irq(dev->pdev->irq, irq_handler,
irq_thread,
irq_flag,
"ddbridge", (void *) dev);
"ddbridge", (void *)dev);
#else
stat = request_irq(dev->pdev->irq, irq_handler,
irq_flag, "ddbridge", (void *) dev);
irq_flag, "ddbridge", (void *)dev);
#endif
if (stat < 0)
return stat;
@ -234,8 +234,8 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
return -ENODEV;
dev = vzalloc(sizeof(struct ddb));
if (dev == NULL)
dev = vzalloc(sizeof(*dev));
if (!dev)
return -ENOMEM;
mutex_init(&dev->mutex);
@ -358,7 +358,7 @@ static __init int module_init_ddbridge(void)
if (ddb_class_create() < 0)
return -1;
ddb_wq = create_workqueue("ddbridge");
if (ddb_wq == NULL)
if (!ddb_wq)
goto exit1;
stat = pci_register_driver(&ddb_pci_driver);
if (stat < 0)

23
ddbridge/ddbridge-ns.c
View File

@ -60,7 +60,7 @@ static u16 calc_pcs16(struct dvb_ns_params *p, int ipv)
static void ns_free(struct dvbnss *nss)
{
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
struct dvb_netstream *ns = nss->ns;
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;
@ -97,7 +97,7 @@ static int ns_set_pids(struct dvbnss *nss)
struct dvb_netstream *ns = nss->ns;
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
if (dev->link[0].ids.devid == 0x0301dd01) {
u32 sys = 0;
@ -115,8 +115,9 @@ static int ns_set_pids(struct dvbnss *nss)
/* disable unused pids */
for (; j < 5; j++)
ddbwritel(dev, 0, PID_FILTER_PID(dns->nr, j));
} else
} else {
ddbcpyto(dev, STREAM_PIDS(dns->nr), nss->pids, 0x400);
}
return 0;
}
@ -125,7 +126,7 @@ static int ns_set_pid(struct dvbnss *nss, u16 pid)
struct dvb_netstream *ns = nss->ns;
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
u16 byte = (pid & 0x1fff) >> 3;
u8 bit = 1 << (pid & 7);
u32 off = STREAM_PIDS(dns->nr);
@ -184,7 +185,7 @@ static int ns_set_ci(struct dvbnss *nss, u8 ci)
struct dvb_netstream *ns = nss->ns;
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
int ciport;
if (ci == 255) {
@ -244,7 +245,7 @@ static int ns_set_rtcp_msg(struct dvbnss *nss, u8 *msg, u32 len)
struct dvb_netstream *ns = nss->ns;
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
u32 off = STREAM_PACKET_ADR(dns->nr);
u32 coff = 96;
u16 wlen;
@ -368,7 +369,7 @@ static u32 set_nsbuf(struct dvb_ns_params *p, u8 *buf,
static int ns_set_ts_packets(struct dvbnss *nss, u8 *buf, u32 len)
{
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
struct dvb_netstream *ns = nss->ns;
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;
@ -385,7 +386,7 @@ static int ns_set_ts_packets(struct dvbnss *nss, u8 *buf, u32 len)
static int ns_insert_ts_packets(struct dvbnss *nss, u8 count)
{
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
struct dvb_netstream *ns = nss->ns;
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;
@ -407,7 +408,7 @@ static int ns_set_net(struct dvbnss *nss)
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;
struct dvb_ns_params *p = &nss->params;
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
u32 off = STREAM_PACKET_ADR(dns->nr);
u32 coff = 96;
@ -426,7 +427,7 @@ static int ns_set_net(struct dvbnss *nss)
static int ns_start(struct dvbnss *nss)
{
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
struct dvb_netstream *ns = nss->ns;
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;
@ -450,7 +451,7 @@ static int ns_start(struct dvbnss *nss)
static int ns_stop(struct dvbnss *nss)
{
struct ddb_ns *dns = (struct ddb_ns *) nss->priv;
struct ddb_ns *dns = (struct ddb_ns *)nss->priv;
struct dvb_netstream *ns = nss->ns;
struct ddb_input *input = ns->priv;
struct ddb *dev = input->port->dev;

66
ddbridge/ddbridge-regs.h
View File

@ -104,7 +104,6 @@
#define INTMASK_TSOUTPUT3 (0x00040000)
#define INTMASK_TSOUTPUT4 (0x00080000)
#define INTERRUPT_V2_CONTROL (INTERRUPT_BASE + 0x00)
#define INTERRUPT_V2_ENABLE_1 (INTERRUPT_BASE + 0x04)
#define INTERRUPT_V2_ENABLE_2 (INTERRUPT_BASE + 0x08)
@ -123,9 +122,6 @@
#define INTERRUPT_V2_STATUS_6 (INTERRUPT_BASE + 0x38)
#define INTERRUPT_V2_STATUS_7 (INTERRUPT_BASE + 0x3c)
/* Modulator registers */
/* Clock Generator ( Sil598 @ 0xAA I2c ) */
@ -138,8 +134,8 @@
/* DAC ( AD9781/AD9783 SPI ) */
#define DAC_BASE (0x090)
#define DAC_CONTROL (DAC_BASE)
#define DAC_WRITE_DATA (DAC_BASE+4)
#define DAC_READ_DATA (DAC_BASE+8)
#define DAC_WRITE_DATA (DAC_BASE + 4)
#define DAC_READ_DATA (DAC_BASE + 8)
#define DAC_CONTROL_INSTRUCTION_REG (0xFF)
#define DAC_CONTROL_STARTIO (0x100)
@ -154,8 +150,7 @@
#define TEMPMON_CONTROL_INTENABLE (0x00000004)
#define TEMPMON_CONTROL_OVERTEMP (0x00008000)
/* SHORT Temperature in °C x 256 */
/* Temperature in C x 256 */
#define TEMPMON_CORE (TEMPMON_BASE + 0x04)
#define TEMPMON_SENSOR0 (TEMPMON_BASE + 0x04)
#define TEMPMON_SENSOR1 (TEMPMON_BASE + 0x08)
@ -171,22 +166,22 @@
* ( 1x LM75A @ 0x90, 1x ADM1032 @ 0x9A )
*/
/* Temperature in °C x 256 (ADM1032 ext) */
/* Temperature in C x 256 (ADM1032 ext) */
#define TEMPMON1_CORE (TEMPMON_SENSOR0)
/* Temperature in °C x 256 (LM75A 0x90) */
/* Temperature in C x 256 (LM75A 0x90) */
#define TEMPMON1_SENSOR1 (TEMPMON_BASE + 0x08)
/* Temperature in °C x 256 (LM75A 0x92 or ADM1032 Int) */
/* Temperature in C x 256 (LM75A 0x92 or ADM1032 Int) */
#define TEMPMON1_SENSOR2 (TEMPMON_BASE + 0x0C)
/* V2 Temperature Monitor 2 ADM1032 */
/* Temperature in °C x 256 (ADM1032 int) */
/* Temperature in C x 256 (ADM1032 int) */
#define TEMPMON2_BOARD (TEMPMON_SENSOR0)
/* Temperature in °C x 256 (ADM1032 ext) */
/* Temperature in C x 256 (ADM1032 ext) */
#define TEMPMON2_FPGACORE (TEMPMON_SENSOR1)
/* Temperature in °C x 256 (ADM1032 ext) */
/* Temperature in C x 256 (ADM1032 ext) */
#define TEMPMON2_QAMCORE (TEMPMON_SENSOR2)
/* SHORT Temperature in °C x 256 (ADM1032 ext) */
/* SHORT Temperature in C x 256 (ADM1032 ext) */
#define TEMPMON2_DACCORE (TEMPMON_SENSOR2)
/* ------------------------------------------------------------------------- */
@ -206,7 +201,6 @@
#define I2C_SPEED_77 (0x19181919)
#define I2C_SPEED_50 (0x27262727)
/* ------------------------------------------------------------------------- */
/* DMA Controller */
@ -226,18 +220,16 @@
#define DMA_DIAG_WAITOVERFLOWCOUNTER (0x38)
#define DMA_DIAG_WAITCOUNTER (0x3C)
#define TS_CONTROL(_io) (_io->regs + 0x00)
#define TS_CONTROL2(_io) (_io->regs + 0x04)
#define TS_CONTROL(_io) ((_io)->regs + 0x00)
#define TS_CONTROL2(_io) ((_io)->regs + 0x04)
/* ------------------------------------------------------------------------- */
/* DMA Buffer */
#define DMA_BUFFER_CONTROL(_dma) (_dma->regs + 0x00)
#define DMA_BUFFER_ACK(_dma) (_dma->regs + 0x04)
#define DMA_BUFFER_CURRENT(_dma) (_dma->regs + 0x08)
#define DMA_BUFFER_SIZE(_dma) (_dma->regs + 0x0c)
#define DMA_BUFFER_CONTROL(_dma) ((_dma)->regs + 0x00)
#define DMA_BUFFER_ACK(_dma) ((_dma)->regs + 0x04)
#define DMA_BUFFER_CURRENT(_dma) ((_dma)->regs + 0x08)
#define DMA_BUFFER_SIZE(_dma) ((_dma)->regs + 0x0c)
/* ------------------------------------------------------------------------- */
@ -253,8 +245,8 @@
#define LNB_CMD_DISEQC 6
#define LNB_CMD_SCIF 7
#define LNB_BUSY (1ULL << 4)
#define LNB_TONE (1ULL << 15)
#define LNB_BUSY BIT_ULL(4)
#define LNB_TONE BIT_ULL(15)
#define LNB_STATUS(i) (LNB_BASE + (i) * 0x20 + 0x04)
#define LNB_VOLTAGE(i) (LNB_BASE + (i) * 0x20 + 0x08)
@ -300,7 +292,7 @@
#define CI_BUFFER_BASE (0x3000)
#define CI_BUFFER_SIZE (0x0800)
#define CI_BLOCKIO_BUFFER_SIZE (CI_BUFFER_SIZE/2)
#define CI_BLOCKIO_BUFFER_SIZE (CI_BUFFER_SIZE / 2)
#define CI_BUFFER(i) (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE)
#define CI_BLOCKIO_RECEIVE_BUFFER(i) (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE)
@ -369,7 +361,6 @@
#define FSM_STATUS_READY (0x00010000)
#define FSM_STATUS_QAMREADY (0x00020000)
#define FSM_CAPACITY (FSM_BASE + 0x04)
#define FSM_CAPACITY_MAX (0x3F000000)
#define FSM_CAPACITY_CUR (0x003F0000)
@ -386,7 +377,6 @@
#define FSM_GAIN_N24 (0x00000029)
#define FSM_GAIN_N96 (0x00000011)
/* Attenuator/VGA */
#define RF_ATTENUATOR (0xD8)
@ -408,7 +398,6 @@
#define RF_VGA_GAIN_MAX (200)
/* V1 only */
#define RF_POWER (0xE0)
@ -421,7 +410,6 @@
#define RF_POWER_CONTROL_VALIDMASK (0x00000700)
#define RF_POWER_CONTROL_VALID (0x00000500)
/*
* Output control
*/
@ -453,14 +441,13 @@
#define IQOUTPUT_CONTROL_ENABLE_PEAK (0x00000008)
#define IQOUTPUT_CONTROL_BYPASS_EQUALIZER (0x00000010)
/* Modulator Base V1 */
#define MODULATOR_BASE (0x200)
#define MODULATOR_CONTROL (MODULATOR_BASE)
#define MODULATOR_IQTABLE_END (MODULATOR_BASE+4)
#define MODULATOR_IQTABLE_INDEX (MODULATOR_BASE+8)
#define MODULATOR_IQTABLE_DATA (MODULATOR_BASE+12)
#define MODULATOR_IQTABLE_END (MODULATOR_BASE + 4)
#define MODULATOR_IQTABLE_INDEX (MODULATOR_BASE + 8)
#define MODULATOR_IQTABLE_DATA (MODULATOR_BASE + 12)
#define MODULATOR_IQTABLE_INDEX_CHANNEL_MASK (0x000F0000)
#define MODULATOR_IQTABLE_INDEX_IQ_MASK (0x00008000)
@ -469,7 +456,6 @@
#define MODULATOR_IQTABLE_INDEX_SEL_Q (MODULATOR_IQTABLE_INDEX_IQ_MASK)
#define MODULATOR_IQTABLE_SIZE (2048)
/* Modulator Channels */
#define CHANNEL_BASE dev->link[0].info->regmap->channel->base
@ -521,12 +507,11 @@
#define CHANNEL_SETTINGS2_OUTPUT_MASK (0x0000007F)
#define KFLF_MAX (0x07FFFFFFUL)
#define KF_INIT(Symbolrate) (Symbolrate)
#define LF_INIT(Symbolrate) (9000000UL)
#define KF_INIT(_symbol_rate) (_symbol_rate)
#define LF_INIT(_symbol_rate) (9000000UL)
#define MIN_SYMBOLRATE (1000000)
#define MAX_SYMBOLRATE (7100000)
/* OCTONET */
#define ETHER_BASE (0x100)
@ -563,8 +548,6 @@
#define PID_FILTER_SYSTEM_PIDS(i) (PID_FILTER_BASE + (i) * 0x20)
#define PID_FILTER_PID(i, j) (PID_FILTER_BASE + (i) * 0x20 + (j) * 4)
/* V2 */
/* MAX2871 same as DVB Modulator V2 */
@ -590,7 +573,6 @@
#define DMA_PCIE_LANES_MASK (0x00070000)
/* Modulator Channels, partially compatible to DVB Modulator V1 */
#define SDR_CHANNEL_BASE (0x800)

31
ddbridge/ddbridge.h
View File

@ -100,7 +100,7 @@
#define DDB_MAX_LINK 4
#define DDB_LINK_SHIFT 28
#define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
#define DDB_LINK_TAG(_x) ((_x) << DDB_LINK_SHIFT)
struct ddb_regset {
u32 base;
@ -183,26 +183,25 @@ struct ddb_info {
#ifdef SMALL_DMA_BUFS
#define INPUT_DMA_BUFS 32
#define INPUT_DMA_SIZE (128*47*5)
#define INPUT_DMA_SIZE (128 * 47 * 5)
#define INPUT_DMA_IRQ_DIV 1
#define OUTPUT_DMA_BUFS 32
#define OUTPUT_DMA_SIZE (128*47*5)
#define OUTPUT_DMA_SIZE (128 * 47 * 5)
#define OUTPUT_DMA_IRQ_DIV 1
#else
#define INPUT_DMA_BUFS 8
#define INPUT_DMA_SIZE (128*47*21)
#define INPUT_DMA_SIZE (128 * 47 * 21)
#define INPUT_DMA_IRQ_DIV 1
#define OUTPUT_DMA_BUFS 8
#define OUTPUT_DMA_SIZE (128*47*21)
#define OUTPUT_DMA_SIZE (128 * 47 * 21)
#define OUTPUT_DMA_IRQ_DIV 1
#endif
#define OUTPUT_DMA_BUFS_SDR 32
#define OUTPUT_DMA_SIZE_SDR (256*1024)
#define OUTPUT_DMA_SIZE_SDR (256 * 1024)
#define OUTPUT_DMA_IRQ_DIV_SDR 1
struct ddb;
struct ddb_port;
@ -223,7 +222,7 @@ struct ddb_dma {
#else
struct tasklet_struct tasklet;
#endif
spinlock_t lock;
spinlock_t lock; /* DMA lock */
wait_queue_head_t wq;
int running;
u32 stat;
@ -262,7 +261,6 @@ struct ddb_ci {
struct dvb_ca_en50221 en;
struct ddb_port *port;
u32 nr;
struct mutex lock;
};
struct ddb_io {
@ -296,7 +294,7 @@ struct ddb_port {
u32 regs;
u32 lnr;
struct ddb_i2c *i2c;
struct mutex i2c_gate_lock;
struct mutex i2c_gate_lock; /* I2C access lock */
u32 class;
#define DDB_PORT_NONE 0
#define DDB_PORT_CI 1
@ -406,7 +404,7 @@ struct ddb_ns {
};
struct ddb_lnb {
struct mutex lock;
struct mutex lock; /* lock lnb access */
u32 tone;
fe_sec_voltage_t oldvoltage[4];
u32 voltage[4];
@ -419,14 +417,14 @@ struct ddb_link {
struct ddb_info *info;
u32 nr;
u32 regs;
spinlock_t lock;
struct mutex flash_mutex;
spinlock_t lock; /* lock link access */
struct mutex flash_mutex; /* lock flash access */
struct ddb_lnb lnb;
struct tasklet_struct tasklet;
struct ddb_ids ids;
spinlock_t temp_lock;
int OverTemperatureError;
spinlock_t temp_lock; /* lock temp chip access */
int over_temperature_error;
u8 temp_tab[11];
};
@ -468,7 +466,7 @@ struct ddb {
int ns_num;
struct ddb_ns ns[DDB_NS_MAX];
int vlan;
struct mutex mutex;
struct mutex mutex; /* lock accces to global ddb array */
struct dvb_device *nsd_dev;
u8 tsbuf[TS_CAPTURE_LEN];
@ -530,7 +528,6 @@ struct DDMOD_FLASH {
#define DDMOD_FLASH_MAGIC 0x5F564d5F
int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
#define DDBRIDGE_VERSION "0.9.31"

17
ddbridge/octonet-main.c
View File

@ -52,7 +52,7 @@ static int __init octonet_probe(struct platform_device *pdev)
struct resource *regs;
int irq;
dev = vzalloc(sizeof(struct ddb));
dev = vzalloc(sizeof(*dev));
if (!dev)
return -ENOMEM;
platform_set_drvdata(pdev, dev);
@ -65,7 +65,7 @@ static int __init octonet_probe(struct platform_device *pdev)
return -ENXIO;
dev->regs_len = (regs->end - regs->start) + 1;
dev_info(dev->dev, "regs_start=%08x regs_len=%08x\n",
(u32) regs->start, (u32) dev->regs_len);
(u32)regs->start, (u32)dev->regs_len);
dev->regs = ioremap(regs->start, dev->regs_len);
if (!dev->regs) {
@ -84,20 +84,9 @@ static int __init octonet_probe(struct platform_device *pdev)
dev->link[0].ids.subdevice = dev->link[0].ids.devid >> 16;
dev->link[0].dev = dev;
#if 0
if (dev->link[0].ids.devid == 0x0300dd01)
dev->link[0].info = &ddb_octonet;
else if (dev->link[0].ids.devid == 0x0301dd01)
dev->link[0].info = &ddb_octonet_jse;
else if (dev->link[0].ids.devid == 0x0307dd01)
dev->link[0].info = &ddb_octonet_gtl;
else
dev->link[0].info = &ddb_octonet_tbd;
#else
dev->link[0].info = get_ddb_info(dev->link[0].ids.vendor,
dev->link[0].ids.device,
0xdd01, 0xffff);
#endif
dev_info(dev->dev, "DDBridge: HW %08x REGMAP %08x\n",
dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
dev_info(dev->dev, "DDBridge: MAC %08x DEVID %08x\n",
@ -113,7 +102,7 @@ static int __init octonet_probe(struct platform_device *pdev)
goto fail;
if (request_irq(irq, irq_handler,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"octonet-dvb", (void *) dev) < 0)
"octonet-dvb", (void *)dev) < 0)
goto fail;
ddbwritel(dev, 0x0fffff0f, INTERRUPT_ENABLE);