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https://github.com/DigitalDevices/dddvb.git
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- simplify init_search_param() with new register access functions
- add stream id 0x80000000 to set streaming mode
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parent
611065f572
commit
b814026565
@ -853,45 +853,67 @@ static int stop(struct stv *state)
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return 0;
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}
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static int init_search_param(struct stv *state)
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static void set_pls(struct stv *state, u32 val)
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{
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u8 tmp;
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if (val == state->cur_scrambling_code)
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return;
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write_reg(state, RSTV0910_P2_PLROOT0 + state->regoff,
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val & 0xff);
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write_reg(state, RSTV0910_P2_PLROOT1 + state->regoff,
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(val >> 8) & 0xff);
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write_reg(state, RSTV0910_P2_PLROOT2 + state->regoff,
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(val >> 16) & 0x0f);
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state->cur_scrambling_code = val;
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}
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read_reg(state, RSTV0910_P2_PDELCTRL1 + state->regoff, &tmp);
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tmp |= 0x20; // Filter_en (no effect if SIS=non-MIS
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write_reg(state, RSTV0910_P2_PDELCTRL1 + state->regoff, tmp);
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static void set_isi(struct stv *state, u32 isi)
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{
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if (isi == NO_STREAM_ID_FILTER)
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return;
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if (isi == 0x80000000) {
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set_field(FORCE_CONTINUOUS, 1);
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set_field(TSOUT_NOSYNC, 1);
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} else {
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set_field(FILTER_EN, 1);
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write_reg(state, RSTV0910_P2_ISIENTRY + state->regoff,
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isi & 0xff);
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write_reg(state, RSTV0910_P2_ISIBITENA + state->regoff, 0xff);
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}
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set_field(ALGOSWRST, 1);
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set_field(ALGOSWRST, 0);
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}
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read_reg(state, RSTV0910_P2_PDELCTRL2 + state->regoff, &tmp);
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tmp &= ~0x02; // frame mode = 0
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write_reg(state, RSTV0910_P2_PDELCTRL2 + state->regoff, tmp);
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static void set_stream_modes(struct stv *state, struct dtv_frontend_properties *p)
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{
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u32 scrambling_code = 1;
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write_reg(state, RSTV0910_P2_UPLCCST0 + state->regoff, 0xe0);
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write_reg(state, RSTV0910_P2_ISIBITENA + state->regoff, 0x00);
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set_isi(state, p->stream_id);
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read_reg(state, RSTV0910_P2_TSSTATEM + state->regoff, &tmp);
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tmp &= ~0x01; // nosync = 0, in case next signal is standard TS
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write_reg(state, RSTV0910_P2_TSSTATEM + state->regoff, tmp);
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read_reg(state, RSTV0910_P2_TSCFGL + state->regoff, &tmp);
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tmp &= ~0x04; // embindvb = 0
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write_reg(state, RSTV0910_P2_TSCFGL + state->regoff, tmp);
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read_reg(state, RSTV0910_P2_TSINSDELH + state->regoff, &tmp);
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tmp &= ~0x80; // syncbyte = 0
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write_reg(state, RSTV0910_P2_TSINSDELH + state->regoff, tmp);
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read_reg(state, RSTV0910_P2_TSINSDELM + state->regoff, &tmp);
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tmp &= ~0x08; // token = 0
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write_reg(state, RSTV0910_P2_TSINSDELM + state->regoff, tmp);
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read_reg(state, RSTV0910_P2_TSDLYSET2 + state->regoff, &tmp);
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tmp &= ~0x30; // hysteresis threshold = 0
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write_reg(state, RSTV0910_P2_TSDLYSET2 + state->regoff, tmp);
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read_reg(state, RSTV0910_P2_PDELCTRL0 + state->regoff, &tmp);
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tmp = (tmp & ~0x30) | 0x10; // isi obs mode = 1, observe min ISI
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write_reg(state, RSTV0910_P2_PDELCTRL0 + state->regoff, tmp);
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/* Backwards compatibility to API in CrazyCat tree.
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* PRBS X root cannot be 0, so this should always work.
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*/
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if ((p->stream_id != NO_STREAM_ID_FILTER) &&
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(p->stream_id & 0xfffff00))
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scrambling_code = 0xfffff & (p->stream_id >> 8);
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/* p->pls is always gold code ! */
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if (p->pls != NO_SCRAMBLING_CODE)
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scrambling_code = p->pls | 0x40000;
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set_pls(state, scrambling_code);
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}
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static int init_search_param(struct stv *state, struct dtv_frontend_properties *p)
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{
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set_field(FORCE_CONTINUOUS, 0);
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set_field(FRAME_MODE, 0);
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set_field(FILTER_EN, 0);
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set_field(TSOUT_NOSYNC, 0);
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set_field(TSFIFO_EMBINDVB, 0);
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set_field(TSDEL_SYNCBYTE, 0);
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set_reg(UPLCCST0, 0xe0);
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set_field(TSINS_TOKEN, 0);
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set_field(HYSTERESIS_THRESHOLD, 0);
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set_field(ISIOBS_MODE, 1);
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set_stream_modes(state, p);
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return 0;
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}
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@ -974,7 +996,6 @@ static int start(struct stv *state, struct dtv_frontend_properties *p)
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s32 freq;
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u8 reg_dmdcfgmd;
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u16 symb;
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u32 scrambling_code = 1;
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if (p->symbol_rate < 100000 || p->symbol_rate > 70000000)
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return -EINVAL;
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@ -986,32 +1007,7 @@ static int start(struct stv *state, struct dtv_frontend_properties *p)
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if (state->started)
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write_reg(state, RSTV0910_P2_DMDISTATE + state->regoff, 0x5C);
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init_search_param(state);
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if (p->stream_id != NO_STREAM_ID_FILTER) {
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/* Backwards compatibility to "crazy" API.
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* PRBS X root cannot be 0, so this should always work.
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*/
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if (p->stream_id & 0xffffff00)
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scrambling_code = p->stream_id >> 8;
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write_reg(state, RSTV0910_P2_ISIENTRY + state->regoff,
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p->stream_id & 0xff);
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write_reg(state, RSTV0910_P2_ISIBITENA + state->regoff, 0xff);
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}
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/* props->pls is always gold code ! */
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if (p->pls != NO_SCRAMBLING_CODE)
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scrambling_code = p->pls | 0x40000;
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if (scrambling_code != state->cur_scrambling_code) {
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write_reg(state, RSTV0910_P2_PLROOT0 + state->regoff,
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scrambling_code & 0xff);
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write_reg(state, RSTV0910_P2_PLROOT1 + state->regoff,
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(scrambling_code >> 8) & 0xff);
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write_reg(state, RSTV0910_P2_PLROOT2 + state->regoff,
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(scrambling_code >> 16) & 0x0f);
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state->cur_scrambling_code = scrambling_code;
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}
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init_search_param(state, p);
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if (p->symbol_rate <= 1000000) { /*SR <=1Msps*/
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state->demod_timeout = 3000;
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