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https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
add check for minimum FPGA firmware version
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cad161f939
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@ -336,6 +336,7 @@ static const struct ddb_info ddb_v7a = {
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.board_control = 2,
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.board_control_2 = 4,
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.ts_quirks = TS_QUIRK_REVERSED,
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.hw_min = 0x010007,
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};
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static const struct ddb_info ddb_v7 = {
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@ -347,6 +348,7 @@ static const struct ddb_info ddb_v7 = {
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.board_control = 2,
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.board_control_2 = 4,
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.ts_quirks = TS_QUIRK_REVERSED,
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.hw_min = 0x010007,
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};
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static const struct ddb_info ddb_ctv7 = {
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@ -391,6 +393,7 @@ static const struct ddb_info ddb_ci_s2_pro = {
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.i2c_mask = 0x01,
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.board_control = 2,
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.board_control_2 = 4,
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.hw_min = 0x010007,
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};
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static const struct ddb_info ddb_ci_s2_pro_a = {
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@ -401,6 +404,7 @@ static const struct ddb_info ddb_ci_s2_pro_a = {
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.i2c_mask = 0x01,
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.board_control = 2,
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.board_control_2 = 4,
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.hw_min = 0x010007,
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};
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static const struct ddb_info ddb_dvbct = {
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@ -337,6 +337,13 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
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dev_info(dev->dev, "HW %08x REGMAP %08x\n",
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dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
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if ((dev->link[0].ids.hwid & 0xffffff) <
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dev->link[0].info->hw_min) {
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u32 min = dev->link[0].info->hw_min;
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dev_err(dev->dev, "Update firmware to at least version %u.%u to ensure full functionality!\n",
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(min & 0xff0000) >> 16, min & 0xffff);
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}
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if (dev->link[0].info->ns_num) {
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ddbwritel(dev, 0, ETHER_CONTROL);
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@ -167,6 +167,7 @@ struct ddb_info {
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u8 ns_num;
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u8 con_clock; /* use a continuous clock */
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u8 ts_quirks;
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u8 mci;
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#define TS_QUIRK_SERIAL 1
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#define TS_QUIRK_REVERSED 2
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#define TS_QUIRK_NO_OUTPUT 4
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@ -174,7 +175,7 @@ struct ddb_info {
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u32 tempmon_irq;
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u32 lostlock_irq;
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u32 mdio_base;
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u8 mci;
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u32 hw_min;
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const struct ddb_regmap *regmap;
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};
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