diff --git a/ddbridge/ddbridge-core.c b/ddbridge/ddbridge-core.c index 829e604..dd31347 100644 --- a/ddbridge/ddbridge-core.c +++ b/ddbridge/ddbridge-core.c @@ -56,6 +56,10 @@ static int xo2_speed = 2; module_param(xo2_speed, int, 0444); MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBit/s, default=2, use attribute to change for individual cards"); +static int raw_stream; +module_param(raw_stream, int, 0444); +MODULE_PARM_DESC(raw_stream, "send data as raw stream to DVB layer"); + #ifdef __arm__ static int alt_dma = 1; #else @@ -2401,9 +2405,15 @@ static void input_write_dvb(struct ddb_input *input, if (alt_dma) dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf], dma2->size, DMA_FROM_DEVICE); - dvb_dmx_swfilter_packets(&dvb->demux, - dma2->vbuf[dma->cbuf], - dma2->size / 188); + if (raw_stream || input->con) + dvb_dmx_swfilter_raw(&dvb->demux, + dma2->vbuf[dma->cbuf], + dma2->size); + else + dvb_dmx_swfilter_packets(&dvb->demux, + dma2->vbuf[dma->cbuf], + dma2->size / 188); + dma->cbuf = (dma->cbuf + 1) % dma2->num; if (ack) ddbwritel(dev, (dma->cbuf << 11), diff --git a/ddbridge/ddbridge-mci.c b/ddbridge/ddbridge-mci.c index 9180592..a5683a0 100644 --- a/ddbridge/ddbridge-mci.c +++ b/ddbridge/ddbridge-mci.c @@ -388,6 +388,7 @@ struct dvb_frontend *ddb_mci_attach(struct ddb_input *input, struct mci_cfg *cfg state->nr = nr; state->demod = nr; state->tuner = tuner; + state->input = input; if (cfg->init) cfg->init(state); return &state->fe; diff --git a/ddbridge/ddbridge-mci.h b/ddbridge/ddbridge-mci.h index e03ccc6..a1b2fa9 100644 --- a/ddbridge/ddbridge-mci.h +++ b/ddbridge/ddbridge-mci.h @@ -759,6 +759,7 @@ struct mci_base { }; struct mci { + struct ddb_io *input; struct mci_base *base; struct dvb_frontend fe; int nr; diff --git a/ddbridge/ddbridge-sx8.c b/ddbridge/ddbridge-sx8.c index ab07ecd..9f4c017 100644 --- a/ddbridge/ddbridge-sx8.c +++ b/ddbridge/ddbridge-sx8.c @@ -354,7 +354,8 @@ unlock: cmd.tuner = state->mci.tuner; cmd.demod = state->mci.demod; cmd.output = state->mci.nr; - if (p->stream_id == 0x80000000) + if ((p->stream_id != NO_STREAM_ID_FILTER) && + (p->stream_id & 0x80000000)) cmd.output |= 0x80; stat = ddb_mci_cmd(&state->mci, &cmd, NULL); if (stat) @@ -426,13 +427,15 @@ static int set_parameters(struct dvb_frontend *fe) int stat = 0; struct sx8 *state = fe->demodulator_priv; struct dtv_frontend_properties *p = &fe->dtv_property_cache; - u32 ts_config = SX8_TSCONFIG_MODE_NORMAL, iq_mode = 0, isi; + u32 ts_config = SX8_TSCONFIG_MODE_NORMAL, iq_mode = 0, isi, ts_mode = 0; - isi = p->stream_id; if (isi != NO_STREAM_ID_FILTER) { iq_mode = (isi & 0x30000000) >> 28; + ts_mode = (isi & 0x03000000) >> 24; } + state->mci.input->con = ts_mode << 8; + printk("ts_mode = %02x\n", ts_mode); if (iq_mode) ts_config = (SX8_TSCONFIG_TSHEADER | SX8_TSCONFIG_MODE_IQ); stop(fe); diff --git a/ddbridge/ddbridge.h b/ddbridge/ddbridge.h index ff35992..51f47cd 100644 --- a/ddbridge/ddbridge.h +++ b/ddbridge/ddbridge.h @@ -256,6 +256,7 @@ struct ddb_io { struct ddb_port *port; u32 nr; u32 regs; + u32 con; struct ddb_dma *dma; struct ddb_io *redo; struct ddb_io *redi;