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https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
fix wrong qam register access for SDR cad
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parent
d069dc051f
commit
f6c7586815
@ -5254,7 +5254,7 @@ static void tempmon_setfan(struct ddb_link *link)
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pwm -= 1;
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}
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ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
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}
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}
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static void temp_handler(unsigned long data)
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@ -5308,7 +5308,6 @@ static int ddb_init_tempmon(struct ddb_link *link)
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if (link->ids.regmapid < 0x00010002)
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return;
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spin_lock_init(&link->temp_lock);
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printk("init_tempmon\n");
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tempmon_init(link, 1);
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}
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@ -374,11 +374,13 @@ int ddbridge_mod_output_start(struct ddb_output *output)
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if (mod_SendChannelCommand(dev, Channel, CHANNEL_CONTROL_CMD_SETUP))
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return -EINVAL;
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mod->Control |= CHANNEL_CONTROL_ENABLE_DVB;
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} else {
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} else if (dev->link[0].info->version == 1) {
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/* QAM: 600 601 602 903 604 = 16 32 64 128 256 */
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/* ddbwritel(dev, 0x604, CHANNEL_SETTINGS(output->nr)); */
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ddbwritel(dev, qamtab[mod->modulation], CHANNEL_SETTINGS(output->nr));
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mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ | CHANNEL_CONTROL_ENABLE_DVB);
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} else if (dev->link[0].info->version == 3) {
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mod->Control |= (CHANNEL_CONTROL_ENABLE_IQ | CHANNEL_CONTROL_ENABLE_DVB);
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}
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if (dev->link[0].info->version < 3) {
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mod_set_rateinc(dev, output->nr);
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@ -1618,7 +1620,7 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
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{
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int status, i;
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printk("%s\n", __func__);
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//printk("%s\n", __func__);
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return 0;
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}
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