281 Commits

Author	SHA1	Message	Date
none	74e040f020	unset iq_mode flag in stop_iq	2020-01-15 15:27:01 +01:00
none	ee3e352c0c	add some fallthrough comments	2020-01-15 12:32:34 +01:00
none	e9f2f5788c	new release	2019-12-20 22:47:08 +01:00
none	e736554ff0	report MCI error codes	2019-12-11 09:11:34 +01:00
none	1b9d2782ba	use higher bandwidth if symbol rate selected > 5500000	2019-12-11 09:08:25 +01:00
none	569674e427	handle bandwidth also if mangled by dvb-core	2019-12-11 09:07:17 +01:00
none	154ea8f3c9	oops, wrong id	2019-11-14 14:00:41 +01:00
none	5a536040b5	enable TS for SX8 Basic	2019-11-14 11:50:27 +01:00
none	2886f9daef	add device id for SX8 Basic	2019-11-12 18:16:39 +01:00
none	86eaeed6c1	change name for SX8 basic	2019-11-12 18:15:54 +01:00
Ralph Metzler	71fc781e4b	MAX SX8 basic	2019-11-12 13:59:53 +01:00
Ralph Metzler	44d5488c4a	misuse small bandwidth_hz setting as frequency search range setting in kHz	2019-11-08 13:51:11 +01:00
Ralph Metzler	2186362136	fix gain on SDR modulator	2019-11-08 13:51:11 +01:00
Ralph Metzler	d2337b6620	add SPDX header	2019-11-08 13:51:11 +01:00
Ralph Metzler	e3da57495f	add SPDX headers	2019-11-08 13:51:11 +01:00
Ralph Metzler	4ce013bbb7	adjust flags to latest firmware version	2019-11-08 13:46:52 +01:00
Ralph Metzler	11bd28ea82	move dvb_netstream to ddbridge	2019-09-05 10:12:11 +02:00
Ralph Metzler	3422b8d138	mv dvb_netstream files to ddbridge	2019-08-13 21:59:28 +02:00
Ralph Metzler	1fa617abef	remove unused variables	2019-08-13 21:38:46 +02:00
Ralph Metzler	1b849c6ef2	comment out currently unused function	2019-08-13 21:38:18 +02:00
Ralph Metzler	ab0f16099b	paasify gcc regarding supposedly possibly undefined adap (can actually never happen)	2019-08-13 21:37:10 +02:00
Ralph Metzler	2e392cfe43	add some pcie debugging	2019-08-12 21:40:09 +02:00
Ralph Metzler	a19a066b39	adjust some copyright years	2019-08-12 21:39:33 +02:00
Ralph Metzler	d3d574c13c	change KBUILD_EXTMOD	2019-08-12 21:37:16 +02:00
Ralph Metzler	b86ea4524f	update some headers to 2019	2019-08-05 16:04:44 +02:00
Ralph Metzler	35e0de3968	change fan control to go down faster	2019-08-05 16:01:12 +02:00
Ralph Metzler	4196458803	add IQ output rate property	2019-08-05 16:00:23 +02:00
Ralph Metzler	e7f6f67a49	change new SDR modulator to type 18	2019-07-08 10:09:18 +02:00
Ralph Metzler	4de414351c	separate property function for SDR type modulators	2019-07-08 10:08:59 +02:00
Ralph Metzler	565cf88969	adapt to latest firmware	2019-07-08 10:07:24 +02:00
Ralph Metzler	f2ca278710	correct typo	2019-07-08 10:01:22 +02:00
Ralph Metzler	f57b5c8b20	change SDR modulator version to 18	2019-07-08 10:01:01 +02:00
Ralph Metzler	d350eef406	add DVB-S and Max M4 to dummy device handling	2019-07-08 10:00:11 +02:00
Ralph Metzler	e68df13ad0	remove wrong check	2019-04-12 20:13:03 +02:00
Ralph Metzler	0248e43bc7	use correct i2c num entry	2019-04-12 20:11:27 +02:00
Ralph Metzler	4783d0eab2	make default modulations a module parameter	2019-04-03 15:16:10 +02:00
Ralph Metzler	ad0d1316a7	need parantheses around expression	2019-04-03 15:15:19 +02:00
Ralph Metzler	c0af1d7e45	add recent changes to interface	2019-04-03 15:12:29 +02:00
Ralph Metzler	ab59d9b705	add debugging to MCI timeout	2019-04-03 15:12:02 +02:00
Ralph Metzler	16b15dfcc0	add serial number attribute for cards at GT link ports	2019-03-14 12:47:48 +01:00
Ralph Metzler	af0a513d12	add DVBT modulator card	2019-03-14 12:47:00 +01:00
Ralph Metzler	da39fb4c0d	add acheck for PCIe link lost in case of MCI timeout	2019-03-14 12:45:30 +01:00
Ralph Metzler	1d4fa8f5a3	SDR cards start at 16	2019-03-14 12:44:46 +01:00
Ralph Metzler	2508919151	change attach handling	2019-03-14 12:44:21 +01:00
Ralph Metzler	2e3c59ecc3	reduce ts speed, some motherboard chipsets cannot handle it	2019-03-14 12:42:52 +01:00
Ralph Metzler	6e39d83c7b	new version	2019-01-18 13:10:13 +01:00
Ralph Metzler	e73ae1a4c6	set base frequency ... initialize mod pointers	2019-01-18 13:09:17 +01:00
Ralph Metzler	1672bdfcb8	add missing struct element	2019-01-17 19:10:10 +01:00
Ralph Metzler	0b042c1fc3	add new SDR card id	2019-01-17 19:08:07 +01:00
Ralph Metzler	67f0820a53	use default FPGA image values	2018-11-19 19:10:29 +01:00