Commit Graph

374 Commits

Author SHA1 Message Date
rjkm 86579d353e add SNR reading for XO2 CI and use correct I2C device 2022-02-07 19:55:31 +01:00
rjkm 63df691561 add type name for second input of dual CI 2022-02-07 19:15:45 +01:00
rjkm b5bb500106 move ns.h to ddbridge directory 2022-01-14 20:23:32 +01:00
rjkm 24b7f979c4 process output_start fails (input cannot fail) 2022-01-14 20:23:32 +01:00
rjkm be19cdb31d define macro for older kernels 2022-01-14 20:23:32 +01:00
rjkm 56afb2acc1 style cleanup 2022-01-14 20:23:32 +01:00
rjkm 08b3218e5a use already resolved link and info 2022-01-14 20:23:32 +01:00
rjkm e17abdbbb9 return start error 2022-01-14 20:23:32 +01:00
rjkm 8bda007f05 add MCI registers for FSM 2021-12-06 14:54:51 +01:00
rjkm b606a7b2b2 increase wit time after powerup and before reset to 300ms
Signed-off-by: rjkm <none>
2021-09-23 15:07:00 +02:00
rjkm 719ac4d231 remove workqueue and threaded interrupt modes, they are too laggy 2021-09-19 19:05:05 +02:00
rjkm b23187a049 Add module paramaters for SX8 tuner flags and gain. 2021-08-08 22:14:42 +02:00
rjkm 0165538f13 prepare to get roll off for SDR mode from parameters but use fixed one
for now
2021-08-07 23:00:29 +02:00
rjkm 0b9d3ffa6b move lut for use in other functions 2021-08-07 22:57:40 +02:00
rjkm f7fcc1511d add extended stats 2021-08-07 22:30:10 +02:00
rjkm 37ae102d57 use correct u8 type 2021-08-07 22:30:01 +02:00
rjkm 66b1cf3623 new signal loss counter field 2021-08-07 22:29:17 +02:00
rjkm 7f002f1356 add 7/8 to offset 4 2021-08-07 22:28:42 +02:00
rjkm 418bd83b40 only set tuner flags once 2021-07-05 18:42:05 +02:00
none c23435e275 handle revision 1 mods differently 2021-06-23 11:18:35 +02:00
none 8f5af7742d do not use workqueues by dfault, they can lead to dma overflows 2021-06-22 20:51:28 +02:00
none e1e569975f add FW version to output 2021-06-06 20:23:43 +02:00
none b9998ee9e2 add new structs 2021-06-06 20:23:06 +02:00
none 8039097426 add support for FE_TIMEDOUT 2021-05-26 22:39:27 +02:00
mvoelkel f3d5adc777 added puncture_rate to modulator stream setup 2021-04-17 21:03:05 +02:00
none 50e354c49a cleanup 2021-04-07 19:29:53 +02:00
none a5ad0b0584 show MCI firmware version 2021-04-07 19:28:12 +02:00
none 3cb3df51cf use correct kernel integer types 2021-04-07 19:27:21 +02:00
none 2311b94970 add modulator MCI commands 2021-04-07 19:25:32 +02:00
none f12fe91b51 use PCI revision to determine major firmware version 2021-04-07 19:21:24 +02:00
none 35c283bf2f remove test command 2021-04-07 19:20:38 +02:00
none 41a9626be4 remove unnused variable 2021-04-07 19:20:24 +02:00
none a6c3b82f83 make include usable in user space 2021-03-18 13:48:09 +01:00
none e863a2037a add byte array to union 2021-03-18 13:47:45 +01:00
none 92cd675f5d move ddbridge ioctls to separate file 2021-03-18 12:39:41 +01:00
none dda8698514 add timeout status 2021-03-18 10:45:53 +01:00
none fc9a89c870 add per demod lock for more fine-grained locking 2021-03-18 10:44:11 +01:00
none 4b0a0c4ff2 allow explicit setting of roll-off 2021-03-18 10:39:07 +01:00
none c3c734b0e8 remove unsused variables and code 2021-03-11 23:23:30 +01:00
none 8380cb185f change direct_mode to module parameter 2021-03-11 23:22:03 +01:00
none f9eb03a065 remove unused entries 2021-03-11 23:20:31 +01:00
none f8c97ad3d6 remove init dump, cannot access regs directly on all platforms 2021-03-11 22:43:12 +01:00
none de0e970999 change input locked in fmode=4 and do not send emulated sequence as diseqc 2021-03-11 22:31:52 +01:00
none cf35c3038b only get status if demod started 2021-03-10 22:03:56 +01:00
none a2d39f90d5 add module parameter for disabling voltage output in Max cards. 2021-03-09 20:21:09 +01:00
none 7af71dfdcb lock ldpc bitrate adjustment to prevent race condition during tuner stop 2021-03-09 14:23:06 +01:00
none b025599e9f dump more buffer bytes in case of misalignment 2021-03-01 12:58:54 +01:00
none 9028e75f63 always use unaligned processing if detected once 2021-03-01 12:58:21 +01:00
none 177e6b0fd6 check if memory is aligned to 4K 2021-03-01 12:57:45 +01:00
none de82a50b4e Set allocated memory to zero. 2021-03-01 12:57:20 +01:00