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mirror of https://github.com/DigitalDevices/dddvb.git synced 2023-10-10 13:37:43 +02:00
Commit Graph

71 Commits

Author SHA1 Message Date
Ralph Metzler
1b0df5fcfa octopro fixes 2016-05-02 16:27:32 +02:00
Ralph Metzler
de16096894 add new maps for dma and i/o 2016-04-20 16:27:56 +02:00
Ralph Metzler
d180cb70e2 octopro fixes 2016-04-15 23:53:20 +02:00
Ralph Metzler
30ca8e9962 another fix for irq handler v2 2016-04-15 22:51:50 +02:00
Ralph Metzler
4591bab46b irq v2 fixes
add no_init option to prevent most devices initializations
2016-04-15 22:45:55 +02:00
Ralph Metzler
8f30246ff1 first support for v2 irq core 2016-04-15 18:08:51 +02:00
Ralph Metzler
92d8b37839 q 2016-04-13 22:19:10 +02:00
Ralph Metzler
0b4d6d807a MSI fixes
- ack only the status bits belonging to corresponding interrupt handler
- set msi 2 instead of 1
2016-04-13 22:19:10 +02:00
Ralph Metzler
64f21d8f99 allow higher transer speed for stv0910 2016-04-12 12:19:14 +02:00
Ralph Metzler
1d3bb91eb8 cleanup 2016-04-11 18:26:07 +02:00
Ralph Metzler
197897731e NULL pointer cleanup 2016-04-11 18:17:20 +02:00
Ralph Metzler
829929a41f cine s2 v7 has TS lines crossed 2015-12-10 18:26:45 +01:00
Ralph Metzler
e83dedf6b4 First check for LNBHs on 0x0c/0x0d. 2015-10-22 14:55:55 +02:00
Ralph Metzler
d10c83f16a Change handling of card type attribute. 2015-10-22 14:51:36 +02:00
Ralph Metzler
e2145682e2 block opening of ci device with O_RDWR 2015-09-24 23:29:09 +02:00
Ralph Metzler
dd78dae68b loop over remote link interrupt status to prevent race condition 2015-09-20 01:45:11 +02:00
Ralph Metzler
0393ab4db4 remove debugging messages 2015-09-19 22:20:35 +02:00
Ralph Metzler
29dc0f9e31 Initial support for Max C2T2-8 2015-09-17 18:54:25 +02:00
Ralph Metzler
4f53aa9a1b store ids for all links in link structure and add devid attribute 2015-09-06 19:08:57 +02:00
Ralph Metzler
4e1b527c35 - fix dynamic fmode changes
- 69Mhz no longer needed for MaxS8 on GT link
- show state in GT link change
2015-08-31 20:53:22 +02:00
mvoelkel
9e2128c4fb initial commit from dddvb-0.9.19c 2015-08-05 17:22:42 +02:00