compiling for kernel 4.12.x

- check for number of FSM modulator channels before allocating ports

apps/octonet/ddtest.c

@@ -1319,6 +1319,120 @@ int read_id(int dev, int argc, char* argv[], uint32_t Flags)
 
 }
 
+int i2cread(int dev, int argc, char* argv[], uint32_t Flags)
+{
+	uint8_t BusNumber     = 0;
+	uint8_t DeviceAddress = 0;
+	int i;
+	uint32_t tmp;
+	char *p;
+	uint32_t BufferLength;
+	uint32_t ReadLen;
+	uint8_t *Buffer;
+	int Repeat = (Flags & REPEAT_FLAG) != 0;
+	int Silent = (Flags & SILENT_FLAG) != 0;
+	
+	if (argc < 2)
+		return -1;
+	
+	tmp = strtoul(argv[0],&p,16);
+	if (tmp > 255)
+		return -1;
+	
+	if (*p == ':') {
+		BusNumber = (uint8_t) (tmp - 1);
+		tmp = strtoul(&p[1],NULL,16);
+	}
+	if (tmp > 255 || BusNumber > 3)
+		return -1;
+	
+	DeviceAddress = (uint8_t) tmp;
+	BufferLength = (argc-2);
+	ReadLen = strtoul(argv[argc-1],NULL,0);
+	if (ReadLen > BufferLength)
+		BufferLength = ReadLen ;
+	
+	printf(" BufferLength = %d tmp = %d\n", BufferLength, ReadLen);
+	Buffer = malloc(BufferLength);
+	
+	for (i = 1; i < (argc-1); i += 1 ) {
+		tmp = strtoul(argv[i],NULL,16);
+		if (tmp > 255) {
+			free(Buffer);
+			return -1;
+		}
+		Buffer[i-1] = (uint8_t) tmp;
+	}
+	
+	do {
+		int hr = i2c_read(dev, BusNumber, DeviceAddress, Buffer, argc-2, Buffer, ReadLen);
+		if (hr < 0) {
+			printf("ioctl error\n");
+			free(Buffer);
+			return 0;
+		}
+		if (!Silent) {
+			printf("OK\n");
+			Dump(&Buffer[0],0,ReadLen);
+		}
+	} while (Repeat);
+	free(Buffer);
+	return 0;
+}
+
+int i2cwrite(int dev, int argc, char* argv[], uint32_t Flags)
+{
+    uint8_t BusNumber     = 0;
+    uint8_t DeviceAddress = 0;
+    uint32_t tmp;
+    char *p;
+    uint8_t *Buffer;
+    int i;
+    int Repeat = (Flags & REPEAT_FLAG) != 0;
+    int Silent = (Flags & SILENT_FLAG) != 0;
+
+    
+    if( argc < 1 )
+		return -1;
+    tmp = strtoul(argv[0],&p,16);
+    if( tmp > 255 )
+	    return -1;
+
+    if (*p == ':') {
+	    BusNumber = (uint8_t) (tmp - 1);
+	    tmp = strtoul(&p[1],NULL,16);
+    }
+    if( tmp > 255 || BusNumber > 3)
+	    return -1;
+
+    DeviceAddress = (uint8_t) tmp;
+    Buffer = malloc(argc - 1);
+
+    for (i = 1; i < argc; i += 1)  {
+        tmp = strtoul(argv[i],NULL,16);
+        if (tmp > 255 ) {
+		free(Buffer);
+		return -1;
+        }
+        Buffer[i-1] = (uint8_t) tmp;
+    }
+
+    do {
+	    int hr =i2c_write(dev, BusNumber,DeviceAddress,NULL,0,Buffer,argc-1);
+	    if (hr < 0) {
+		    printf("ioctl error\n");
+		    free(Buffer);
+		    return 0;
+	    }
+	    if( !Silent )
+		    printf("OK\n");
+    } while( Repeat );
+
+    free(Buffer);
+    return 0;
+}
+
+
 struct SCommand CommandTable[] = 
 {
 	{ "memread",    ReadDeviceMemory,   1,   "Read Device Memory   : memread <start> <count>" },
@@ -1343,6 +1457,8 @@ struct SCommand CommandTable[] =
 	{ "licexport",   lic_export,       1,   "License Export           : licexport" },
 	{ "licerase",    lic_erase,        1,   "License Erase            : licerase"  },
 	{ "read_id",    read_id,        1,      "Read Unique ID           : read_id"  },
+	{ "i2cread",    i2cread,        1,     "I2C Read : I2CRead  <[BusNumber:]DeviceAddress> [<write data>..] <read count>" },
+	{ "i2write",    i2cwrite,        1,    "I2C Write            : I2CWrite <[BusNumber:]DeviceAddress> [<write data>..]"},
  	{ NULL,NULL,0 }
 };
 

ddbridge/Kbuild

@@ -1,7 +1,7 @@
 EXTRA_CFLAGS += -DCONFIG_DVB_CXD2843 -DCONFIG_DVB_LNBP21 -DCONFIG_DVB_STV090x -DCONFIG_DVB_STV6110x -DCONFIG_DVB_DRXK -DCONFIG_DVB_STV0910 -DCONFIG_DVB_STV6111 -DCONFIG_DVB_LNBH25 -DCONFIG_DVB_MXL5XX
 
-ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o
+ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
-octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o
+octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
 
 obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o
 obj-$(CONFIG_DVB_OCTONET) += octonet.o

ddbridge/Makefile

@@ -2,8 +2,8 @@
 # Makefile for the ddbridge device driver
 #
 
-ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o
+ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-ci.o ddbridge-max.o
-octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o
+octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-ci.o ddbridge-max.o
 
 obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o
 obj-$(CONFIG_DVB_OCTONET) += octonet.o

ddbridge/Makefile.kernel

@@ -2,8 +2,8 @@
 # Makefile for the ddbridge device driver
 #
 
-ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o
+ddbridge-objs = ddbridge-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
-octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o
+octonet-objs = octonet-main.o ddbridge-hw.o ddbridge-i2c.o ddbridge-ns.o ddbridge-modulator.o ddbridge-core.o ddbridge-io.o ddbridge-ci.o ddbridge-max.o
 
 obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o
 obj-$(CONFIG_DVB_OCTONET) += octonet.o

ddbridge/ddbridge-ci.c

@@ -0,0 +1,350 @@
+/*
+ * ddbridge-ci.c: Digital Devices bridge and DuoFlex CI driver
+ *
+ * Copyright (C) 2010-2017 Digital Devices GmbH
+ *                         Ralph Metzler <rjkm@metzlerbros.de>
+ *                         Marcus Metzler <mocm@metzlerbros.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "ddbridge.h"
+#include "ddbridge-io.h"
+#include "ddbridge-i2c.h"
+
+/* Octopus CI internal CI interface */
+
+static int wait_ci_ready(struct ddb_ci *ci)
+{
+	u32 count = 10;
+
+	ndelay(500);
+	do {
+		if (ddbreadl(ci->port->dev,
+			     CI_CONTROL(ci->nr)) & CI_READY)
+			break;
+		usleep_range(1, 2);
+		if ((--count) == 0)
+			return -1;
+	} while (1);
+	return 0;
+}
+
+static int read_attribute_mem(struct dvb_ca_en50221 *ca,
+			      int slot, int address)
+{
+	struct ddb_ci *ci = ca->data;
+	u32 val, off = (address >> 1) & (CI_BUFFER_SIZE - 1);
+
+	if (address > CI_BUFFER_SIZE)
+		return -1;
+	ddbwritel(ci->port->dev, CI_READ_CMD | (1 << 16) | address,
+		  CI_DO_READ_ATTRIBUTES(ci->nr));
+	wait_ci_ready(ci);
+	val = 0xff & ddbreadl(ci->port->dev, CI_BUFFER(ci->nr) + off);
+	return val;
+}
+
+static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
+			       int address, u8 value)
+{
+	struct ddb_ci *ci = ca->data;
+
+	ddbwritel(ci->port->dev, CI_WRITE_CMD | (value << 16) | address,
+		  CI_DO_ATTRIBUTE_RW(ci->nr));
+	wait_ci_ready(ci);
+	return 0;
+}
+
+static int read_cam_control(struct dvb_ca_en50221 *ca,
+			    int slot, u8 address)
+{
+	u32 count = 100;
+	struct ddb_ci *ci = ca->data;
+	u32 res;
+
+	ddbwritel(ci->port->dev, CI_READ_CMD | address,
+		  CI_DO_IO_RW(ci->nr));
+	ndelay(500);
+	do {
+		res = ddbreadl(ci->port->dev, CI_READDATA(ci->nr));
+		if (res & CI_READY)
+			break;
+		usleep_range(1, 2);
+		if ((--count) == 0)
+			return -1;
+	} while (1);
+	return 0xff & res;
+}
+
+static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
+			     u8 address, u8 value)
+{
+	struct ddb_ci *ci = ca->data;
+
+	ddbwritel(ci->port->dev, CI_WRITE_CMD | (value << 16) | address,
+		  CI_DO_IO_RW(ci->nr));
+	wait_ci_ready(ci);
+	return 0;
+}
+
+static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	ddbwritel(ci->port->dev, CI_POWER_ON,
+		  CI_CONTROL(ci->nr));
+	msleep(100);
+	ddbwritel(ci->port->dev, CI_POWER_ON | CI_RESET_CAM,
+		  CI_CONTROL(ci->nr));
+	ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON | CI_RESET_CAM,
+		  CI_CONTROL(ci->nr));
+	usleep_range(20, 25);
+	ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON,
+		  CI_CONTROL(ci->nr));
+	return 0;
+}
+
+static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	ddbwritel(ci->port->dev, 0, CI_CONTROL(ci->nr));
+	msleep(300);
+	return 0;
+}
+
+static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+	u32 val = ddbreadl(ci->port->dev, CI_CONTROL(ci->nr));
+
+	ddbwritel(ci->port->dev, val | CI_BYPASS_DISABLE,
+		  CI_CONTROL(ci->nr));
+	return 0;
+}
+
+static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
+{
+	struct ddb_ci *ci = ca->data;
+	u32 val = ddbreadl(ci->port->dev, CI_CONTROL(ci->nr));
+	int stat = 0;
+
+	if (val & CI_CAM_DETECT)
+		stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
+	if (val & CI_CAM_READY)
+		stat |= DVB_CA_EN50221_POLL_CAM_READY;
+	return stat;
+}
+
+static struct dvb_ca_en50221 en_templ = {
+	.read_attribute_mem  = read_attribute_mem,
+	.write_attribute_mem = write_attribute_mem,
+	.read_cam_control    = read_cam_control,
+	.write_cam_control   = write_cam_control,
+	.slot_reset          = slot_reset,
+	.slot_shutdown       = slot_shutdown,
+	.slot_ts_enable      = slot_ts_enable,
+	.poll_slot_status    = poll_slot_status,
+};
+
+static void ci_attach(struct ddb_port *port)
+{
+	struct ddb_ci *ci = 0;
+
+	ci = kzalloc(sizeof(*ci), GFP_KERNEL);
+	if (!ci)
+		return;
+	memcpy(&ci->en, &en_templ, sizeof(en_templ));
+	ci->en.data = ci;
+	port->en = &ci->en;
+	ci->port = port;
+	ci->nr = port->nr - 2;
+}
+
+/* DuoFlex Dual CI support */
+
+static int write_creg(struct ddb_ci *ci, u8 data, u8 mask)
+{
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+
+	ci->port->creg = (ci->port->creg & ~mask) | data;
+	return i2c_write_reg(i2c, adr, 0x02, ci->port->creg);
+}
+
+static int read_attribute_mem_xo2(struct dvb_ca_en50221 *ca,
+				  int slot, int address)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+	int res;
+	u8 val;
+
+	res = i2c_read_reg16(i2c, adr, 0x8000 | address, &val);
+	return res ? res : val;
+}
+
+static int write_attribute_mem_xo2(struct dvb_ca_en50221 *ca, int slot,
+				   int address, u8 value)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+
+	return i2c_write_reg16(i2c, adr, 0x8000 | address, value);
+}
+
+static int read_cam_control_xo2(struct dvb_ca_en50221 *ca,
+				int slot, u8 address)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+	u8 val;
+	int res;
+
+	res = i2c_read_reg(i2c, adr, 0x20 | (address & 3), &val);
+	return res ? res : val;
+}
+
+static int write_cam_control_xo2(struct dvb_ca_en50221 *ca, int slot,
+				 u8 address, u8 value)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+
+	return i2c_write_reg(i2c, adr, 0x20 | (address & 3), value);
+}
+
+static int slot_reset_xo2(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	write_creg(ci, 0x01, 0x01);
+	write_creg(ci, 0x04, 0x04);
+	msleep(20);
+	write_creg(ci, 0x02, 0x02);
+	write_creg(ci, 0x00, 0x04);
+	write_creg(ci, 0x18, 0x18);
+	return 0;
+}
+
+static int slot_shutdown_xo2(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	/*i2c_write_reg(i2c, adr, 0x03, 0x60);*/
+	/*i2c_write_reg(i2c, adr, 0x00, 0xc0);*/
+	write_creg(ci, 0x10, 0xff);
+	write_creg(ci, 0x08, 0x08);
+	return 0;
+}
+
+static int slot_ts_enable_xo2(struct dvb_ca_en50221 *ca, int slot)
+{
+	struct ddb_ci *ci = ca->data;
+
+	write_creg(ci, 0x00, 0x10);
+	return 0;
+}
+
+static int poll_slot_status_xo2(struct dvb_ca_en50221 *ca, int slot, int open)
+{
+	struct ddb_ci *ci = ca->data;
+	struct i2c_adapter *i2c = &ci->port->i2c->adap;
+	u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13;
+	u8 val = 0;
+	int stat = 0;
+
+	i2c_read_reg(i2c, adr, 0x01, &val);
+
+	if (val & 2)
+		stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
+	if (val & 1)
+		stat |= DVB_CA_EN50221_POLL_CAM_READY;
+	return stat;
+}
+
+static struct dvb_ca_en50221 en_xo2_templ = {
+	.read_attribute_mem  = read_attribute_mem_xo2,
+	.write_attribute_mem = write_attribute_mem_xo2,
+	.read_cam_control    = read_cam_control_xo2,
+	.write_cam_control   = write_cam_control_xo2,
+	.slot_reset          = slot_reset_xo2,
+	.slot_shutdown       = slot_shutdown_xo2,
+	.slot_ts_enable      = slot_ts_enable_xo2,
+	.poll_slot_status    = poll_slot_status_xo2,
+};
+
+static void ci_xo2_attach(struct ddb_port *port)
+{
+	struct ddb_ci *ci = 0;
+	struct i2c_adapter *i2c;
+
+	ci = kzalloc(sizeof(*ci), GFP_KERNEL);
+	if (!ci)
+		return;
+	memcpy(&ci->en, &en_xo2_templ, sizeof(en_xo2_templ));
+	ci->en.data = ci;
+	port->en = &ci->en;
+	ci->port = port;
+	ci->nr = port->nr - 2;
+	ci->port->creg = 0;
+	i2c = &ci->port->i2c->adap;
+	write_creg(ci, 0x10, 0xff);
+	write_creg(ci, 0x08, 0x08);
+}
+
+static struct cxd2099_cfg cxd_cfg = {
+	.bitrate =  72000,
+	.adr     =  0x40,
+	.polarity = 1,
+	.clock_mode = 1,
+	.max_i2c = 512,
+};
+
+int ddb_ci_attach(struct ddb_port *port, u32 bitrate)
+{
+	switch (port->type) {
+	case DDB_CI_EXTERNAL_SONY:
+		cxd_cfg.bitrate = bitrate;
+		port->en = cxd2099_attach(&cxd_cfg, port, &port->i2c->adap);
+		if (!port->en)
+			return -ENODEV;
+		dvb_ca_en50221_init(port->dvb[0].adap,
+				    port->en, 0, 1);
+		break;
+
+	case DDB_CI_EXTERNAL_XO2:
+	case DDB_CI_EXTERNAL_XO2_B:
+		ci_xo2_attach(port);
+		if (!port->en)
+			return -ENODEV;
+		dvb_ca_en50221_init(port->dvb[0].adap, port->en, 0, 1);
+		break;
+		
+	case DDB_CI_INTERNAL:
+		ci_attach(port);
+		if (!port->en)
+			return -ENODEV;
+		dvb_ca_en50221_init(port->dvb[0].adap, port->en, 0, 1);
+		break;
+	}
+	return 0;
+}

ddbridge/ddbridge-hw.c

@@ -1,5 +1,5 @@
 /*
- * ddbridge.c: Digital Devices PCIe bridge driver
+ * ddbridge-hw.c: Digital Devices device information tables
  *
  * Copyright (C) 2010-2017 Digital Devices GmbH
  *                         Ralph Metzler <rjkm@metzlerbros.de>
@@ -18,10 +18,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 #include "ddbridge.h"
@@ -30,19 +28,19 @@
 /****************************************************************************/
 /****************************************************************************/
 
-static struct ddb_regset octopus_mod_odma = {
+static const struct ddb_regset octopus_mod_odma = {
 	.base = 0x300,
 	.num  = 0x0a,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_mod_odma_buf = {
+static const struct ddb_regset octopus_mod_odma_buf = {
 	.base = 0x2000,
 	.num  = 0x0a,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopus_mod_channel = {
+static const struct ddb_regset octopus_mod_channel = {
 	.base = 0x400,
 	.num  = 0x0a,
 	.size = 0x40,
@@ -50,25 +48,25 @@ static struct ddb_regset octopus_mod_channel = {
 
 /****************************************************************************/
 
-static struct ddb_regset octopus_mod_2_odma = {
+static const struct ddb_regset octopus_mod_2_odma = {
 	.base = 0x400,
 	.num  = 0x18,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_mod_2_odma_buf = {
+static const struct ddb_regset octopus_mod_2_odma_buf = {
 	.base = 0x8000,
 	.num  = 0x18,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopus_mod_2_channel = {
+static const struct ddb_regset octopus_mod_2_channel = {
 	.base = 0x800,
 	.num  = 0x18,
 	.size = 0x40,
 };
 
-static struct ddb_regset octopus_sdr_output = {
+static const struct ddb_regset octopus_sdr_output = {
 	.base = 0x240,
 	.num  = 0x14,
 	.size = 0x10,
@@ -76,49 +74,49 @@ static struct ddb_regset octopus_sdr_output = {
 
 /****************************************************************************/
 
-static struct ddb_regset octopus_input = {
+static const struct ddb_regset octopus_input = {
 	.base = 0x200,
 	.num  = 0x08,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_output = {
+static const struct ddb_regset octopus_output = {
 	.base = 0x280,
 	.num  = 0x08,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_idma = {
+static const struct ddb_regset octopus_idma = {
 	.base = 0x300,
 	.num  = 0x08,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_idma_buf = {
+static const struct ddb_regset octopus_idma_buf = {
 	.base = 0x2000,
 	.num  = 0x08,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopus_odma = {
+static const struct ddb_regset octopus_odma = {
 	.base = 0x380,
 	.num  = 0x04,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopus_odma_buf = {
+static const struct ddb_regset octopus_odma_buf = {
 	.base = 0x2800,
 	.num  = 0x04,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopus_i2c = {
+static const struct ddb_regset octopus_i2c = {
 	.base = 0x80,
 	.num  = 0x04,
 	.size = 0x20,
 };
 
-static struct ddb_regset octopus_i2c_buf = {
+static const struct ddb_regset octopus_i2c_buf = {
 	.base = 0x1000,
 	.num  = 0x04,
 	.size = 0x200,
@@ -126,55 +124,55 @@ static struct ddb_regset octopus_i2c_buf = {
 
 /****************************************************************************/
 
-static struct ddb_regset octopro_input = {
+static const struct ddb_regset octopro_input = {
 	.base = 0x400,
 	.num  = 0x14,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopro_output = {
+static const struct ddb_regset octopro_output = {
 	.base = 0x600,
 	.num  = 0x0a,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopro_idma = {
+static const struct ddb_regset octopro_idma = {
 	.base = 0x800,
 	.num  = 0x40,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopro_idma_buf = {
+static const struct ddb_regset octopro_idma_buf = {
 	.base = 0x4000,
 	.num  = 0x40,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopro_odma = {
+static const struct ddb_regset octopro_odma = {
 	.base = 0xc00,
 	.num  = 0x20,
 	.size = 0x10,
 };
 
-static struct ddb_regset octopro_odma_buf = {
+static const struct ddb_regset octopro_odma_buf = {
 	.base = 0x8000,
 	.num  = 0x20,
 	.size = 0x100,
 };
 
-static struct ddb_regset octopro_i2c = {
+static const struct ddb_regset octopro_i2c = {
 	.base = 0x200,
 	.num  = 0x0a,
 	.size = 0x20,
 };
 
-static struct ddb_regset octopro_i2c_buf = {
+static const struct ddb_regset octopro_i2c_buf = {
 	.base = 0x2000,
 	.num  = 0x0a,
 	.size = 0x200,
 };
 
-static struct ddb_regset octopro_gtl = {
+static const struct ddb_regset octopro_gtl = {
 	.base = 0xe00,
 	.num  = 0x03,
 	.size = 0x40,
@@ -183,8 +181,7 @@ static struct ddb_regset octopro_gtl = {
 /****************************************************************************/
 /****************************************************************************/
 
-
+static const struct ddb_regmap octopus_map = {
-static struct ddb_regmap octopus_map = {
 	.irq_version = 1,
 	.irq_base_i2c = 0,
 	.irq_base_idma = 8,
@@ -199,7 +196,7 @@ static struct ddb_regmap octopus_map = {
 	.output = &octopus_output,
 };
 
-static struct ddb_regmap octopro_map = {
+static const struct ddb_regmap octopro_map = {
 	.irq_version = 2,
 	.irq_base_i2c = 32,
 	.irq_base_idma = 64,
@@ -216,7 +213,7 @@ static struct ddb_regmap octopro_map = {
 	.gtl = &octopro_gtl,
 };
 
-static struct ddb_regmap octopro_hdin_map = {
+static const struct ddb_regmap octopro_hdin_map = {
 	.irq_version = 2,
 	.irq_base_i2c = 32,
 	.irq_base_idma = 64,
@@ -231,7 +228,7 @@ static struct ddb_regmap octopro_hdin_map = {
 	.output = &octopro_output,
 };
 
-static struct ddb_regmap octopus_mod_map = {
+static const struct ddb_regmap octopus_mod_map = {
 	.irq_version = 1,
 	.irq_base_odma = 8,
 	.irq_base_rate = 18,
@@ -241,7 +238,7 @@ static struct ddb_regmap octopus_mod_map = {
 	.channel = &octopus_mod_channel,
 };
 
-static struct ddb_regmap octopus_mod_2_map = {
+static const struct ddb_regmap octopus_mod_2_map = {
 	.irq_version = 2,
 	.irq_base_odma = 64,
 	.irq_base_rate = 32,
@@ -251,7 +248,7 @@ static struct ddb_regmap octopus_mod_2_map = {
 	.channel = &octopus_mod_2_channel,
 };
 
-static struct ddb_regmap octopus_sdr_map = {
+static const struct ddb_regmap octopus_sdr_map = {
 	.irq_version = 2,
 	.irq_base_odma = 64,
 	.irq_base_rate = 32,
@@ -261,17 +258,16 @@ static struct ddb_regmap octopus_sdr_map = {
 	.channel = &octopus_mod_2_channel,
 };
 
-
 /****************************************************************************/
 /****************************************************************************/
 
-static struct ddb_info ddb_none = {
+static const struct ddb_info ddb_none = {
 	.type     = DDB_NONE,
 	.name     = "unknown Digital Devices device, install newer driver",
 	.regmap   = &octopus_map,
 };
 
-static struct ddb_info ddb_octopus = {
+static const struct ddb_info ddb_octopus = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus DVB adapter",
 	.regmap   = &octopus_map,
@@ -279,7 +275,7 @@ static struct ddb_info ddb_octopus = {
 	.i2c_mask = 0x0f,
 };
 
-static struct ddb_info ddb_octopusv3 = {
+static const struct ddb_info ddb_octopusv3 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus V3 DVB adapter",
 	.regmap   = &octopus_map,
@@ -287,7 +283,7 @@ static struct ddb_info ddb_octopusv3 = {
 	.i2c_mask = 0x0f,
 };
 
-static struct ddb_info ddb_octopus_le = {
+static const struct ddb_info ddb_octopus_le = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus LE DVB adapter",
 	.regmap   = &octopus_map,
@@ -295,7 +291,7 @@ static struct ddb_info ddb_octopus_le = {
 	.i2c_mask = 0x03,
 };
 
-static struct ddb_info ddb_octopus_oem = {
+static const struct ddb_info ddb_octopus_oem = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus OEM",
 	.regmap   = &octopus_map,
@@ -307,7 +303,7 @@ static struct ddb_info ddb_octopus_oem = {
 	.temp_bus = 0,
 };
 
-static struct ddb_info ddb_octopus_mini = {
+static const struct ddb_info ddb_octopus_mini = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Octopus Mini",
 	.regmap   = &octopus_map,
@@ -315,7 +311,7 @@ static struct ddb_info ddb_octopus_mini = {
 	.i2c_mask = 0x0f,
 };
 
-static struct ddb_info ddb_v6 = {
+static const struct ddb_info ddb_v6 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine S2 V6 DVB adapter",
 	.regmap   = &octopus_map,
@@ -323,7 +319,7 @@ static struct ddb_info ddb_v6 = {
 	.i2c_mask = 0x07,
 };
 
-static struct ddb_info ddb_v6_5 = {
+static const struct ddb_info ddb_v6_5 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine S2 V6.5 DVB adapter",
 	.regmap   = &octopus_map,
@@ -331,7 +327,7 @@ static struct ddb_info ddb_v6_5 = {
 	.i2c_mask = 0x0f,
 };
 
-static struct ddb_info ddb_v7a = {
+static const struct ddb_info ddb_v7a = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine S2 V7 Advanced DVB adapter",
 	.regmap   = &octopus_map,
@@ -342,7 +338,7 @@ static struct ddb_info ddb_v7a = {
 	.ts_quirks = TS_QUIRK_REVERSED,
 };
 
-static struct ddb_info ddb_v7 = {
+static const struct ddb_info ddb_v7 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine S2 V7 DVB adapter",
 	.regmap   = &octopus_map,
@@ -353,7 +349,7 @@ static struct ddb_info ddb_v7 = {
 	.ts_quirks = TS_QUIRK_REVERSED,
 };
 
-static struct ddb_info ddb_ctv7 = {
+static const struct ddb_info ddb_ctv7 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices Cine CT V7 DVB adapter",
 	.regmap   = &octopus_map,
@@ -363,7 +359,7 @@ static struct ddb_info ddb_ctv7 = {
 	.board_control_2 = 4,
 };
 
-static struct ddb_info ddb_satixS2v3 = {
+static const struct ddb_info ddb_satixs2v3 = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Mystique SaTiX-S2 V3 DVB adapter",
 	.regmap   = &octopus_map,
@@ -371,7 +367,7 @@ static struct ddb_info ddb_satixS2v3 = {
 	.i2c_mask = 0x07,
 };
 
-static struct ddb_info ddb_ci = {
+static const struct ddb_info ddb_ci = {
 	.type     = DDB_OCTOPUS_CI,
 	.name     = "Digital Devices Octopus CI",
 	.regmap   = &octopus_map,
@@ -379,7 +375,7 @@ static struct ddb_info ddb_ci = {
 	.i2c_mask = 0x03,
 };
 
-static struct ddb_info ddb_cis = {
+static const struct ddb_info ddb_cis = {
 	.type     = DDB_OCTOPUS_CI,
 	.name     = "Digital Devices Octopus CI single",
 	.regmap   = &octopus_map,
@@ -387,7 +383,7 @@ static struct ddb_info ddb_cis = {
 	.i2c_mask = 0x03,
 };
 
-static struct ddb_info ddb_ci_s2_pro = {
+static const struct ddb_info ddb_ci_s2_pro = {
 	.type     = DDB_OCTOPUS_CI,
 	.name     = "Digital Devices Octopus CI S2 Pro",
 	.regmap   = &octopus_map,
@@ -397,7 +393,7 @@ static struct ddb_info ddb_ci_s2_pro = {
 	.board_control_2 = 4,
 };
 
-static struct ddb_info ddb_ci_s2_pro_a = {
+static const struct ddb_info ddb_ci_s2_pro_a = {
 	.type     = DDB_OCTOPUS_CI,
 	.name     = "Digital Devices Octopus CI S2 Pro Advanced",
 	.regmap   = &octopus_map,
@@ -407,7 +403,7 @@ static struct ddb_info ddb_ci_s2_pro_a = {
 	.board_control_2 = 4,
 };
 
-static struct ddb_info ddb_dvbct = {
+static const struct ddb_info ddb_dvbct = {
 	.type     = DDB_OCTOPUS,
 	.name     = "Digital Devices DVBCT V6.1 DVB adapter",
 	.regmap   = &octopus_map,
@@ -417,7 +413,7 @@ static struct ddb_info ddb_dvbct = {
 
 /****************************************************************************/
 
-static struct ddb_info ddb_mod = {
+static const struct ddb_info ddb_mod = {
 	.type     = DDB_MOD,
 	.name     = "Digital Devices DVB-C modulator",
 	.regmap   = &octopus_mod_map,
@@ -425,7 +421,15 @@ static struct ddb_info ddb_mod = {
 	.temp_num = 1,
 };
 
-static struct ddb_info ddb_mod_fsm_24 = {
+static const struct ddb_info ddb_mod_4 = {
+	.type     = DDB_MOD,
+	.name     = "Digital Devices DVB-C modulator",
+	.regmap   = &octopus_mod_map,
+	.port_num = 4,
+	.temp_num = 1,
+};
+
+static const struct ddb_info ddb_mod_fsm_24 = {
 	.type     = DDB_MOD,
 	.version  = 2,
 	.name     = "Digital Devices DVB-C modulator FSM-24",
@@ -435,7 +439,7 @@ static struct ddb_info ddb_mod_fsm_24 = {
 	.tempmon_irq = 8,
 };
 
-static struct ddb_info ddb_mod_fsm_16 = {
+static const struct ddb_info ddb_mod_fsm_16 = {
 	.type     = DDB_MOD,
 	.version  = 2,
 	.name     = "Digital Devices DVB-C modulator FSM-16",
@@ -445,7 +449,7 @@ static struct ddb_info ddb_mod_fsm_16 = {
 	.tempmon_irq = 8,
 };
 
-static struct ddb_info ddb_mod_fsm_8 = {
+static const struct ddb_info ddb_mod_fsm_8 = {
 	.type     = DDB_MOD,
 	.name     = "Digital Devices DVB-C modulator FSM-8",
 	.version  = 2,
@@ -455,7 +459,17 @@ static struct ddb_info ddb_mod_fsm_8 = {
 	.tempmon_irq = 8,
 };
 
-static struct ddb_info ddb_sdr = {
+static const struct ddb_info ddb_mod_fsm_4 = {
+	.type     = DDB_MOD,
+	.name     = "Digital Devices DVB-C modulator FSM-8",
+	.version  = 2,
+	.regmap   = &octopus_mod_2_map,
+	.port_num = 4,
+	.temp_num = 1,
+	.tempmon_irq = 8,
+};
+
+static const struct ddb_info ddb_sdr = {
 	.type     = DDB_MOD,
 	.name     = "Digital Devices SDR",
 	.version  = 3,
@@ -465,7 +479,7 @@ static struct ddb_info ddb_sdr = {
 	.tempmon_irq = 8,
 };
 
-static struct ddb_info ddb_octopro_hdin = {
+static const struct ddb_info ddb_octopro_hdin = {
 	.type     = DDB_OCTOPRO_HDIN,
 	.name     = "Digital Devices OctopusNet Pro HDIN",
 	.regmap   = &octopro_hdin_map,
@@ -474,7 +488,7 @@ static struct ddb_info ddb_octopro_hdin = {
 	.mdio_num = 1,
 };
 
-static struct ddb_info ddb_octopro = {
+static const struct ddb_info ddb_octopro = {
 	.type     = DDB_OCTOPRO,
 	.name     = "Digital Devices OctopusNet Pro",
 	.regmap   = &octopro_map,
@@ -483,8 +497,7 @@ static struct ddb_info ddb_octopro = {
 	.mdio_num = 1,
 };
 
-
+static const struct ddb_info ddb_s2_48 = {
-static struct ddb_info ddb_s2_48 = {
 	.type     = DDB_OCTOPUS_MAX,
 	.name     = "Digital Devices MAX S8 4/8",
 	.regmap   = &octopus_map,
@@ -494,7 +507,7 @@ static struct ddb_info ddb_s2_48 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_ct2_8 = {
+static const struct ddb_info ddb_ct2_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 CT2",
 	.regmap   = &octopus_map,
@@ -506,7 +519,7 @@ static struct ddb_info ddb_ct2_8 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_c2t2_8 = {
+static const struct ddb_info ddb_c2t2_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 C2T2",
 	.regmap   = &octopus_map,
@@ -518,7 +531,7 @@ static struct ddb_info ddb_c2t2_8 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_isdbt_8 = {
+static const struct ddb_info ddb_isdbt_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 ISDBT",
 	.regmap   = &octopus_map,
@@ -530,7 +543,7 @@ static struct ddb_info ddb_isdbt_8 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_c2t2i_v0_8 = {
+static const struct ddb_info ddb_c2t2i_v0_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 C2T2I V0",
 	.regmap   = &octopus_map,
@@ -542,7 +555,7 @@ static struct ddb_info ddb_c2t2i_v0_8 = {
 	.tempmon_irq = 24,
 };
 
-static struct ddb_info ddb_c2t2i_8 = {
+static const struct ddb_info ddb_c2t2i_8 = {
 	.type     = DDB_OCTOPUS_MAX_CT,
 	.name     = "Digital Devices MAX A8 C2T2I",
 	.regmap   = &octopus_map,
@@ -554,11 +567,10 @@ static struct ddb_info ddb_c2t2i_8 = {
 	.tempmon_irq = 24,
 };
 
-
 /****************************************************************************/
 /****************************************************************************/
 
-static struct ddb_regmap octopus_net_map = {
+static const struct ddb_regmap octopus_net_map = {
 	.irq_version = 1,
 	.irq_base_i2c = 0,
 	.i2c = &octopus_i2c,
@@ -567,14 +579,13 @@ static struct ddb_regmap octopus_net_map = {
 	.output = &octopus_output,
 };
 
-
+static const struct ddb_regset octopus_gtl = {
-static struct ddb_regset octopus_gtl = {
 	.base = 0x180,
 	.num  = 0x01,
 	.size = 0x20,
 };
 
-static struct ddb_regmap octopus_net_gtl = {
+static const struct ddb_regmap octopus_net_gtl = {
 	.irq_version = 1,
 	.irq_base_i2c = 0,
 	.irq_base_gtl = 10,
@@ -585,7 +596,7 @@ static struct ddb_regmap octopus_net_gtl = {
 	.gtl = &octopus_gtl,
 };
 
-static struct ddb_info ddb_octonet = {
+static const struct ddb_info ddb_octonet = {
 	.type     = DDB_OCTONET,
 	.name     = "Digital Devices OctopusNet network DVB adapter",
 	.regmap   = &octopus_net_map,
@@ -595,7 +606,7 @@ static struct ddb_info ddb_octonet = {
 	.mdio_num = 1,
 };
 
-static struct ddb_info ddb_octonet_jse = {
+static const struct ddb_info ddb_octonet_jse = {
 	.type     = DDB_OCTONET,
 	.name     = "Digital Devices OctopusNet network DVB adapter JSE",
 	.regmap   = &octopus_net_map,
@@ -605,7 +616,7 @@ static struct ddb_info ddb_octonet_jse = {
 	.mdio_num = 1,
 };
 
-static struct ddb_info ddb_octonet_gtl = {
+static const struct ddb_info ddb_octonet_gtl = {
 	.type     = DDB_OCTONET,
 	.name     = "Digital Devices OctopusNet GTL",
 	.regmap   = &octopus_net_gtl,
@@ -616,7 +627,6 @@ static struct ddb_info ddb_octonet_gtl = {
 	.con_clock = 1,
 };
 
-
 /****************************************************************************/
 /****************************************************************************/
 /****************************************************************************/
@@ -626,7 +636,7 @@ struct ddb_device_id {
 	u16 device;
 	u16 subvendor;
 	u16 subdevice;
-	struct ddb_info *info;
+	const struct ddb_info *info;
 };
 
 #define DDB_DEVID(_device, _subdevice, _info) { \
@@ -634,9 +644,9 @@ struct ddb_device_id {
 		.device = _device, \
 		.subvendor = 0xdd01, \
 		.subdevice = _subdevice, \
-		.info = &_info }
+		.info = &(_info) }
 
-static struct ddb_device_id ddb_device_ids[] = {
+static const struct ddb_device_id ddb_device_ids[] = {
 	/* OctopusNet */
 	DDB_DEVID(0x0300, 0xffff, ddb_octonet),
 	DDB_DEVID(0x0301, 0xffff, ddb_octonet_jse),
@@ -654,7 +664,7 @@ static struct ddb_device_id ddb_device_ids[] = {
 	DDB_DEVID(0x0006, 0x0022, ddb_v7),
 	DDB_DEVID(0x0006, 0x0024, ddb_v7a),
 	DDB_DEVID(0x0003, 0x0030, ddb_dvbct),
-	DDB_DEVID(0x0003, 0xdb03, ddb_satixS2v3),
+	DDB_DEVID(0x0003, 0xdb03, ddb_satixs2v3),
 	DDB_DEVID(0x0006, 0x0031, ddb_ctv7),
 	DDB_DEVID(0x0006, 0x0032, ddb_ctv7),
 	DDB_DEVID(0x0006, 0x0033, ddb_ctv7),
@@ -672,7 +682,9 @@ static struct ddb_device_id ddb_device_ids[] = {
 	DDB_DEVID(0x0013, 0x0044, ddb_ci_s2_pro_a),
 	DDB_DEVID(0x0201, 0x0001, ddb_mod),
 	DDB_DEVID(0x0201, 0x0002, ddb_mod),
+	DDB_DEVID(0x0201, 0x0004, ddb_mod_4),  /* dummy entry ! */
 	DDB_DEVID(0x0203, 0x0001, ddb_mod),
+	DDB_DEVID(0x0210, 0x0000, ddb_mod_fsm_4), /* dummy entry ! */
 	DDB_DEVID(0x0210, 0x0001, ddb_mod_fsm_24),
 	DDB_DEVID(0x0210, 0x0002, ddb_mod_fsm_16),
 	DDB_DEVID(0x0210, 0x0003, ddb_mod_fsm_8),
@@ -686,17 +698,18 @@ static struct ddb_device_id ddb_device_ids[] = {
 	DDB_DEVID(0x0329, 0xffff, ddb_octopro_hdin),
 };
 
-struct ddb_info *get_ddb_info(u16 vendor, u16 device, u16 subvendor, u16 subdevice)
+const struct ddb_info *get_ddb_info(u16 vendor, u16 device,
+				    u16 subvendor, u16 subdevice)
 {
 	int i;
 	
 	for (i = 0; i < ARRAY_SIZE(ddb_device_ids); i++) {
-		struct ddb_device_id *id  = &ddb_device_ids[i];
+		const struct ddb_device_id *id = &ddb_device_ids[i];
 		
 		if (vendor == id->vendor &&
 		    device == id->device &&
 		    subvendor == id->subvendor &&
-		    ((subdevice == id->subdevice) ||
+		    (subdevice == id->subdevice ||
 		     id->subdevice == 0xffff))
 			return id->info;
 	}

ddbridge/ddbridge-i2c.c

@@ -17,10 +17,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 #include "ddbridge.h"
@@ -36,7 +34,7 @@ static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
 	stat = wait_for_completion_timeout(&i2c->completion, HZ);
 	val = ddbreadl(dev, i2c->regs + I2C_COMMAND);
 	if (stat == 0) {
-		pr_err("DDBridge: I2C timeout, card %d, port %d, link %u\n",
+		dev_err(dev->dev, "I2C timeout, card %d, port %d, link %u\n",
 			dev->nr, i2c->nr, i2c->link);
 #if 1
 		{
@@ -147,7 +145,8 @@ static void i2c_handler(unsigned long priv)
 }
 
 static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
-		       struct ddb_regmap *regmap, int link, int i, int num)
+		       const struct ddb_regmap *regmap,
+		       int link, int i, int num)
 {
 	struct i2c_adapter *adap;
 
@@ -187,7 +186,7 @@ int ddb_i2c_init(struct ddb *dev)
 	u32 i, j, num = 0, l, base;
 	struct ddb_i2c *i2c;
 	struct i2c_adapter *adap;
-	struct ddb_regmap *regmap;
+	const struct ddb_regmap *regmap;
 
 	for (l = 0; l < DDB_MAX_LINK; l++) {
 		if (!dev->link[l].info)
@@ -214,8 +213,9 @@ int ddb_i2c_init(struct ddb *dev)
 			adap = &i2c->adap;
 			i2c_del_adapter(adap);
 		}
-	} else
+	} else {
 		dev->i2c_num = num;
+	}
 	return stat;
 }
 

ddbridge/ddbridge-i2c.h

@@ -17,10 +17,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 #ifndef _DDBRIDGE_I2C_H_

ddbridge/ddbridge-io.c

@@ -17,10 +17,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 #include "ddbridge.h"
@@ -178,6 +176,3 @@ void ddbcpyfrom(struct ddb *dev, void *dst, u32 adr, long count)
 		return gtlcpyfrom(dev, dst, adr, count);
 	return memcpy_fromio(dst, (char *)(dev->regs + adr), count);
 }
-
-
-

ddbridge/ddbridge-io.h

@@ -17,10 +17,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 #ifndef _DDBRIDGE_IO_H_
@@ -84,6 +82,6 @@ static inline void gtlw(struct ddb_link *link)
 #endif
 
 #define ddbmemset(_dev, _adr, _val, _count) \
-	memset_io((char *) (_dev->regs + (_adr)), (_val), (_count))
+	memset_io((char *)((_dev)->regs + (_adr)), (_val), (_count))
 
 #endif

ddbridge/ddbridge-main.c

@@ -18,10 +18,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 #include "ddbridge.h"
 #include "ddbridge-io.h"
@@ -88,7 +86,7 @@ static void __devexit ddb_remove(struct pci_dev *pdev)
 	pci_disable_device(pdev);
 }
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+#if (KERNEL_VERSION(3, 8, 0) <= LINUX_VERSION_CODE)
 #define __devinit
 #define __devinitdata
 #endif
@@ -99,30 +97,30 @@ static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
 
 #ifdef CONFIG_PCI_MSI
 	if (msi && pci_msi_enabled()) {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0))
+#if (KERNEL_VERSION(3, 15, 0) <= LINUX_VERSION_CODE)
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
+#if (KERNEL_VERSION(4, 11, 0) <= LINUX_VERSION_CODE)
 		stat = pci_alloc_irq_vectors(dev->pdev, 1, nr, PCI_IRQ_MSI);
 #else
 		stat = pci_enable_msi_range(dev->pdev, 1, nr);
 #endif
 		if (stat >= 1) {
 			dev->msi = stat;
-			pr_info("DDBridge: using %d MSI interrupt(s)\n",
+			dev_info(dev->dev, "using %d MSI interrupt(s)\n",
 				 dev->msi);
-		} else
+		} else {
-			pr_info("DDBridge: MSI not available.\n");
+			dev_info(dev->dev, "MSI not available.\n");
-
+		}
 #else
 		stat = pci_enable_msi_block(dev->pdev, nr);
 		if (stat == 0) {
 			dev->msi = nr;
-			pr_info("DDBridge: using %d MSI interrupts\n", nr);
+			dev_info(dev->dev, "using %d MSI interrupts\n", nr);
 		} else if (stat == 1) {
 			stat = pci_enable_msi(dev->pdev);
 			dev->msi = 1;
 		}
 		if (stat < 0)
-			pr_info("DDBridge: MSI not available.\n");
+			dev_info(dev->dev, "MSI not available.\n");
 #endif
 	}
 #endif
@@ -134,7 +132,7 @@ static int __devinit ddb_irq_init2(struct ddb *dev)
 	int stat;
 	int irq_flag = IRQF_SHARED;
 
-	pr_info("DDBridge: init type 2 IRQ hardware block\n");
+	dev_info(dev->dev, "init type 2 IRQ hardware block\n");
 
 	ddbwritel(dev, 0x00000000, INTERRUPT_V2_CONTROL);
 	ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_1);
@@ -149,7 +147,7 @@ static int __devinit ddb_irq_init2(struct ddb *dev)
 	if (dev->msi)
 		irq_flag = 0;
 
-	stat = request_irq(dev->pdev->irq, irq_handler_v2,
+	stat = request_irq(dev->pdev->irq, ddb_irq_handler_v2,
 			   irq_flag, "ddbridge", (void *)dev);
 	if (stat < 0)
 		return stat;
@@ -187,11 +185,11 @@ static int __devinit ddb_irq_init(struct ddb *dev)
 	if (dev->msi)
 		irq_flag = 0;
 	if (dev->msi == 2) {
-		stat = request_irq(dev->pdev->irq, irq_handler0,
+		stat = request_irq(dev->pdev->irq, ddb_irq_handler0,
 				   irq_flag, "ddbridge", (void *)dev);
 		if (stat < 0)
 			return stat;
-		stat = request_irq(dev->pdev->irq + 1, irq_handler1,
+		stat = request_irq(dev->pdev->irq + 1, ddb_irq_handler1,
 				   irq_flag, "ddbridge", (void *)dev);
 		if (stat < 0) {
 			free_irq(dev->pdev->irq, dev);
@@ -199,12 +197,12 @@ static int __devinit ddb_irq_init(struct ddb *dev)
 		}
 	} else {
 #ifdef DDB_TEST_THREADED
-		stat = request_threaded_irq(dev->pdev->irq, irq_handler,
+		stat = request_threaded_irq(dev->pdev->irq, ddb_irq_handler,
 					    irq_thread,
 					    irq_flag,
 					    "ddbridge", (void *)dev);
 #else
-		stat = request_irq(dev->pdev->irq, irq_handler,
+		stat = request_irq(dev->pdev->irq, ddb_irq_handler,
 				   irq_flag, "ddbridge", (void *)dev);
 #endif
 		if (stat < 0)
@@ -236,8 +234,8 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 		if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
 			return -ENODEV;
 
-	dev = vzalloc(sizeof(struct ddb));
+	dev = vzalloc(sizeof(*dev));
-	if (dev == NULL)
+	if (!dev)
 		return -ENOMEM;
 
 	mutex_init(&dev->mutex);
@@ -254,19 +252,19 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	dev->link[0].dev = dev;
 	dev->link[0].info = get_ddb_info(id->vendor, id->device,
 					 id->subvendor, pdev->subsystem_device);
-	pr_info("DDBridge: device name: %s\n", dev->link[0].info->name);
+	dev_info(dev->dev, "device name: %s\n", dev->link[0].info->name);
 
 	dev->regs_len = pci_resource_len(dev->pdev, 0);
 	dev->regs = ioremap(pci_resource_start(dev->pdev, 0),
 			    pci_resource_len(dev->pdev, 0));
 
 	if (!dev->regs) {
-		pr_err("DDBridge: not enough memory for register map\n");
+		dev_err(dev->dev, "not enough memory for register map\n");
 		stat = -ENOMEM;
 		goto fail;
 	}
 	if (ddbreadl(dev, 0) == 0xffffffff) {
-		pr_err("DDBridge: cannot read registers\n");
+		dev_err(dev->dev, "cannot read registers\n");
 		stat = -ENODEV;
 		goto fail;
 	}
@@ -274,7 +272,7 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	dev->link[0].ids.hwid = ddbreadl(dev, 0);
 	dev->link[0].ids.regmapid = ddbreadl(dev, 4);
 
-	pr_info("DDBridge: HW %08x REGMAP %08x\n",
+	dev_info(dev->dev, "HW %08x REGMAP %08x\n",
 		 dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
 
 	if (dev->link[0].info->ns_num) {
@@ -285,12 +283,33 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 	if (dev->link[0].info->type != DDB_MOD)
 		ddbwritel(dev, 0, DMA_BASE_WRITE);
 
-	if (dev->link[0].info->type == DDB_MOD) {
+	if (dev->link[0].info->type == DDB_MOD
-		if (dev->link[0].info->version <= 1)
+	    && dev->link[0].info->version <= 1) {
 		if (ddbreadl(dev, 0x1c) == 4)
-				dev->link[0].info->port_num = 4;
+			dev->link[0].info =
+				get_ddb_info(0xdd01, 0x0201, 0xdd01, 0x0004);
 	}
+	if (dev->link[0].info->type == DDB_MOD
+	    && dev->link[0].info->version == 2) {
+		u32 lic = ddbreadl(dev, 0x1c) & 7;
 		
+		switch (lic) {
+		case 0: 
+			dev->link[0].info =
+				get_ddb_info(0xdd01, 0x0210, 0xdd01, 0x0000);
+			break;
+		case 1: 
+			dev->link[0].info =
+				get_ddb_info(0xdd01, 0x0210, 0xdd01, 0x0003);
+			break;
+		case 3: 
+			dev->link[0].info =
+				get_ddb_info(0xdd01, 0x0210, 0xdd01, 0x0002);
+			break;
+		default:
+			break;
+		}
+	}
 	stat = ddb_irq_init(dev);
 	if (stat < 0)
 		goto fail0;
@@ -300,11 +319,11 @@ static int __devinit ddb_probe(struct pci_dev *pdev,
 
 	ddb_irq_exit(dev);
 fail0:
-	pr_err("DDBridge: fail0\n");
+	dev_err(dev->dev, "fail0\n");
 	if (dev->msi)
 		pci_disable_msi(dev->pdev);
 fail:
-	pr_err("DDBridge: fail\n");
+	dev_err(dev->dev, "fail\n");
 
 	ddb_unmap(dev);
 	pci_set_drvdata(pdev, NULL);
@@ -316,7 +335,8 @@ fail:
 /****************************************************************************/
 /****************************************************************************/
 
-#define DDB_DEVICE_ANY(_device) { PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, PCI_ANY_ID) }
+#define DDB_DEVICE_ANY(_device) \
+	{ PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, PCI_ANY_ID) }
 
 static const struct pci_device_id ddb_id_table[] __devinitconst = {
 	DDB_DEVICE_ANY(0x0002),
@@ -353,13 +373,13 @@ static __init int module_init_ddbridge(void)
 {
 	int stat = -1;
 
-	pr_info("DDBridge: Digital Devices PCIE bridge driver "
+	pr_info("Digital Devices PCIE bridge driver "
 		DDBRIDGE_VERSION
 		", Copyright (C) 2010-17 Digital Devices GmbH\n");
 	if (ddb_class_create() < 0)
 		return -1;
 	ddb_wq = create_workqueue("ddbridge");
-	if (ddb_wq == NULL)
+	if (!ddb_wq)
 		goto exit1;
 	stat = pci_register_driver(&ddb_pci_driver);
 	if (stat < 0)

ddbridge/ddbridge-max.c

@@ -0,0 +1,444 @@
+/*
+ * ddbridge-max.c: Digital Devices MAX card line support functions
+ *
+ * Copyright (C) 2010-2017 Digital Devices GmbH
+ *                         Ralph Metzler <rjkm@metzlerbros.de>
+ *                         Marcus Metzler <mocm@metzlerbros.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 only, as published by the Free Software Foundation.
+ *
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, point your browser to
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "ddbridge.h"
+#include "ddbridge-io.h"
+#include "ddbridge-i2c.h"
+
+/* MAX LNB interface related module parameters */
+
+static int fmode;
+module_param(fmode, int, 0444);
+MODULE_PARM_DESC(fmode, "frontend emulation mode");
+
+static int fmode_sat = -1;
+module_param(fmode_sat, int, 0444);
+MODULE_PARM_DESC(fmode_sat, "set frontend emulation mode sat");
+
+static int old_quattro;
+module_param(old_quattro, int, 0444);
+MODULE_PARM_DESC(old_quattro, "old quattro LNB input order ");
+
+/* MAX LNB interface related functions */
+
+static int lnb_command(struct ddb *dev, u32 link, u32 lnb, u32 cmd)
+{
+	u32 c, v = 0, tag = DDB_LINK_TAG(link);
+
+	v = LNB_TONE & (dev->link[link].lnb.tone << (15 - lnb));
+	ddbwritel(dev, cmd | v, tag | LNB_CONTROL(lnb));
+	for (c = 0; c < 10; c++) {
+		v = ddbreadl(dev, tag | LNB_CONTROL(lnb));
+		if ((v & LNB_BUSY) == 0)
+			break;
+		msleep(20);
+	}
+	if (c == 10)
+		dev_info(dev->dev,
+			 "%s lnb = %08x  cmd = %08x\n",
+			 __func__, lnb, cmd);
+	return 0;
+}
+
+static int max_send_master_cmd(struct dvb_frontend *fe,
+			       struct dvb_diseqc_master_cmd *cmd)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = port->dev;
+	struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
+	u32 tag = DDB_LINK_TAG(port->lnr);
+	int i;
+	u32 fmode = dev->link[port->lnr].lnb.fmode;
+
+	if (fmode == 2 || fmode == 1)
+		return 0;
+	if (dvb->diseqc_send_master_cmd)
+		dvb->diseqc_send_master_cmd(fe, cmd);
+
+	mutex_lock(&dev->link[port->lnr].lnb.lock);
+	ddbwritel(dev, 0, tag | LNB_BUF_LEVEL(dvb->input));
+	for (i = 0; i < cmd->msg_len; i++)
+		ddbwritel(dev, cmd->msg[i], tag | LNB_BUF_WRITE(dvb->input));
+	lnb_command(dev, port->lnr, dvb->input, LNB_CMD_DISEQC);
+	mutex_unlock(&dev->link[port->lnr].lnb.lock);
+	return 0;
+}
+
+static int lnb_send_diseqc(struct ddb *dev, u32 link, u32 input,
+			   struct dvb_diseqc_master_cmd *cmd)
+{
+	u32 tag = DDB_LINK_TAG(link);
+	int i;
+
+	ddbwritel(dev, 0, tag | LNB_BUF_LEVEL(input));
+	for (i = 0; i < cmd->msg_len; i++)
+		ddbwritel(dev, cmd->msg[i], tag | LNB_BUF_WRITE(input));
+	lnb_command(dev, link, input, LNB_CMD_DISEQC);
+	return 0;
+}
+
+static int lnb_set_sat(struct ddb *dev, u32 link,
+		       u32 input, u32 sat, u32 band, u32 hor)
+{
+	struct dvb_diseqc_master_cmd cmd = {
+		.msg = {0xe0, 0x10, 0x38, 0xf0, 0x00, 0x00},
+		.msg_len = 4
+	};
+	cmd.msg[3] = 0xf0 | (((sat << 2) & 0x0c) |
+			     (band ? 1 : 0) | (hor ? 2 : 0));
+	return lnb_send_diseqc(dev, link, input, &cmd);
+}
+
+static int lnb_set_tone(struct ddb *dev, u32 link, u32 input,
+			enum fe_sec_tone_mode tone)
+{
+	int s = 0;
+	u32 mask = (1ULL << input);
+
+	switch (tone) {
+	case SEC_TONE_OFF:
+		if (!(dev->link[link].lnb.tone & mask))
+			return 0;
+		dev->link[link].lnb.tone &= ~(1ULL << input);
+		break;
+	case SEC_TONE_ON:
+		if (dev->link[link].lnb.tone & mask)
+			return 0;
+		dev->link[link].lnb.tone |= (1ULL << input);
+		break;
+	default:
+		s = -EINVAL;
+		break;
+	}
+	if (!s)
+		s = lnb_command(dev, link, input, LNB_CMD_NOP);
+	return s;
+}
+
+static int lnb_set_voltage(struct ddb *dev, u32 link, u32 input,
+			   enum fe_sec_voltage voltage)
+{
+	int s = 0;
+
+	if (dev->link[link].lnb.oldvoltage[input] == voltage)
+		return 0;
+	switch (voltage) {
+	case SEC_VOLTAGE_OFF:
+		if (dev->link[link].lnb.voltage[input])
+			return 0;
+		lnb_command(dev, link, input, LNB_CMD_OFF);
+		break;
+	case SEC_VOLTAGE_13:
+		lnb_command(dev, link, input, LNB_CMD_LOW);
+		break;
+	case SEC_VOLTAGE_18:
+		lnb_command(dev, link, input, LNB_CMD_HIGH);
+		break;
+	default:
+		s = -EINVAL;
+		break;
+	}
+	dev->link[link].lnb.oldvoltage[input] = voltage;
+	return s;
+}
+
+static int max_set_input_unlocked(struct dvb_frontend *fe, int in)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = port->dev;
+	struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
+	int res = 0;
+
+	if (in > 3)
+		return -EINVAL;
+	if (dvb->input != in) {
+		u32 bit = (1ULL << input->nr);
+		u32 obit = dev->link[port->lnr].lnb.voltage[dvb->input] & bit;
+
+		dev->link[port->lnr].lnb.voltage[dvb->input] &= ~bit;
+		dvb->input = in;
+		dev->link[port->lnr].lnb.voltage[dvb->input] |= obit;
+	}
+	res = dvb->set_input(fe, in);
+	return res;
+}
+
+static int max_set_input(struct dvb_frontend *fe, int in)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = input->port->dev;
+	int res;
+
+	mutex_lock(&dev->link[port->lnr].lnb.lock);
+	res = max_set_input_unlocked(fe, in);
+	mutex_unlock(&dev->link[port->lnr].lnb.lock);
+	return res;
+}
+
+static int max_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = port->dev;
+	struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
+	int tuner = 0;
+	int res = 0;
+	u32 fmode = dev->link[port->lnr].lnb.fmode;
+
+	mutex_lock(&dev->link[port->lnr].lnb.lock);
+	dvb->tone = tone;
+	switch (fmode) {
+	default:
+	case 0:
+	case 3:
+		res = lnb_set_tone(dev, port->lnr, dvb->input, tone);
+		break;
+	case 1:
+	case 2:
+		if (old_quattro) {
+			if (dvb->tone == SEC_TONE_ON)
+				tuner |= 2;
+			if (dvb->voltage == SEC_VOLTAGE_18)
+				tuner |= 1;
+		} else {
+			if (dvb->tone == SEC_TONE_ON)
+				tuner |= 1;
+			if (dvb->voltage == SEC_VOLTAGE_18)
+				tuner |= 2;
+		}
+		res = max_set_input_unlocked(fe, tuner);
+		break;
+	}
+	mutex_unlock(&dev->link[port->lnr].lnb.lock);
+	return res;
+}
+
+static int max_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
+{
+	struct ddb_input *input = fe->sec_priv;
+	struct ddb_port *port = input->port;
+	struct ddb *dev = port->dev;
+	struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
+	int tuner = 0;
+	u32 nv, ov = dev->link[port->lnr].lnb.voltages;
+	int res = 0;
+	u32 fmode = dev->link[port->lnr].lnb.fmode;
+
+	mutex_lock(&dev->link[port->lnr].lnb.lock);
+	dvb->voltage = voltage;
+
+	switch (fmode) {
+	case 3:
+	default:
+	case 0:
+		if (fmode == 3)
+			max_set_input_unlocked(fe, 0);
+		if (voltage == SEC_VOLTAGE_OFF)
+			dev->link[port->lnr].lnb.voltage[dvb->input] &=
+				~(1ULL << input->nr);
+		else
+			dev->link[port->lnr].lnb.voltage[dvb->input] |=
+				(1ULL << input->nr);
+
+		res = lnb_set_voltage(dev, port->lnr, dvb->input, voltage);
+		break;
+	case 1:
+	case 2:
+		if (voltage == SEC_VOLTAGE_OFF)
+			dev->link[port->lnr].lnb.voltages &=
+				~(1ULL << input->nr);
+		else
+			dev->link[port->lnr].lnb.voltages |=
+				(1ULL << input->nr);
+		nv = dev->link[port->lnr].lnb.voltages;
+
+		if (old_quattro) {
+			if (dvb->tone == SEC_TONE_ON)
+				tuner |= 2;
+			if (dvb->voltage == SEC_VOLTAGE_18)
+				tuner |= 1;
+		} else {
+			if (dvb->tone == SEC_TONE_ON)
+				tuner |= 1;
+			if (dvb->voltage == SEC_VOLTAGE_18)
+				tuner |= 2;
+		}
+		res = max_set_input_unlocked(fe, tuner);
+
+		if (nv != ov) {
+			if (nv) {
+				lnb_set_voltage(dev, port->lnr, 0,
+						SEC_VOLTAGE_13);
+				if (fmode == 1) {
+					lnb_set_voltage(dev, port->lnr, 0,
+							SEC_VOLTAGE_13);
+					if (old_quattro) {
+						lnb_set_voltage(dev,
+								port->lnr, 1,
+								SEC_VOLTAGE_18);
+						lnb_set_voltage(dev, port->lnr,
+								2,
+								SEC_VOLTAGE_13);
+					} else {
+						lnb_set_voltage(dev, port->lnr,
+								1,
+								SEC_VOLTAGE_13);
+						lnb_set_voltage(dev, port->lnr,
+								2,
+								SEC_VOLTAGE_18);
+					}
+					lnb_set_voltage(dev, port->lnr, 3,
+							SEC_VOLTAGE_18);
+				}
+			} else {
+				lnb_set_voltage(dev, port->lnr,
+						0, SEC_VOLTAGE_OFF);
+				if (fmode == 1) {
+					lnb_set_voltage(dev, port->lnr, 1,
+							SEC_VOLTAGE_OFF);
+					lnb_set_voltage(dev, port->lnr, 2,
+							SEC_VOLTAGE_OFF);
+					lnb_set_voltage(dev, port->lnr, 3,
+							SEC_VOLTAGE_OFF);
+				}
+			}
+		}
+		break;
+	}
+	mutex_unlock(&dev->link[port->lnr].lnb.lock);
+	return res;
+}
+
+static int max_enable_high_lnb_voltage(struct dvb_frontend *fe, long arg)
+{
+	return 0;
+}
+
+static int max_send_burst(struct dvb_frontend *fe, enum fe_sec_mini_cmd burst)
+{
+	return 0;
+}
+
+static int mxl_fw_read(void *priv, u8 *buf, u32 len)
+{
+	struct ddb_link *link = priv;
+	struct ddb *dev = link->dev;
+
+	dev_info(dev->dev,
+		 "Read mxl_fw from link %u\n", link->nr);
+
+	return ddbridge_flashread(dev, link->nr, buf, 0xc0000, len);
+}
+
+int ddb_lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm)
+{
+	u32 l = link->nr;
+
+	if (link->lnb.fmode == fm)
+		return 0;
+	dev_info(dev->dev, "Set fmode link %u = %u\n", l, fm);
+	mutex_lock(&link->lnb.lock);
+	if (fm == 2 || fm == 1) {
+		if (fmode_sat >= 0) {
+			lnb_set_sat(dev, l, 0, fmode_sat, 0, 0);
+			if (old_quattro) {
+				lnb_set_sat(dev, l, 1, fmode_sat, 0, 1);
+				lnb_set_sat(dev, l, 2, fmode_sat, 1, 0);
+			} else {
+				lnb_set_sat(dev, l, 1, fmode_sat, 1, 0);
+				lnb_set_sat(dev, l, 2, fmode_sat, 0, 1);
+			}
+			lnb_set_sat(dev, l, 3, fmode_sat, 1, 1);
+		}
+		lnb_set_tone(dev, l, 0, SEC_TONE_OFF);
+		if (old_quattro) {
+			lnb_set_tone(dev, l, 1, SEC_TONE_OFF);
+			lnb_set_tone(dev, l, 2, SEC_TONE_ON);
+		} else {
+			lnb_set_tone(dev, l, 1, SEC_TONE_ON);
+			lnb_set_tone(dev, l, 2, SEC_TONE_OFF);
+		}
+		lnb_set_tone(dev, l, 3, SEC_TONE_ON);
+	}
+	link->lnb.fmode = fm;
+	mutex_unlock(&link->lnb.lock);
+	return 0;
+}
+
+/* MAXS8 related functions */
+
+static struct mxl5xx_cfg mxl5xx = {
+	.adr      = 0x60,
+	.type     = 0x01,
+	.clk      = 27000000,
+	.ts_clk   = 139,
+	.cap      = 12,
+	.fw_read  = mxl_fw_read,
+};
+
+int ddb_fe_attach_mxl5xx(struct ddb_input *input)
+{
+	struct ddb *dev = input->port->dev;
+	struct i2c_adapter *i2c = &input->port->i2c->adap;
+	struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
+	struct ddb_port *port = input->port;
+	struct ddb_link *link = &dev->link[port->lnr];
+	struct mxl5xx_cfg cfg;
+	int demod, tuner;
+
+	cfg = mxl5xx;
+	cfg.fw_priv = link;
+	if (dev->link[0].info->type == DDB_OCTONET)
+		;/*cfg.ts_clk = 69;*/
+
+	demod = input->nr;
+	tuner = demod & 3;
+	if (fmode == 3)
+		tuner = 0;
+	dvb->fe = dvb_attach(mxl5xx_attach, i2c, &cfg, demod, tuner);
+	if (!dvb->fe) {
+		dev_err(dev->dev, "No MXL5XX found!\n");
+		return -ENODEV;
+	}
+	if (input->nr < 4) {
+		lnb_command(dev, port->lnr, input->nr, LNB_CMD_INIT);
+		lnb_set_voltage(dev, port->lnr, input->nr, SEC_VOLTAGE_OFF);
+	}
+	ddb_lnb_init_fmode(dev, link, fmode);
+
+	dvb->fe->ops.set_voltage = max_set_voltage;
+	dvb->fe->ops.enable_high_lnb_voltage = max_enable_high_lnb_voltage;
+	dvb->fe->ops.set_tone = max_set_tone;
+	dvb->diseqc_send_master_cmd = dvb->fe->ops.diseqc_send_master_cmd;
+	dvb->fe->ops.diseqc_send_master_cmd = max_send_master_cmd;
+	dvb->fe->ops.diseqc_send_burst = max_send_burst;
+	dvb->fe->sec_priv = input;
+	dvb->set_input = dvb->fe->ops.set_input;
+	dvb->fe->ops.set_input = max_set_input;
+	dvb->input = tuner;
+	return 0;
+}
+

ddbridge/ddbridge-modulator.c

@@ -6,7 +6,7 @@
  *                         Ralph Metzler <rjkm@metzlerbros.de>
  *
  * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
+ * modify dit under the terms of the GNU General Public License
  * version 2 only, as published by the Free Software Foundation.
  *
  *
@@ -17,10 +17,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 #include "ddbridge.h"
@@ -188,7 +186,7 @@ void ddbridge_mod_output_stop(struct ddb_output *output)
 	ddbwritel(dev, 0, CHANNEL_CONTROL(output->nr));
 #endif
 	mod_busy(dev, output->nr);
-	pr_info("DDBridge: mod_output_stop %d.%d\n", dev->nr, output->nr);
+	dev_info(dev->dev, "mod_output_stop %d.%d\n", dev->nr, output->nr);
 }
 
 static void mod_set_incs(struct ddb_output *output)
@@ -223,8 +221,10 @@ static void mod_calc_rateinc(struct ddb_mod *mod)
 {
 	u32 ri;
 
-	pr_info("DDBridge: ibitrate %llu\n", mod->ibitrate);
+	dev_info(mod->port->dev->dev,
-	pr_info("DDBridge: obitrate %llu\n", mod->obitrate);
+		 "ibitrate %llu\n", mod->ibitrate);
+	dev_info(mod->port->dev->dev,
+		 "obitrate %llu\n", mod->obitrate);
 
 	if (mod->ibitrate != 0) {
 		u64 d = mod->obitrate - mod->ibitrate;
@@ -237,7 +237,8 @@ static void mod_calc_rateinc(struct ddb_mod *mod)
 	} else
 		ri = 0;
 	mod->rate_inc = ri;
-	pr_info("DDBridge: ibr=%llu, obr=%llu, ri=0x%06x\n",
+	dev_info(mod->port->dev->dev,
+		 "ibr=%llu, obr=%llu, ri=0x%06x\n",
 		 mod->ibitrate >> 32, mod->obitrate >> 32, ri);
 }
 
@@ -369,7 +370,7 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 		if (checkLF <= 1)
 			return -EINVAL;
 
-		pr_info("DDBridge: KF=%u LF=%u Output=%u mod=%u\n",
+		dev_info(dev->dev, "KF=%u LF=%u Output=%u mod=%u\n",
 			 KF, LF, Output, mod->modulation);
 		ddbwritel(dev, KF, CHANNEL_KF(Channel));
 		ddbwritel(dev, LF, CHANNEL_LF(Channel));
@@ -400,7 +401,7 @@ int ddbridge_mod_output_start(struct ddb_output *output)
 		if (mod_SendChannelCommand(dev, Channel,
 					   CHANNEL_CONTROL_CMD_UNMUTE))
 			return -EINVAL;
-	pr_info("DDBridge: mod_output_start %d.%d ctrl=%08x\n",
+	dev_info(dev->dev, "mod_output_start %d.%d ctrl=%08x\n",
 		 dev->nr, output->nr, mod->Control);
 	return 0;
 }
@@ -467,8 +468,7 @@ static int mod_setup_max2871(struct ddb *dev, u32 *reg)
 	return status;
 }
 
-static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan,
+static int mod_fsm_setup(struct ddb *dev, u32 MaxUsedChannels)
-			 u32 MaxUsedChannels)
 {
 	int status = 0;
 	u32 Capacity;
@@ -500,7 +500,6 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan,
 	if (MaxUsedChannels == 0)
 		MaxUsedChannels = (Capacity & FSM_CAPACITY_CUR) >> 16;
 
-	pr_info("DDBridge: max used chan = %u\n", MaxUsedChannels);
 	if (MaxUsedChannels <= 1)
 		ddbwritel(dev, FSM_GAIN_N1, FSM_GAIN);
 	else if (MaxUsedChannels <= 2)
@@ -517,8 +516,6 @@ static int mod_fsm_setup(struct ddb *dev, u32 FrequencyPlan,
 		ddbwritel(dev, FSM_GAIN_N96, FSM_GAIN);
 
 	ddbwritel(dev, FSM_CONTROL_ENABLE, FSM_CONTROL);
-	dev->link[0].info->port_num = MaxUsedChannels;
-
 	return status;
 }
 
@@ -680,7 +677,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 		mod_si598_readreg(dev, 11, &Data[4]);
 		mod_si598_readreg(dev, 12, &Data[5]);
 
-		pr_info("DDBridge:  Data = %02x %02x %02x %02x %02x %02x\n",
+		dev_info(dev->dev, "Data = %02x %02x %02x %02x %02x %02x\n",
 			 Data[0], Data[1], Data[2], Data[3], Data[4], Data[5]);
 		RFreq = (((u64)Data[1] & 0x3F) << 32) | ((u64)Data[2] << 24) |
 			((u64)Data[3] << 16) | ((u64)Data[4] << 8) |
@@ -694,13 +691,13 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 		     ((u32)(Data[1] & 0xE0) >> 6)) + 1;
 		fDCO = fOut * (u64)(HSDiv * N);
 		m_fXtal = fDCO << 28;
-		pr_info("DDBridge: fxtal %016llx  rfreq %016llx\n",
+		dev_info(dev->dev, "fxtal %016llx  rfreq %016llx\n",
 			 m_fXtal, RFreq);
 
 		m_fXtal += RFreq >> 1;
 		m_fXtal = div64_u64(m_fXtal, RFreq);
 
-		pr_info("DDBridge: fOut = %d fXtal = %d fDCO = %d HDIV = %2d, N = %3d\n",
+		dev_info(dev->dev, "fOut = %d fXtal = %d fDCO = %d HDIV = %2d, N = %3d\n",
 			 (u32) fOut, (u32) m_fXtal, (u32) fDCO, (u32) HSDiv, N);
 	}
 
@@ -711,7 +708,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 
 	if (Div < MinDiv)
 		Div = Div + 1;
-	pr_info("DDBridge:  fOut = %u MinDiv = %llu MaxDiv = %llu StartDiv = %llu\n",
+	dev_info(dev->dev, "fOut = %u MinDiv = %llu MaxDiv = %llu StartDiv = %llu\n",
 		 fOut, MinDiv, MaxDiv, Div);
 
 	if (Div <= 11) {
@@ -730,7 +727,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 				if (N > 128)
 					break;
 			}
-			pr_info("DDBridge:  %3d: %llu %llu %llu %u\n",
+			dev_info(dev->dev, "%3d: %llu %llu %llu %u\n",
 				 retry, Div, HSDiv * N, HSDiv, N);
 			if (HSDiv * N < MinDiv)
 				Div = Div + 2;
@@ -741,7 +738,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 			retry = retry - 1;
 		}
 		if (retry == 0) {
-			pr_err("DDBridge:  FAIL\n");
+			dev_err(dev->dev, "FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -756,16 +753,16 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 
 
 	fDCO = (u64)fOut * (u64)N * (u64)HSDiv;
-	pr_info("DDBridge: fdco %16llx\n", fDCO);
+	dev_info(dev->dev, "fdco %16llx\n", fDCO);
 	RFreq = fDCO<<28;
-	pr_info("DDBridge: %16llx %16llx\n", fDCO, RFreq);
+	dev_info(dev->dev, "%16llx %16llx\n", fDCO, RFreq);
 
 	fxtal = m_fXtal;
 	do_div(RFreq, fxtal);
-	pr_info("DDBridge: %16llx %d\n", RFreq, fxtal);
+	dev_info(dev->dev, "%16llx %d\n", RFreq, fxtal);
 	RF = RFreq;
 
-	pr_info("DDBridge: fOut = %u fXtal = %llu fDCO = %llu HSDIV = %llu, N = %u, RFreq = %llu\n",
+	dev_info(dev->dev, "fOut = %u fXtal = %llu fDCO = %llu HSDIV = %llu, N = %u, RFreq = %llu\n",
 		 fOut, m_fXtal, fDCO, HSDiv, N, RFreq);
 
 	Data[0] = (u8)(((HSDiv - 4) << 5) | ((N - 1) >> 2));
@@ -775,7 +772,7 @@ static int mod_set_si598(struct ddb *dev, u32 freq)
 	Data[4] = (u8)((RF >>  8) & 0xFF);
 	Data[5] = (u8)((RF)       & 0xFF);
 
-	pr_info("DDBridge:  Data = %02x %02x %02x %02x %02x %02x\n",
+	dev_info(dev->dev, "Data = %02x %02x %02x %02x %02x %02x\n",
 		 Data[0], Data[1], Data[2], Data[3], Data[4], Data[5]);
 	mod_si598_writereg(dev, 7, Data[0]);
 	mod_si598_writereg(dev, 8, Data[1]);
@@ -909,11 +906,11 @@ static int mod_init_dac_input(struct ddb *dev)
 	}
 
 	if (Sample1 == 0xFF || Sample2 == 0xFF) {
-		pr_err("DDBridge:  No valid window found\n");
+		dev_err(dev->dev, "No valid window found\n");
 		return -EINVAL;
 	}
 
-	pr_err("DDBridge:  Window = %d - %d\n", Sample1, Sample2);
+	dev_err(dev->dev, "Window = %d - %d\n", Sample1, Sample2);
 
 	for (Sample = Sample1; Sample < Sample2; Sample += 1) {
 		if (SetTable[Sample] < HldTable[Sample]) {
@@ -924,15 +921,15 @@ static int mod_init_dac_input(struct ddb *dev)
 		}
 	}
 
-	pr_info("DDBridge: Select Sample %d\n", SelectSample);
+	dev_info(dev->dev, "Select Sample %d\n", SelectSample);
 
 	if (SelectSample == 0xFF) {
-		pr_err("DDBridge: No valid sample found\n");
+		dev_err(dev->dev, "No valid sample found\n");
 		return -EINVAL;
 	}
 
 	if (HldTable[SelectSample] + SetTable[SelectSample] < 8) {
-		pr_err("DDBridge: Too high jitter\n");
+		dev_err(dev->dev, "Too high jitter\n");
 		return -EINVAL;
 	}
 
@@ -947,10 +944,10 @@ static int mod_init_dac_input(struct ddb *dev)
 	mod_read_dac_register(dev, 0x06, &ReadSeek);
 	Seek &= ReadSeek;
 	if ((Seek & 0x01) == 0) {
-		pr_err("DDBridge: Insufficient timing margin\n");
+		dev_err(dev->dev, "Insufficient timing margin\n");
 		return -EINVAL;
 	}
-	pr_info("DDBridge: Done\n");
+	dev_info(dev->dev, "Done\n");
 	return 0;
 }
 
@@ -1007,7 +1004,7 @@ static int mod_set_dac_clock(struct ddb *dev, u32 Frequency)
 		ddbwritel(dev, DAC_CONTROL_RESET, DAC_CONTROL);
 		msleep(20);
 		if (mod_set_si598(dev, Frequency)) {
-			pr_err("DDBridge: mod_set_si598 failed\n");
+			dev_err(dev->dev, "mod_set_si598 failed\n");
 			return -1;
 		}
 		msleep(50);
@@ -1022,7 +1019,7 @@ static int mod_set_dac_clock(struct ddb *dev, u32 Frequency)
 			break;
 		msleep(100);
 	}
-	pr_info("DDBridge: mod_set_dac_clock OK\n");
+	dev_info(dev->dev, "%s OK\n", __func__);
 	return hr;
 }
 
@@ -1128,18 +1125,18 @@ static int set_base_frequency(struct ddb *dev, u32 freq)
 	u32 UP2Frequency = 1896;
 	u32 down, freq10;
 
-	pr_info("DDBridge: set base to %u\n", freq);
+	dev_info(dev->dev, "set base to %u\n", freq);
 	dev->mod_base.frequency = freq;
 	freq /= 1000000;
 	freq10 = dev->mod_base.flat_start + 4;
 	down = freq + 9 * 8 + freq10 + UP1Frequency + UP2Frequency;
 
 	if ((freq10 + 9 * 8) > (dev->mod_base.flat_end - 4)) {
-		pr_err("DDBridge: Frequency out of range %d\n", freq10);
+		dev_err(dev->dev, "Frequency out of range %d\n", freq10);
 		return -EINVAL;
 	}
 	if (down % 8) {
-		pr_err("DDBridge:  Invalid Frequency %d\n", down);
+		dev_err(dev->dev, "Invalid Frequency %d\n", down);
 		return -EINVAL;
 	}
 	return mod_set_down(dev, down, 8, Ext);
@@ -1168,12 +1165,12 @@ static int mod_init_1(struct ddb *dev, u32 Frequency)
 		stat = -EINVAL;
 		goto fail;
 	}
-	pr_info("DDBridge: srate = %d\n", flash->DataSet[0].Symbolrate * 1000);
+	dev_info(dev->dev, "srate = %d\n", flash->DataSet[0].Symbolrate * 1000);
 
 	mod_output_enable(dev, 0);
 	stat = mod_set_dac_clock(dev, flash->DataSet[0].DACFrequency * 1000);
 	if (stat < 0) {
-		pr_err("DDBridge: setting DAC clock failed\n");
+		dev_err(dev->dev, "setting DAC clock failed\n");
 		goto fail;
 	}
 	mod_set_dac_current(dev, 512, 512);
@@ -1190,17 +1187,17 @@ static int mod_init_1(struct ddb *dev, u32 Frequency)
 	FrequencyCH10 = flash->DataSet[0].FlatStart + 4;
 	DownFrequency = Frequency + 9 * 8 + FrequencyCH10 +
 		UP1Frequency + UP2Frequency;
-	pr_info("DDBridge: CH10 = %d, Down = %d\n",
+	dev_info(dev->dev, "CH10 = %d, Down = %d\n",
 		 FrequencyCH10, DownFrequency);
 
 	if ((FrequencyCH10 + 9 * 8) > (flash->DataSet[0].FlatEnd - 4)) {
-		pr_err("DDBridge: Frequency out of range %d\n", FrequencyCH10);
+		dev_err(dev->dev, "Frequency out of range %d\n", FrequencyCH10);
 		stat = -EINVAL;
 		goto fail;
 	}
 
 	if (DownFrequency % 8 != 0) {
-		pr_err("DDBridge:  Invalid Frequency %d\n", DownFrequency);
+		dev_err(dev->dev, "Invalid Frequency %d\n", DownFrequency);
 		stat = -EINVAL;
 		goto fail;
 	}
@@ -1229,7 +1226,7 @@ static int mod_init_1(struct ddb *dev, u32 Frequency)
 			 flash->DataSet[0].PostScaleQ);
 	mod_pre_eq_gain(dev, flash->DataSet[0].PreScale);
 	/*mod_pre_eq_gain(dev, 0x0680);*/
-	pr_info("DDBridge: prescaler %04x\n", flash->DataSet[0].PreScale);
+	dev_info(dev->dev, "prescaler %04x\n", flash->DataSet[0].PreScale);
 	mod_set_channelsumshift(dev, 2);
 	mod_output_enable(dev, 1);
 
@@ -1353,7 +1350,7 @@ void ddbridge_mod_rate_handler(unsigned long data)
 
 	case CM_ADJUST:
 		if (InPacketDiff < mod->MinInputPackets) {
-			pr_info("DDBridge: PCR Adjust reset  IN: %u  Min: %u\n",
+			dev_info(dev->dev, "PCR Adjust reset  IN: %u  Min: %u\n",
 				 InPacketDiff, mod->MinInputPackets);
 			mod->InPacketsSum = 0;
 			mod->OutPacketsSum = 0;
@@ -1394,7 +1391,7 @@ void ddbridge_mod_rate_handler(unsigned long data)
 
 		mod->PCRIncrement += PCRIncrementDiff;
 		pcr = ConvertPCR(mod->PCRIncrement);
-		pr_info("DDBridge: outl %016llx\n", pcr);
+		dev_info(dev->dev, "outl %016llx\n", pcr);
 		ddbwritel(dev,	pcr & 0xffffffff,
 			  CHANNEL_PCR_ADJUST_OUTL(output->nr));
 		ddbwritel(dev,	(pcr >> 32) & 0xffffffff,
@@ -1421,9 +1418,9 @@ void ddbridge_mod_rate_handler(unsigned long data)
 
 	spin_unlock(&dma->lock);
 
-	pr_info("DDBridge: chan %d out %016llx in %016llx indiff %08x\n",
+	dev_info(dev->dev, "chan %d out %016llx in %016llx indiff %08x\n",
 		 chan, OutPackets, InPackets, InPacketDiff);
-	pr_info("DDBridge: cnt  %d pcra %016llx pcraext %08x pcraextfrac %08x pcrcorr %08x pcri %016llx\n",
+	dev_info(dev->dev, "cnt  %d pcra %016llx pcraext %08x pcraextfrac %08x pcrcorr %08x pcri %016llx\n",
 		 mod->StateCounter, PCRAdjust, PCRAdjustExt,
 		 PCRAdjustExtFrac, PCRCorr, mod->PCRIncrement);
 }
@@ -1440,7 +1437,7 @@ static int mod3_set_base_frequency(struct ddb *dev, u32 frequency)
 	tmp = frequency;
 	tmp <<= 33;
 	tmp = div64_s64(tmp, 4915200000);
-	pr_info("set base frequency = %u  regs = 0x%08llx\n", frequency, tmp);
+	dev_info(dev->dev, "set base frequency = %u  regs = 0x%08llx\n", frequency, tmp);
 	ddbwritel(dev, (u32) tmp, RFDAC_FCW);
 	return 0;
 }
@@ -1456,7 +1453,7 @@ static void mod3_set_cfcw(struct ddb_mod *mod, u32 f)
 	tmp = ((s64) (freq - dcf)) << 32;
 	tmp = div64_s64(tmp, srdac);
 	cfcw = (u32) tmp;
-	pr_info("f=%u cfcw = %08x nr = %u\n", f, cfcw, mod->port->nr);
+	dev_info(dev->dev, "f=%u cfcw = %08x nr = %u\n", f, cfcw, mod->port->nr);
 	ddbwritel(dev, cfcw, SDR_CHANNEL_CFCW(mod->port->nr));
 }
 
@@ -1557,7 +1554,8 @@ int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg)
 		if ((tvps->num == 0) || (tvps->num > DTV_IOCTL_MAX_MSGS))
 			return -EINVAL;
 
-		tvp = kmalloc(tvps->num * sizeof(struct dtv_property),
+		tvp = kmalloc_array(tvps->num,
+				    sizeof(struct dtv_property),
 				    GFP_KERNEL);
 		if (!tvp) {
 			ret = -ENOMEM;
@@ -1627,14 +1625,13 @@ out:
 
 static int mod_init_2(struct ddb *dev, u32 Frequency)
 {
-	int status, i;
+	int i, status, streams = dev->link[0].info->port_num;
-	int streams = dev->link[0].info->port_num;
 
 	dev->mod_base.frequency = Frequency;
-	status = mod_fsm_setup(dev, 0, 0);
 
+	status = mod_fsm_setup(dev, 0);
 	if (status) {
-		pr_err("FSM setup failed!\n");
+		dev_err(dev->dev, "FSM setup failed!\n");
 		return -1;
 	}
 	for (i = 0; i < streams; i++) {
@@ -1709,7 +1706,7 @@ static int rfdac_init(struct ddb *dev)
 	}
 	if (tmp & 0x80)
 		return -1;
-	pr_info("sync %d:%08x\n", i, tmp);
+	dev_info(dev->dev, "sync %d:%08x\n", i, tmp);
 	ddbwritel(dev, RFDAC_CMD_RESET, RFDAC_CONTROL);
 	for (i = 0; i < 10; i++) {
 		msleep(20);
@@ -1719,7 +1716,7 @@ static int rfdac_init(struct ddb *dev)
 	}
 	if (tmp & 0x80)
 		return -1;
-	pr_info("sync %d:%08x\n", i, tmp);
+	dev_info(dev->dev, "sync %d:%08x\n", i, tmp);
 	ddbwritel(dev, RFDAC_CMD_SETUP, RFDAC_CONTROL);
 	for (i = 0; i < 10; i++) {
 		msleep(20);
@@ -1729,7 +1726,7 @@ static int rfdac_init(struct ddb *dev)
 	}
 	if (tmp & 0x80)
 		return -1;
-	pr_info("sync %d:%08x\n", i, tmp);
+	dev_info(dev->dev, "sync %d:%08x\n", i, tmp);
 	ddbwritel(dev, 0x01, JESD204B_BASE);
 	for (i = 0; i < 400; i++) {
 		msleep(20);
@@ -1737,7 +1734,7 @@ static int rfdac_init(struct ddb *dev)
 		if ((tmp & 0xc0000000) == 0xc0000000)
 			break;
 	}
-	pr_info("sync %d:%08x\n", i, tmp);
+	dev_info(dev->dev, "sync %d:%08x\n", i, tmp);
 	if ((tmp & 0xc0000000) != 0xc0000000)
 		return -1;
 	return 0;
@@ -1750,12 +1747,12 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 
 	ret = mod_setup_max2871(dev, max2871_sdr);
 	if (ret)
-		pr_err("DDBridge: PLL setup failed\n");
+		dev_err(dev->dev, "PLL setup failed\n");
 	ret = rfdac_init(dev);
 	if (ret)
 		ret = rfdac_init(dev);
 	if (ret)
-		pr_err("DDBridge: RFDAC setup failed\n");
+		dev_err(dev->dev, "RFDAC setup failed\n");
 
 	for (i = 0; i < streams; i++) {
 		struct ddb_mod *mod = &dev->mod[i];
@@ -1787,11 +1784,15 @@ static int mod_init_3(struct ddb *dev, u32 Frequency)
 
 int ddbridge_mod_init(struct ddb *dev)
 {
-	if (dev->link[0].info->version <= 1)
+	switch (dev->link[0].info->version) {
+	case 0:
+	case 1:
 		return mod_init_1(dev, 722000000);
-	if (dev->link[0].info->version == 2)
+	case 2:
 		return mod_init_2(dev, 114000000);
-	if (dev->link[0].info->version == 3)
+	case 3:
 		return mod_init_3(dev, 503250000);
+	default:
 		return -1;
 	}
+}

ddbridge/ddbridge-ns.c

@@ -17,10 +17,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 #include "ddbridge.h"
@@ -117,8 +115,9 @@ static int ns_set_pids(struct dvbnss *nss)
 		/* disable unused pids */
 		for (; j < 5; j++)
 			ddbwritel(dev, 0, PID_FILTER_PID(dns->nr, j));
-	} else
+	} else {
 		ddbcpyto(dev, STREAM_PIDS(dns->nr), nss->pids, 0x400);
+	}
 	return 0;
 }
 
@@ -197,7 +196,7 @@ static int ns_set_ci(struct dvbnss *nss, u8 ci)
 	if (ciport < 0)
 		return -EINVAL;
 
-	pr_info("DDBridge: input %d.%d to ci %d at port %d\n",
+	dev_info(dev->dev, "DDBridge: input %d.%d to ci %d at port %d\n",
 		 input->port->lnr, input->nr, ci, ciport);
 	ddbwritel(dev, (input->port->lnr << 21) | (input->nr << 16) | 0x1c,
 		  TS_CONTROL(dev->port[ciport].output));

ddbridge/ddbridge-regs.h

@@ -15,10 +15,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 /* Register Definitions */
@@ -106,7 +104,6 @@
 #define INTMASK_TSOUTPUT3   (0x00040000)
 #define INTMASK_TSOUTPUT4   (0x00080000)
 
-
 #define INTERRUPT_V2_CONTROL  (INTERRUPT_BASE + 0x00)
 #define INTERRUPT_V2_ENABLE_1 (INTERRUPT_BASE + 0x04)
 #define INTERRUPT_V2_ENABLE_2 (INTERRUPT_BASE + 0x08)
@@ -125,9 +122,6 @@
 #define INTERRUPT_V2_STATUS_6 (INTERRUPT_BASE + 0x38)
 #define INTERRUPT_V2_STATUS_7 (INTERRUPT_BASE + 0x3c)
 
-
-
-
 /* Modulator registers */
 
 /*  Clock Generator ( Sil598 @ 0xAA I2c ) */
@@ -156,16 +150,15 @@
 #define TEMPMON_CONTROL_INTENABLE   (0x00000004)
 #define TEMPMON_CONTROL_OVERTEMP    (0x00008000)
 
-
+/* Temperature in C x 256 */
-/* SHORT Temperature in <20>C x 256 */
 #define TEMPMON_CORE       (TEMPMON_BASE + 0x04)
 #define TEMPMON_SENSOR0    (TEMPMON_BASE + 0x04)
 #define TEMPMON_SENSOR1    (TEMPMON_BASE + 0x08)
 #define TEMPMON_SENSOR2    (TEMPMON_BASE + 0x0C)
 
 #define TEMPMON_FANCONTROL  (TEMPMON_BASE + 0x10)
-#define TEMPMON_FANPWM      (0x00000F00)            // PWM speed in 10% steps
+#define TEMPMON_FANPWM      (0x00000F00)  /* PWM speed in 10% steps */
-#define TEMPMON_FANTACHO    (0x000000FF)            // Rotations in 100/min steps
+#define TEMPMON_FANTACHO    (0x000000FF) /*  Rotations in 100/min steps */
 
 /* V1 Temperature Monitor
  * Temperature Monitor TEMPMON_CONTROL & 0x8000 == 0 : ( 2x LM75A @ 0x90,0x92 )
@@ -173,16 +166,23 @@
  * ( 1x LM75A @ 0x90, 1x ADM1032 @ 0x9A )
  */
 
-#define TEMPMON1_CORE       (TEMPMON_SENSOR0)    // u16 Temperature in <EFBFBD>C x 256 (ADM1032 ext)
+/* Temperature in C x 256 (ADM1032 ext) */
-#define TEMPMON1_SENSOR1    (TEMPMON_BASE + 0x08) // SHORT Temperature in <20>C x 256 (LM75A 0x90)
+#define TEMPMON1_CORE       (TEMPMON_SENSOR0)
-#define TEMPMON1_SENSOR2    (TEMPMON_BASE + 0x0C) // SHORT Temperature in <EFBFBD>C x 256 (LM75A 0x92 or ADM1032 Int)
+/* Temperature in C x 256 (LM75A 0x90) */
+#define TEMPMON1_SENSOR1    (TEMPMON_BASE + 0x08)
+/* Temperature in C x 256 (LM75A 0x92 or ADM1032 Int) */
+#define TEMPMON1_SENSOR2    (TEMPMON_BASE + 0x0C)
 
-// V2 Temperature Monitor 2 ADM1032
+/* V2 Temperature Monitor 2 ADM1032 */
 
-#define TEMPMON2_BOARD      (TEMPMON_SENSOR0)    // SHORT Temperature in <EFBFBD>C x 256 (ADM1032 int)
+/* Temperature in C x 256 (ADM1032 int) */
-#define TEMPMON2_FPGACORE   (TEMPMON_SENSOR1)    // SHORT Temperature in <20>C x 256 (ADM1032 ext)
+#define TEMPMON2_BOARD      (TEMPMON_SENSOR0)
-#define TEMPMON2_QAMCORE    (TEMPMON_SENSOR2)    // SHORT Temperature in <EFBFBD>C x 256 (ADM1032 ext)
+/* Temperature in C x 256 (ADM1032 ext) */
-#define TEMPMON2_DACCORE    (TEMPMON_SENSOR2)    // SHORT Temperature in <20>C x 256 (ADM1032 ext)
+#define TEMPMON2_FPGACORE   (TEMPMON_SENSOR1)
+/* Temperature in C x 256 (ADM1032 ext) */
+#define TEMPMON2_QAMCORE    (TEMPMON_SENSOR2)
+/* SHORT Temperature in C x 256 (ADM1032 ext) */
+#define TEMPMON2_DACCORE    (TEMPMON_SENSOR2)
 
 /* ------------------------------------------------------------------------- */
 /* I2C Master Controller */
@@ -201,7 +201,6 @@
 #define I2C_SPEED_77    (0x19181919)
 #define I2C_SPEED_50    (0x27262727)
 
-
 /* ------------------------------------------------------------------------- */
 /* DMA  Controller */
 
@@ -221,18 +220,16 @@
 #define DMA_DIAG_WAITOVERFLOWCOUNTER    (0x38)
 #define DMA_DIAG_WAITCOUNTER            (0x3C)
 
-#define TS_CONTROL(_io)         (_io->regs + 0x00)
+#define TS_CONTROL(_io)         ((_io)->regs + 0x00)
-#define TS_CONTROL2(_io)        (_io->regs + 0x04)
+#define TS_CONTROL2(_io)        ((_io)->regs + 0x04)
-
 
 /* ------------------------------------------------------------------------- */
 /* DMA  Buffer */
 
-#define DMA_BUFFER_CONTROL(_dma)       (_dma->regs + 0x00)
+#define DMA_BUFFER_CONTROL(_dma)       ((_dma)->regs + 0x00)
-#define DMA_BUFFER_ACK(_dma)           (_dma->regs + 0x04)
+#define DMA_BUFFER_ACK(_dma)           ((_dma)->regs + 0x04)
-#define DMA_BUFFER_CURRENT(_dma)       (_dma->regs + 0x08)
+#define DMA_BUFFER_CURRENT(_dma)       ((_dma)->regs + 0x08)
-#define DMA_BUFFER_SIZE(_dma)          (_dma->regs + 0x0c)
+#define DMA_BUFFER_SIZE(_dma)          ((_dma)->regs + 0x0c)
-
 
 /* ------------------------------------------------------------------------- */
 
@@ -248,8 +245,8 @@
 #define LNB_CMD_DISEQC 6
 #define LNB_CMD_SCIF   7
 
-#define LNB_BUSY  (1ULL <<  4)
+#define LNB_BUSY  BIT_ULL(4)
-#define LNB_TONE  (1ULL << 15)
+#define LNB_TONE  BIT_ULL(15)
 
 #define LNB_STATUS(i)                (LNB_BASE + (i) * 0x20 + 0x04)
 #define LNB_VOLTAGE(i)               (LNB_BASE + (i) * 0x20 + 0x08)
@@ -302,7 +299,7 @@
 #define CI_BLOCKIO_SEND_BUFFER(i)  \
 	(CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE + CI_BLOCKIO_BUFFER_SIZE)
 
-// V1
+/* V1 */
 
 #define VCO1_BASE           (0xC0)
 #define VCO1_CONTROL        (VCO1_BASE + 0x00)
@@ -340,10 +337,14 @@
 #define MAX2871_CONTROL         (MAX2871_BASE + 0x00)
 #define MAX2871_OUTDATA         (MAX2871_BASE + 0x04)
 #define MAX2871_INDATA          (MAX2871_BASE + 0x08)
-#define MAX2871_CONTROL_WRITE   (0x00000001)   // 1 = Trigger write, resets when done
+/* 1 = Trigger write, resets when done */
-#define MAX2871_CONTROL_CE      (0x00000002)   // 0 = Put VCO into power down
+#define MAX2871_CONTROL_WRITE   (0x00000001)
-#define MAX2871_CONTROL_MUXOUT  (0x00000004)   // Muxout from VCO
+/* 0 = Put VCO into power down */
-#define MAX2871_CONTROL_LOCK    (0x00000008)   // Lock from VCO
+#define MAX2871_CONTROL_CE      (0x00000002)
+/* Muxout from VCO */
+#define MAX2871_CONTROL_MUXOUT  (0x00000004)
+/* Lock from VCO */
+#define MAX2871_CONTROL_LOCK    (0x00000008)
 
 #define FSM_BASE                (0x200)
 #define FSM_CONTROL             (FSM_BASE + 0x00)
@@ -360,7 +361,6 @@
 #define FSM_STATUS_READY        (0x00010000)
 #define FSM_STATUS_QAMREADY     (0x00020000)
 
-
 #define FSM_CAPACITY            (FSM_BASE + 0x04)
 #define FSM_CAPACITY_MAX        (0x3F000000)
 #define FSM_CAPACITY_CUR        (0x003F0000)
@@ -377,8 +377,7 @@
 #define FSM_GAIN_N24            (0x00000029)
 #define FSM_GAIN_N96            (0x00000011)
 
-
+/* Attenuator/VGA */
-// Attenuator/VGA
 
 #define RF_ATTENUATOR   (0xD8)
 #define RF_ATTENUATOR   (0xD8)
@@ -399,7 +398,6 @@
 
 #define RF_VGA_GAIN_MAX         (200)
 
-
 /* V1 only */
 
 #define RF_POWER        (0xE0)
@@ -412,7 +410,6 @@
 #define RF_POWER_CONTROL_VALIDMASK (0x00000700)
 #define RF_POWER_CONTROL_VALID     (0x00000500)
 
-
 /*
  *  Output control
  */
@@ -444,7 +441,6 @@
 #define IQOUTPUT_CONTROL_ENABLE_PEAK        (0x00000008)
 #define IQOUTPUT_CONTROL_BYPASS_EQUALIZER   (0x00000010)
 
-
 /* Modulator Base  V1 */
 
 #define MODULATOR_BASE          (0x200)
@@ -460,7 +456,6 @@
 #define MODULATOR_IQTABLE_INDEX_SEL_Q     (MODULATOR_IQTABLE_INDEX_IQ_MASK)
 #define MODULATOR_IQTABLE_SIZE    (2048)
 
-
 /* Modulator Channels */
 
 #define CHANNEL_BASE dev->link[0].info->regmap->channel->base
@@ -512,12 +507,11 @@
 #define CHANNEL_SETTINGS2_OUTPUT_MASK       (0x0000007F)
 
 #define KFLF_MAX                            (0x07FFFFFFUL)
-#define KF_INIT(Symbolrate)                 (Symbolrate)
+#define KF_INIT(_symbol_rate)               (_symbol_rate)
-#define LF_INIT(Symbolrate)                 (9000000UL)
+#define LF_INIT(_symbol_rate)               (9000000UL)
 #define MIN_SYMBOLRATE                      (1000000)
 #define MAX_SYMBOLRATE                      (7100000)
 
-
 /* OCTONET */
 
 #define ETHER_BASE       (0x100)
@@ -554,11 +548,9 @@
 #define PID_FILTER_SYSTEM_PIDS(i)     (PID_FILTER_BASE + (i) * 0x20)
 #define PID_FILTER_PID(i, j)     (PID_FILTER_BASE + (i) * 0x20 + (j) * 4)
 
+/* V2 */
 
-
+/* MAX2871 same as DVB Modulator V2 */
-// V2
-
-// MAX2871 same as DVB Modulator V2
 
 #define RFDAC_BASE                (0x200)
 #define RFDAC_CONTROL             (RFDAC_BASE + 0x00)
@@ -575,19 +567,13 @@
 
 #define RFDAC_FCW                 (RFDAC_BASE + 0x10)
 
-//
-// --------------------------------------------------------------------------
-//
-
 #define JESD204B_BASE             (0x280)
 
-// Additional Status Bits
+/* Additional Status Bits */
 
 #define DMA_PCIE_LANES_MASK       (0x00070000)
 
-
+/* Modulator Channels, partially compatible to DVB Modulator V1 */
-// --------------------------------------------------------------------------
-// Modulator Channels, partially compatible to DVB Modulator V1
 
 #define SDR_CHANNEL_BASE            (0x800)
 
@@ -604,18 +590,18 @@
 #define SDR_CHANNEL_FM1GAIN(i)      ((SDR_CHANNEL_BASE) + (i) * 64 + 0x2C)
 #define SDR_CHANNEL_FM2GAIN(i)      ((SDR_CHANNEL_BASE) + (i) * 64 + 0x30)
 
-// Control and status bits
+/* Control and status bits */
 #define SDR_CONTROL_ENABLE_CHANNEL  (0x00000004)
 #define SDR_CONTROL_ENABLE_DMA      (0x00000008)
 #define SDR_STATUS_DMA_UNDERRUN     (0x00010000)
 
-// Config
+/* Config */
 #define SDR_CONFIG_ENABLE_FM1       (0x00000002)
 #define SDR_CONFIG_ENABLE_FM2       (0x00000004)
 #define SDR_CONFIG_DISABLE_ARI      (0x00000010)
 #define SDR_CONFIG_DISABLE_VSB      (0x00000020)
 
-// SET FIR
+/* SET FIR */
 #define SDR_FIR_COEFF_MASK          (0x00000FFF)
 #define SDR_FIR_TAP_MASK            (0x001F0000)
 #define SDR_FIR_SELECT_MASK         (0x00C00000)

ddbridge/ddbridge.h

@@ -16,10 +16,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 #ifndef _DDBRIDGE_H_
@@ -30,7 +28,7 @@
 
 #include <linux/version.h>
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
+#if (KERNEL_VERSION(3, 8, 0) <= LINUX_VERSION_CODE)
 #define __devexit
 #define __devinit
 #define __devinitconst
@@ -102,7 +100,7 @@
 #define DDB_MAX_LINK    4
 #define DDB_LINK_SHIFT 28
 
-#define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
+#define DDB_LINK_TAG(_x) ((_x) << DDB_LINK_SHIFT)
 
 struct ddb_regset {
 	u32 base;
@@ -118,22 +116,18 @@ struct ddb_regmap {
 	u32 irq_base_gtl;
 	u32 irq_base_rate;
 
-	struct ddb_regset *i2c;
+	const struct ddb_regset *i2c;
-	struct ddb_regset *i2c_buf;
+	const struct ddb_regset *i2c_buf;
-	struct ddb_regset *idma;
+	const struct ddb_regset *idma;
-	struct ddb_regset *idma_buf;
+	const struct ddb_regset *idma_buf;
-	struct ddb_regset *odma;
+	const struct ddb_regset *odma;
-	struct ddb_regset *odma_buf;
+	const struct ddb_regset *odma_buf;
 
-	struct ddb_regset *input;
+	const struct ddb_regset *input;
-	struct ddb_regset *output;
+	const struct ddb_regset *output;
 
-	struct ddb_regset *channel;
+	const struct ddb_regset *channel;
-	//struct ddb_regset *ci;
+	const struct ddb_regset *gtl;
-	//struct ddb_regset *pid_filter;
-	//struct ddb_regset *ns;
-	struct ddb_regset *gtl;
-	//struct ddb_regset *mdio;
 };
 
 struct ddb_ids {
@@ -178,7 +172,7 @@ struct ddb_info {
 #define TS_QUIRK_NO_OUTPUT 4
 #define TS_QUIRK_ALT_OSC   8
 	u32 tempmon_irq;
-	struct ddb_regmap *regmap;
+	const struct ddb_regmap *regmap;
 };
 
 /* DMA_SIZE MUST be smaller than 256k and
@@ -208,7 +202,6 @@ struct ddb_info {
 #define OUTPUT_DMA_SIZE_SDR (256 * 1024)
 #define OUTPUT_DMA_IRQ_DIV_SDR 1
 
-
 struct ddb;
 struct ddb_port;
 
@@ -229,7 +222,7 @@ struct ddb_dma {
 #else
 	struct tasklet_struct  tasklet;
 #endif
-	spinlock_t             lock;
+	spinlock_t             lock; /* DMA lock */
 	wait_queue_head_t      wq;
 	int                    running;
 	u32                    stat;
@@ -254,11 +247,12 @@ struct ddb_dvb {
 	u32                    attached;
 	u8                     input;
 
-	fe_sec_tone_mode_t     tone;
+	enum fe_sec_tone_mode  tone;
-	fe_sec_voltage_t       voltage;
+	enum fe_sec_voltage    voltage;
 
 	int (*i2c_gate_ctrl)(struct dvb_frontend *, int);
-	int (*set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
+	int (*set_voltage)(struct dvb_frontend *fe,
+			   enum fe_sec_voltage voltage);
 	int (*set_input)(struct dvb_frontend *fe, int input);
 	int (*diseqc_send_master_cmd)(struct dvb_frontend *fe,
 				      struct dvb_diseqc_master_cmd *cmd);
@@ -268,7 +262,6 @@ struct ddb_ci {
 	struct dvb_ca_en50221  en;
 	struct ddb_port       *port;
 	u32                    nr;
-	struct mutex           lock;
 };
 
 struct ddb_io {
@@ -302,7 +295,7 @@ struct ddb_port {
 	u32                    regs;
 	u32                    lnr;
 	struct ddb_i2c        *i2c;
-	struct mutex           i2c_gate_lock;
+	struct mutex           i2c_gate_lock; /* I2C access lock */
 	u32                    class;
 #define DDB_PORT_NONE           0
 #define DDB_PORT_CI             1
@@ -354,8 +347,6 @@ struct mod_base {
 
 struct ddb_mod {
 	struct ddb_port       *port;
-	//u32                    nr;
-	//u32                    regs;
 
 	u32                    frequency;
 	u32                    modulation;
@@ -414,7 +405,7 @@ struct ddb_ns {
 };
 
 struct ddb_lnb {
-	struct mutex           lock;
+	struct mutex           lock; /* lock lnb access */
 	u32                    tone;
 	fe_sec_voltage_t       oldvoltage[4];
 	u32                    voltage[4];
@@ -424,17 +415,17 @@ struct ddb_lnb {
 
 struct ddb_link {
 	struct ddb            *dev;
-	struct ddb_info       *info;
+	const struct ddb_info *info;
 	u32                    nr;
 	u32                    regs;
-	spinlock_t             lock;
+	spinlock_t             lock; /* lock link access */
-	struct mutex           flash_mutex;
+	struct mutex           flash_mutex; /* lock flash access */
 	struct ddb_lnb         lnb;
 	struct tasklet_struct  tasklet;
 	struct ddb_ids         ids;
 
-	spinlock_t             temp_lock;
+	spinlock_t             temp_lock; /* lock temp chip access */
-	int                    OverTemperatureError;
+	int                    over_temperature_error;
 	u8                     temp_tab[11];
 };
 
@@ -476,7 +467,7 @@ struct ddb {
 	int                    ns_num;
 	struct ddb_ns          ns[DDB_NS_MAX];
 	int                    vlan;
-	struct mutex           mutex;
+	struct mutex           mutex; /* lock accces to global ddb array */
 
 	struct dvb_device     *nsd_dev;
 	u8                     tsbuf[TS_CAPTURE_LEN];
@@ -538,14 +529,14 @@ struct DDMOD_FLASH {
 
 #define DDMOD_FLASH_MAGIC   0x5F564d5F
 
-
 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
 
-#define DDBRIDGE_VERSION "0.9.31"
+#define DDBRIDGE_VERSION "0.9.32"
 
 /* linked function prototypes */
 
-struct ddb_info *get_ddb_info(u16 vendor, u16 device, u16 subvendor, u16 subdevice);
+const struct ddb_info *get_ddb_info(u16 vendor, u16 device,
+				    u16 subvendor, u16 subdevice);
 int netstream_init(struct ddb_input *input);
 int ddb_dvb_ns_input_start(struct ddb_input *input);
 int ddb_dvb_ns_input_stop(struct ddb_input *input);
@@ -562,10 +553,10 @@ void ddb_ports_detach(struct ddb *dev);
 void ddb_ports_release(struct ddb *dev);
 void ddb_buffers_free(struct ddb *dev);
 void ddb_unmap(struct ddb *dev);
-irqreturn_t irq_handler0(int irq, void *dev_id);
+irqreturn_t ddb_irq_handler0(int irq, void *dev_id);
-irqreturn_t irq_handler1(int irq, void *dev_id);
+irqreturn_t ddb_irq_handler1(int irq, void *dev_id);
-irqreturn_t irq_handler(int irq, void *dev_id);
+irqreturn_t ddb_irq_handler(int irq, void *dev_id);
-irqreturn_t irq_handler_v2(int irq, void *dev_id);
+irqreturn_t ddb_irq_handler_v2(int irq, void *dev_id);
 void ddb_reset_ios(struct ddb *dev);
 int ddb_init(struct ddb *dev);
 int ddb_class_create(void);
@@ -574,4 +565,9 @@ void ddb_class_destroy(void);
 int ddb_i2c_init(struct ddb *dev);
 void ddb_i2c_release(struct ddb *dev);
 
+int ddb_ci_attach(struct ddb_port *port, u32 bitrate);
+
+int ddb_fe_attach_mxl5xx(struct ddb_input *input);
+int ddb_lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm);
+
 #endif

ddbridge/octonet-main.c

@@ -17,10 +17,8 @@
  *
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+ * along with this program; if not, point your browser to
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ *  http://www.gnu.org/copyleft/gpl.html
- * 02110-1301, USA
- * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  */
 
 #include "ddbridge.h"
@@ -54,7 +52,7 @@ static int __init octonet_probe(struct platform_device *pdev)
 	struct resource *regs;
 	int irq;
 
-	dev = vzalloc(sizeof(struct ddb));
+	dev = vzalloc(sizeof(*dev));
 	if (!dev)
 		return -ENOMEM;
 	platform_set_drvdata(pdev, dev);
@@ -86,23 +84,12 @@ static int __init octonet_probe(struct platform_device *pdev)
 	dev->link[0].ids.subdevice = dev->link[0].ids.devid >> 16;
 
 	dev->link[0].dev = dev;
-#if 0
-	if (dev->link[0].ids.devid == 0x0300dd01)
-		dev->link[0].info = &ddb_octonet;
-	else if (dev->link[0].ids.devid == 0x0301dd01)
-		dev->link[0].info = &ddb_octonet_jse;
-	else if (dev->link[0].ids.devid == 0x0307dd01)
-		dev->link[0].info = &ddb_octonet_gtl;
-	else
-		dev->link[0].info = &ddb_octonet_tbd;
-#else
 	dev->link[0].info = get_ddb_info(dev->link[0].ids.vendor,
 					 dev->link[0].ids.device,
 					 0xdd01, 0xffff);
-#endif
+	dev_info(dev->dev, "DDBridge: HW  %08x REGMAP %08x\n",
-	pr_info("DDBridge: HW  %08x REGMAP %08x\n",
 		 dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
-	pr_info("DDBridge: MAC %08x DEVID  %08x\n",
+	dev_info(dev->dev, "DDBridge: MAC %08x DEVID  %08x\n",
 		 dev->link[0].ids.mac, dev->link[0].ids.devid);
 
 	ddbwritel(dev, 0, ETHER_CONTROL);
@@ -113,7 +100,7 @@ static int __init octonet_probe(struct platform_device *pdev)
 	irq = platform_get_irq(dev->pfdev, 0);
 	if (irq < 0)
 		goto fail;
-	if (request_irq(irq, irq_handler,
+	if (request_irq(irq, ddb_irq_handler,
 			IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
 			"octonet-dvb", (void *)dev) < 0)
 		goto fail;

frontends/cxd2843.c

@@ -2203,12 +2203,13 @@ static int tune(struct dvb_frontend *fe, bool re_tune,
 		state->tune_time = jiffies;
 
 	}
-	if (*status & FE_HAS_LOCK)
-		return 0;
-	/* *delay = 50; */
 	r = read_status(fe, status);
 	if (r)
 		return r;
+	if (*status & FE_HAS_LOCK) {
+		*delay = HZ;
+		return 0;
+	}
 	return 0;
 }
 

frontends/stv090x.c

@@ -3446,11 +3446,11 @@ err:
 static int stv090x_set_pls(struct stv090x_state *state, u8 pls_mode, u32 pls_code)
 {
 	dprintk(FE_DEBUG, 1, "Set PLS code %d (mode %d)", pls_code, pls_mode);
-	if (STV090x_WRITE_DEMOD(state, PLROOT2, (pls_mode << 2) | (pls_code >> 16)) < 0)
+	if (STV090x_WRITE_DEMOD(state, PLROOT0, pls_code & 0xff) < 0)
 		goto err;
 	if (STV090x_WRITE_DEMOD(state, PLROOT1, (pls_code >> 8) & 0xff) < 0)
 		goto err;
-	if (STV090x_WRITE_DEMOD(state, PLROOT0, pls_code & 0xff) < 0)
+	if (STV090x_WRITE_DEMOD(state, PLROOT2, (pls_mode << 2) | (pls_code >> 16)) < 0)
 		goto err;
 	return 0;
 err:
@@ -4927,15 +4927,6 @@ static int stv090x_init(struct dvb_frontend *fe)
 	if (stv090x_i2c_gate_ctrl(state, 0) < 0)
 		goto err;
 
-#if 0
-	if (state->device == STV0900) {
-		if (stv0900_set_tspath(state) < 0)
-			goto err;
-	} else {
-		if (stv0903_set_tspath(state) < 0)
-			goto err;
-	}
-#endif
 	return 0;
 
 err_gateoff: