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	| Author | SHA1 | Date | |
|---|---|---|---|
|  | 03ce6c980c | ||
|  | b52eb4bd17 | ||
|  | bf3cad1094 | ||
|  | bc2e1a39ff | ||
|  | 21f00bd922 | ||
|  | 6089b4f5c2 | ||
|  | 8521ce4753 | ||
|  | 06aecc3d66 | ||
|  | e6b06c1f3d | ||
|  | cf77db4fcd | 
| @@ -235,7 +235,7 @@ int main(int argc, char **argv) | ||||
| 			break; | ||||
| 		case 0x000a: | ||||
| 			fname="DVBBridgeV2A_DD01_000A_M4.fpga"; | ||||
| 			printf("Octopus MAXSX8\n"); | ||||
| 			printf("Octopus MAXM4\n"); | ||||
| 			break; | ||||
| 		case 0x0011: | ||||
| 			fname="CIBridgeV1B_CIBridgeV1B.fpga"; | ||||
|   | ||||
| @@ -532,7 +532,6 @@ static void ddb_input_stop_unlocked(struct ddb_input *input) | ||||
| 	if (input->dma) { | ||||
| 		ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); | ||||
| 		input->dma->running = 0; | ||||
| 		spin_unlock_irq(&input->dma->lock); | ||||
| 	} | ||||
| } | ||||
|  | ||||
| @@ -1400,6 +1399,7 @@ static struct stv0910_cfg stv0910_p = { | ||||
| 	.parallel = 1, | ||||
| 	.rptlvl   = 4, | ||||
| 	.clk      = 30000000, | ||||
| 	.tsspeed  = 0x10, | ||||
| }; | ||||
|  | ||||
| static int has_lnbh25(struct i2c_adapter *i2c, u8 adr) | ||||
| @@ -1414,12 +1414,17 @@ static int demod_attach_stv0910(struct ddb_input *input, int type) | ||||
| 	struct i2c_adapter *i2c = &input->port->i2c->adap; | ||||
| 	struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; | ||||
| 	struct stv0910_cfg cfg = stv0910_p; | ||||
| 	struct ddb *dev = input->port->dev; | ||||
| 	u8 lnbh_adr = 0x08; | ||||
|  | ||||
| 	if (stv0910_single) | ||||
| 		cfg.single = 1; | ||||
| 	if (type) | ||||
| 		cfg.parallel = 2; | ||||
| 	if ((input->port->nr == 0) && | ||||
| 	    ((dev->link[0].ids.hwid & 0xffffff) < | ||||
| 	     dev->link[0].info->hw_min)) | ||||
| 		cfg.tsspeed = 0x28; | ||||
| 	dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1)); | ||||
| 	if (!dvb->fe) { | ||||
| 		cfg.adr = 0x6c; | ||||
| @@ -4332,9 +4337,11 @@ static int ddb_gtl_init_link(struct ddb *dev, u32 l) | ||||
| 			if (1 & ddbreadl(dev, regs)) | ||||
| 				break; | ||||
| 		} | ||||
| 		if (c == 5) | ||||
| 		if (c == 5) { | ||||
| 			ddbwritel(dev, 8, regs); | ||||
| 			return -1; | ||||
| 		} | ||||
| 	} | ||||
| 	id = ddbreadl(dev, DDB_LINK_TAG(l) | 8); | ||||
| 	subid = ddbreadl(dev, DDB_LINK_TAG(l) | 12); | ||||
| 	link->info = get_ddb_info(id & 0xffff, id >> 16, | ||||
|   | ||||
| @@ -181,6 +181,33 @@ static const struct ddb_regset octopro_gtl = { | ||||
| /****************************************************************************/ | ||||
| /****************************************************************************/ | ||||
|  | ||||
| static const struct ddb_regset gtl_mini_input = { | ||||
| 	.base = 0x400, | ||||
| 	.num  = 0x14, | ||||
| 	.size = 0x10, | ||||
| }; | ||||
|  | ||||
| static const struct ddb_regset gtl_mini_idma = { | ||||
| 	.base = 0x800, | ||||
| 	.num  = 0x40, | ||||
| 	.size = 0x10, | ||||
| }; | ||||
|  | ||||
| static const struct ddb_regset gtl_mini_idma_buf = { | ||||
| 	.base = 0x4000, | ||||
| 	.num  = 0x40, | ||||
| 	.size = 0x100, | ||||
| }; | ||||
|  | ||||
| static const struct ddb_regset gtl_mini_gtl = { | ||||
| 	.base = 0xe00, | ||||
| 	.num  = 0x03, | ||||
| 	.size = 0x40, | ||||
| }; | ||||
|  | ||||
| /****************************************************************************/ | ||||
| /****************************************************************************/ | ||||
|  | ||||
| static const struct ddb_regmap octopus_map = { | ||||
| 	.irq_version = 1, | ||||
| 	.irq_base_i2c = 0, | ||||
| @@ -193,6 +220,7 @@ static const struct ddb_regmap octopus_map = { | ||||
| 	.odma = &octopus_odma, | ||||
| 	.odma_buf = &octopus_odma_buf, | ||||
| 	.input = &octopus_input, | ||||
|  | ||||
| 	.output = &octopus_output, | ||||
| }; | ||||
|  | ||||
| @@ -258,6 +286,18 @@ static const struct ddb_regmap octopus_sdr_map = { | ||||
| 	.channel = &octopus_mod_2_channel, | ||||
| }; | ||||
|  | ||||
| static const struct ddb_regmap gtl_mini = { | ||||
| 	.irq_version = 2, | ||||
| 	.irq_base_i2c = 32, | ||||
| 	.irq_base_idma = 64, | ||||
| 	.irq_base_odma = 128, | ||||
| 	.irq_base_gtl = 8, | ||||
| 	.idma = >l_mini_idma, | ||||
| 	.idma_buf = >l_mini_idma_buf, | ||||
| 	.input = >l_mini_input, | ||||
| 	.gtl = >l_mini_gtl, | ||||
| }; | ||||
|  | ||||
| /****************************************************************************/ | ||||
| /****************************************************************************/ | ||||
|  | ||||
| @@ -599,6 +639,15 @@ static const struct ddb_info ddb_m4 = { | ||||
| 	.temp_num = 1, | ||||
| }; | ||||
|  | ||||
| static const struct ddb_info ddb_gtl_mini = { | ||||
| 	.type     = DDB_OCTONET, | ||||
| 	.name     = "Digital Devices Octopus GT Mini", | ||||
| 	.regmap   = >l_mini, | ||||
| 	.port_num = 0, | ||||
| 	.i2c_mask = 0x00, | ||||
| 	.ns_num   = 0, | ||||
| }; | ||||
|  | ||||
| /****************************************************************************/ | ||||
| /****************************************************************************/ | ||||
|  | ||||
| @@ -717,6 +766,7 @@ static const struct ddb_device_id ddb_device_ids[] = { | ||||
| 	DDB_DEVID(0x0012, 0x0042, ddb_ci), | ||||
| 	DDB_DEVID(0x0013, 0x0043, ddb_ci_s2_pro), | ||||
| 	DDB_DEVID(0x0013, 0x0044, ddb_ci_s2_pro_a), | ||||
| 	DDB_DEVID(0x0020, 0x0012, ddb_gtl_mini), | ||||
|  | ||||
|         /* Modulators */ | ||||
| 	DDB_DEVID(0x0201, 0x0001, ddb_mod), | ||||
|   | ||||
| @@ -419,6 +419,7 @@ static const struct pci_device_id ddb_id_table[] __devinitconst = { | ||||
| 	DDB_DEVICE_ANY(0x0011), | ||||
| 	DDB_DEVICE_ANY(0x0012), | ||||
| 	DDB_DEVICE_ANY(0x0013), | ||||
| 	DDB_DEVICE_ANY(0x0020), | ||||
| 	DDB_DEVICE_ANY(0x0201), | ||||
| 	DDB_DEVICE_ANY(0x0203), | ||||
| 	DDB_DEVICE_ANY(0x0210), | ||||
|   | ||||
| @@ -524,7 +524,7 @@ struct DDMOD_FLASH { | ||||
|  | ||||
| int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len); | ||||
|  | ||||
| #define DDBRIDGE_VERSION "0.9.34" | ||||
| #define DDBRIDGE_VERSION "0.9.36" | ||||
|  | ||||
| /* linked function prototypes */ | ||||
|  | ||||
|   | ||||
| @@ -43,7 +43,7 @@ | ||||
| static LIST_HEAD(stvlist); | ||||
|  | ||||
| enum receive_mode { RCVMODE_NONE, RCVMODE_DVBS, RCVMODE_DVBS2, RCVMODE_AUTO }; | ||||
|  | ||||
| enum ScanMode { ColdStart, BlindScan }; | ||||
| enum dvbs2_fec_type { DVBS2_64K, DVBS2_16K }; | ||||
|  | ||||
| enum dvbs2_modcod { | ||||
| @@ -114,6 +114,7 @@ struct stv { | ||||
| 	u32                  first_time_lock; | ||||
| 	u8                   demod; | ||||
| 	u32                  symbol_rate; | ||||
| 	enum ScanMode        TuneMode; | ||||
|  | ||||
| 	enum fe_code_rate        puncture_rate; | ||||
| 	enum fe_stv0910_modcod   modcod; | ||||
| @@ -1093,8 +1094,10 @@ static int start(struct stv *state, struct dtv_frontend_properties *p) | ||||
| 	write_reg(state, RSTV0910_P2_CFRINIT0 + state->regoff, 0); | ||||
|  | ||||
| 	write_reg(state, RSTV0910_P2_DMDISTATE + state->regoff, 0x1F); | ||||
|  | ||||
| 	/* Trigger acq */ | ||||
| 	write_reg(state, RSTV0910_P2_DMDISTATE + state->regoff, 0x15); | ||||
| 	write_reg(state, RSTV0910_P2_DMDISTATE + state->regoff, | ||||
| 			state->TuneMode == BlindScan ? 0x00 : 0x15); | ||||
|  | ||||
| 	state->demod_lock_time += TUNING_DELAY; | ||||
| 	state->started = 1; | ||||
| @@ -1245,11 +1248,17 @@ static int set_parameters(struct dvb_frontend *fe) | ||||
| 	struct dtv_frontend_properties *p = &fe->dtv_property_cache; | ||||
|  | ||||
| 	stop(state); | ||||
| 	if (fe->ops.tuner_ops.set_params) | ||||
| 		fe->ops.tuner_ops.set_params(fe); | ||||
| 	if (fe->ops.tuner_ops.get_if_frequency) | ||||
| 		fe->ops.tuner_ops.get_if_frequency(fe, &IF); | ||||
| 	state->TuneMode = p->symbol_rate & 1 ? BlindScan : ColdStart; | ||||
| 	p->symbol_rate &= ~(0x1); | ||||
| 	state->symbol_rate = p->symbol_rate; | ||||
| 	if (state->TuneMode == BlindScan) | ||||
| 		p->symbol_rate = max((u32)(p->symbol_rate + p->symbol_rate/4), | ||||
| 				(u32)70000000); | ||||
|  | ||||
| 	if (fe->ops.tuner_ops.set_params) | ||||
| 		fe->ops.tuner_ops.set_params(fe); | ||||
| 	stat = start(state, p); | ||||
| 	return stat; | ||||
| } | ||||
| @@ -1845,6 +1854,8 @@ struct dvb_frontend *stv0910_attach(struct i2c_adapter *i2c, | ||||
| 	state->tsgeneral = (cfg->parallel == 2) ? 0x02 : 0x00; | ||||
| 	state->i2crpt = 0x0A | ((cfg->rptlvl & 0x07) << 4); | ||||
| 	state->tsspeed = cfg->parallel ? 0x10 : 0x28; | ||||
| 	if (cfg->tsspeed) | ||||
| 		state->tsspeed = cfg->tsspeed; | ||||
| 	state->nr = nr; | ||||
| 	state->regoff = state->nr ? 0 : 0x200; | ||||
| 	state->search_range = 16000000; | ||||
|   | ||||
| @@ -10,6 +10,7 @@ struct stv0910_cfg { | ||||
| 	u8  parallel; | ||||
| 	u8  rptlvl; | ||||
| 	u8  single; | ||||
| 	u8  tsspeed; | ||||
| }; | ||||
|  | ||||
| #if defined(CONFIG_DVB_STV0910) || \ | ||||
|   | ||||
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