mirror of
https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
658 lines
17 KiB
C
658 lines
17 KiB
C
/*
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* ddbridge-mci.c: Digital Devices microcode interface
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*
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* Copyright (C) 2017 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, point your browser to
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "ddbridge.h"
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#include "ddbridge-io.h"
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#include "ddbridge-mci.h"
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static LIST_HEAD(mci_list);
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static const u32 MCLK = (1550000000/12);
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static const u32 MAX_LDPC_BITRATE = (720000000);
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struct mci_base {
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struct list_head mci_list;
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void *key;
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struct ddb_link *link;
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struct completion completion;
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struct i2c_adapter *i2c;
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struct mutex i2c_lock;
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struct mutex tuner_lock;
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u8 adr;
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struct mutex mci_lock;
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int count;
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u8 tuner_use_count[4];
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u8 assigned_demod[8];
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u32 used_ldpc_bitrate[8];
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u8 demod_in_use[8];
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u32 iq_mode;
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};
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struct mci {
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struct mci_base *base;
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struct dvb_frontend fe;
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int nr;
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int demod;
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int tuner;
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int first_time_lock;
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int started;
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struct mci_result signal_info;
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u32 bb_mode;
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};
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static int mci_reset(struct mci *state)
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{
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struct ddb_link *link = state->base->link;
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u32 status = 0;
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u32 timeout = 40;
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ddblwritel(link, MCI_CONTROL_RESET, MCI_CONTROL);
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ddblwritel(link, 0, MCI_CONTROL + 4); /* 1= no internal init */
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msleep(300);
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ddblwritel(link, 0, MCI_CONTROL);
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while(1) {
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status = ddblreadl(link, MCI_CONTROL);
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if ((status & MCI_CONTROL_READY) == MCI_CONTROL_READY)
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break;
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if (--timeout == 0)
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break;
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msleep(50);
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}
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if ((status & MCI_CONTROL_READY) == 0 )
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return -1;
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if (link->ids.device == 0x0009)
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ddblwritel(link, SX8_TSCONFIG_MODE_NORMAL, SX8_TSCONFIG);
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return 0;
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}
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static int mci_config(struct mci *state, u32 config)
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{
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struct ddb_link *link = state->base->link;
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if (link->ids.device != 0x0009)
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return -EINVAL;
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ddblwritel(link, config, SX8_TSCONFIG);
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return 0;
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}
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static int _mci_cmd_unlocked(struct mci *state,
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u32 *cmd, u32 cmd_len,
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u32 *res, u32 res_len)
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{
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struct ddb_link *link = state->base->link;
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u32 i, val;
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unsigned long stat;
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val = ddblreadl(link, MCI_CONTROL);
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if (val & (MCI_CONTROL_RESET | MCI_CONTROL_START_COMMAND))
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return -EIO;
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if (cmd && cmd_len)
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for (i = 0; i < cmd_len; i++)
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ddblwritel(link, cmd[i], MCI_COMMAND + i * 4);
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val |= (MCI_CONTROL_START_COMMAND | MCI_CONTROL_ENABLE_DONE_INTERRUPT);
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ddblwritel(link, val, MCI_CONTROL);
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stat = wait_for_completion_timeout(&state->base->completion, HZ);
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if (stat == 0) {
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printk("MCI timeout\n");
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return -EIO;
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}
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if (res && res_len)
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for (i = 0; i < res_len; i++)
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res[i] = ddblreadl(link, MCI_RESULT + i * 4);
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return 0;
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}
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static int mci_cmd_unlocked(struct mci *state,
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struct mci_command *command,
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struct mci_result *result)
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{
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u32 *cmd = (u32 *) command;
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u32 *res = (u32 *) result;
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return _mci_cmd_unlocked(state, cmd, sizeof(*command)/sizeof(u32),
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res, sizeof(*result)/sizeof(u32));
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}
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static int mci_cmd(struct mci *state,
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struct mci_command *command,
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struct mci_result *result)
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{
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int stat;
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mutex_lock(&state->base->mci_lock);
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stat = _mci_cmd_unlocked(state,
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(u32 *)command, sizeof(*command)/sizeof(u32),
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(u32 *)result, sizeof(*result)/sizeof(u32));
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mutex_unlock(&state->base->mci_lock);
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return stat;
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}
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static int _mci_cmd(struct mci *state,
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struct mci_command *command, u32 command_len,
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struct mci_result *result, u32 result_len)
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{
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int stat;
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mutex_lock(&state->base->mci_lock);
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stat = _mci_cmd_unlocked(state,
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(u32 *)command, command_len,
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(u32 *)result, result_len);
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mutex_unlock(&state->base->mci_lock);
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return stat;
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}
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static void mci_handler(void *priv)
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{
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struct mci_base *base = (struct mci_base *)priv;
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complete(&base->completion);
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}
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static const u8 dvbs2_bits_per_symbol[] = {
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0, 0, 0, 0,
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/* S2 QPSK */
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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/* S2 8PSK */
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3,
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/* S2 16APSK */
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
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4, 4, 4, 4, 4, 4, 4, 4,
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/* S2 32APSK */
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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3, 0, 4, 0,
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2, 2, 2, 2, 2, 2, // S2X QPSK
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // S2X 8PSK
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, // S2X 16APSK
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, // S2X 32APSK
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6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, // S2X 64APSK
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7, 7, 7, 7, // S2X 128APSK
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8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, // S2X 256APSK
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, // S2X QPSK
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3, 3, 3, 3, 3, 3, 3, 3, // S2X 8PSK
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4, // S2X 16APSK
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5, 5, 5, 5, // S2X 32APSK
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3, 4, 5, 6, 8, 10,
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};
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static void release(struct dvb_frontend *fe)
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{
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struct mci *state = fe->demodulator_priv;
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state->base->count--;
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if (state->base->count == 0) {
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list_del(&state->base->mci_list);
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kfree(state->base);
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}
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kfree(state);
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}
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static int get_info(struct dvb_frontend *fe)
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{
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int stat;
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struct mci *state = fe->demodulator_priv;
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struct mci_command cmd;
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memset(&cmd, 0, sizeof(cmd));
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cmd.command = MCI_CMD_GETSIGNALINFO;
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cmd.demod = state->demod;
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stat = mci_cmd(state, &cmd, &state->signal_info);
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return stat;
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}
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static int read_status(struct dvb_frontend *fe, enum fe_status *status)
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{
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int stat;
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struct mci *state = fe->demodulator_priv;
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struct mci_command cmd;
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u32 val;
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struct mci_result *res = (struct mci_result *)&val;
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cmd.command = MCI_CMD_GETSTATUS;
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cmd.demod = state->demod;
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stat = _mci_cmd(state, &cmd, 1, res, 1);
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if (stat)
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return stat;
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if (res->status == SX8_DEMOD_LOCKED)
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*status = 0x1f;
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else
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*status = 0;
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return stat;
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}
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static int mci_set_tuner(struct dvb_frontend *fe, u32 tuner, u32 on)
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{
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struct mci *state = fe->demodulator_priv;
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struct mci_command cmd;
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memset(&cmd, 0, sizeof(cmd));
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cmd.tuner = state->tuner;
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cmd.command = on ? SX8_CMD_INPUT_ENABLE : SX8_CMD_INPUT_DISABLE;
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return mci_cmd(state, &cmd, NULL);
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}
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static int stop(struct dvb_frontend *fe)
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{
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struct mci *state = fe->demodulator_priv;
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struct mci_command cmd;
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u32 input = state->tuner;
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memset(&cmd, 0, sizeof(cmd));
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if (state->demod != 0xff) {
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cmd.command = MCI_CMD_STOP;
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cmd.demod = state->demod;
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mci_cmd(state, &cmd, NULL);
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if (state->base->iq_mode) {
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cmd.command = MCI_CMD_STOP;
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cmd.demod = state->demod;
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cmd.output = 0;
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mci_cmd(state, &cmd, NULL);
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mci_config(state, SX8_TSCONFIG_MODE_NORMAL);
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}
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}
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mutex_lock(&state->base->tuner_lock);
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state->base->tuner_use_count[input]--;
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if (!state->base->tuner_use_count[input])
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mci_set_tuner(fe, input, 0);
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state->base->demod_in_use[state->demod] = 0;
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state->base->used_ldpc_bitrate[state->nr] = 0;
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state->demod = 0xff;
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state->base->assigned_demod[state->nr] = 0xff;
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state->base->iq_mode = 0;
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mutex_unlock(&state->base->tuner_lock);
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state->started = 0;
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return 0;
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}
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static int start(struct dvb_frontend *fe, u32 flags, u32 modmask, u32 ts_config)
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{
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struct mci *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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static const u32 MAX_DEMOD_LDPC_BITRATE = (1550000000 / 6);
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u32 used_ldpc_bitrate = 0, free_ldpc_bitrate;
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u32 used_demods = 0;
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struct mci_command cmd;
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u32 input = state->tuner;
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u32 bits_per_symbol = 0;
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int i, stat = 0;
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if (p->symbol_rate >= MCLK / 2)
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flags &= ~1;
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if ((flags & 3) == 0)
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return -EINVAL;
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if (flags & 2) {
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u32 tmp = modmask;
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bits_per_symbol = 1;
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while (tmp & 1) {
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tmp >>= 1;
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bits_per_symbol++;
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}
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}
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mutex_lock(&state->base->tuner_lock);
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if (state->base->iq_mode) {
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stat = -EBUSY;
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goto unlock;
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}
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for (i = 0; i < 8; i++) {
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used_ldpc_bitrate += state->base->used_ldpc_bitrate[i];
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if (state->base->demod_in_use[i])
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used_demods++;
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}
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if ((used_ldpc_bitrate >= MAX_LDPC_BITRATE) ||
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((ts_config & SX8_TSCONFIG_MODE_MASK) >
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SX8_TSCONFIG_MODE_NORMAL && used_demods > 0)) {
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stat = -EBUSY;
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goto unlock;
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}
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free_ldpc_bitrate = MAX_LDPC_BITRATE - used_ldpc_bitrate;
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if (free_ldpc_bitrate > MAX_DEMOD_LDPC_BITRATE)
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free_ldpc_bitrate = MAX_DEMOD_LDPC_BITRATE;
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while (p->symbol_rate * bits_per_symbol > free_ldpc_bitrate)
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bits_per_symbol--;
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if (bits_per_symbol < 2) {
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stat = -EBUSY;
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goto unlock;
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}
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i = (p->symbol_rate > MCLK / 2) ? 3 : 7;
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while (i >= 0 && state->base->demod_in_use[i])
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i--;
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if (i < 0) {
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stat = -EBUSY;
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goto unlock;
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}
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state->base->demod_in_use[i] = 1;
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state->base->used_ldpc_bitrate[state->nr] = p->symbol_rate * bits_per_symbol;
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state->demod = state->base->assigned_demod[state->nr] = i;
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if (!state->base->tuner_use_count[input])
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mci_set_tuner(fe, input, 1);
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state->base->tuner_use_count[input]++;
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state->base->iq_mode = (ts_config > 1);
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unlock:
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mutex_unlock(&state->base->tuner_lock);
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if (stat)
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return stat;
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memset(&cmd, 0, sizeof(cmd));
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if (state->base->iq_mode) {
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cmd.command = SX8_CMD_SELECT_IQOUT;
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cmd.demod = state->demod;
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cmd.output = 0;
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mci_cmd(state, &cmd, NULL);
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mci_config(state, ts_config);
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}
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if (p->stream_id != NO_STREAM_ID_FILTER && p->stream_id != 0x80000000)
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flags |= 0x80;
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printk("frontend %u: tuner=%u demod=%u\n", state->nr, state->tuner, state->demod);
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cmd.command = MCI_CMD_SEARCH_DVBS;
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cmd.dvbs2_search.flags = flags;
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cmd.dvbs2_search.s2_modulation_mask = modmask & ((1 << (bits_per_symbol - 1)) - 1);
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cmd.dvbs2_search.retry = 2;
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cmd.dvbs2_search.frequency = p->frequency * 1000;
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cmd.dvbs2_search.symbol_rate = p->symbol_rate;
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cmd.dvbs2_search.scrambling_sequence_index =
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p->scrambling_sequence_index;
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cmd.dvbs2_search.input_stream_id = p->stream_id;
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cmd.tuner = state->tuner;
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cmd.demod = state->demod;
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cmd.output = state->nr;
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if (p->stream_id == 0x80000000)
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cmd.output |= 0x80;
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stat = mci_cmd(state, &cmd, NULL);
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if (stat)
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stop(fe);
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return stat;
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}
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static int start_iq(struct dvb_frontend *fe, u32 ts_config)
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{
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struct mci *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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static const u32 MAX_DEMOD_LDPC_BITRATE = (1550000000 / 6);
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u32 used_ldpc_bitrate = 0, free_ldpc_bitrate;
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u32 used_demods = 0;
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struct mci_command cmd;
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u32 input = state->tuner;
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int i, stat = 0;
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mutex_lock(&state->base->tuner_lock);
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if (state->base->iq_mode) {
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stat = -EBUSY;
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goto unlock;
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}
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for (i = 0; i < 8; i++)
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if (state->base->demod_in_use[i])
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used_demods++;
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if (used_demods > 0) {
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stat = -EBUSY;
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goto unlock;
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}
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state->demod = state->base->assigned_demod[state->nr] = 0;
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if (!state->base->tuner_use_count[input])
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mci_set_tuner(fe, input, 1);
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state->base->tuner_use_count[input]++;
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state->base->iq_mode = (ts_config > 1);
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unlock:
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mutex_unlock(&state->base->tuner_lock);
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if (stat)
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return stat;
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memset(&cmd, 0, sizeof(cmd));
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cmd.command = SX8_CMD_START_IQ;
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cmd.dvbs2_search.frequency = p->frequency * 1000;
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cmd.dvbs2_search.symbol_rate = p->symbol_rate;
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cmd.tuner = state->tuner;
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cmd.demod = state->demod;
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cmd.output = 7;
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mci_config(state, ts_config);
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stat = mci_cmd(state, &cmd, NULL);
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if (stat)
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stop(fe);
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return stat;
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}
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static int set_parameters(struct dvb_frontend *fe)
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{
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int stat = 0;
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struct mci *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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u32 ts_config, iq_mode = 0, isi;
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if (state->started)
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stop(fe);
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isi = p->stream_id;
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if (isi != NO_STREAM_ID_FILTER) {
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iq_mode = (isi & 0x30000000) >> 28;
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}
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switch (iq_mode) {
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case 1:
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ts_config = (SX8_TSCONFIG_TSHEADER|SX8_TSCONFIG_MODE_IQ);
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break;
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case 2:
|
|
ts_config = (SX8_TSCONFIG_TSHEADER|SX8_TSCONFIG_MODE_IQ);
|
|
break;
|
|
default:
|
|
ts_config = SX8_TSCONFIG_MODE_NORMAL;
|
|
break;
|
|
}
|
|
if (iq_mode != 2) {
|
|
u32 flags = 3;
|
|
u32 mask = 3;
|
|
|
|
if (p->modulation == APSK_16 ||
|
|
p->modulation == APSK_32) {
|
|
flags = 2;
|
|
mask = 15;
|
|
}
|
|
stat = start(fe, flags, mask, ts_config);
|
|
} else {
|
|
stat = start_iq(fe, ts_config);
|
|
}
|
|
if (!stat) {
|
|
state->started = 1;
|
|
state->first_time_lock = 1;
|
|
state->signal_info.status = SX8_DEMOD_WAIT_SIGNAL;
|
|
}
|
|
return stat;
|
|
}
|
|
|
|
static int tune(struct dvb_frontend *fe, bool re_tune,
|
|
unsigned int mode_flags,
|
|
unsigned int *delay, enum fe_status *status)
|
|
{
|
|
int r;
|
|
|
|
if (re_tune) {
|
|
r = set_parameters(fe);
|
|
if (r)
|
|
return r;
|
|
}
|
|
r = read_status(fe, status);
|
|
if (r)
|
|
return r;
|
|
|
|
if (*status & FE_HAS_LOCK)
|
|
return 0;
|
|
*delay = HZ / 10;
|
|
return 0;
|
|
}
|
|
|
|
static int get_algo(struct dvb_frontend *fe)
|
|
{
|
|
return DVBFE_ALGO_HW;
|
|
}
|
|
|
|
static int set_input(struct dvb_frontend *fe, int input)
|
|
{
|
|
struct mci *state = fe->demodulator_priv;
|
|
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
|
|
|
|
state->tuner = p->input = input;
|
|
printk("fe %u, input = %u\n", state->nr, input);
|
|
return 0;
|
|
}
|
|
|
|
static int sleep(struct dvb_frontend *fe)
|
|
{
|
|
struct mci *state = fe->demodulator_priv;
|
|
|
|
}
|
|
|
|
static int get_snr(struct dvb_frontend *fe)
|
|
{
|
|
struct mci *state = fe->demodulator_priv;
|
|
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
|
|
s32 snr;
|
|
|
|
get_info(fe);
|
|
p->cnr.len = 1;
|
|
p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
|
|
p->cnr.stat[0].svalue = (s64) state->signal_info.dvbs2_signal_info.signal_to_noise * 100;
|
|
return 0;
|
|
}
|
|
|
|
static int get_strength(struct dvb_frontend *fe)
|
|
{
|
|
struct mci *state = fe->demodulator_priv;
|
|
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
|
|
s32 str;
|
|
|
|
get_info(fe);
|
|
str = 100000 - (state->signal_info.dvbs2_signal_info.channel_power * 10 + 108750);
|
|
p->strength.len = 1;
|
|
p->strength.stat[0].scale = FE_SCALE_DECIBEL;
|
|
p->strength.stat[0].svalue = str;
|
|
return 0;
|
|
}
|
|
|
|
static struct dvb_frontend_ops mci_ops = {
|
|
.delsys = { SYS_DVBS, SYS_DVBS2 },
|
|
.info = {
|
|
.name = "DVB-S/S2X",
|
|
.frequency_min = 950000,
|
|
.frequency_max = 2150000,
|
|
.frequency_stepsize = 0,
|
|
.frequency_tolerance = 0,
|
|
.symbol_rate_min = 100000,
|
|
.symbol_rate_max = 100000000,
|
|
.caps = FE_CAN_INVERSION_AUTO |
|
|
FE_CAN_FEC_AUTO |
|
|
FE_CAN_QPSK |
|
|
FE_CAN_2G_MODULATION |
|
|
FE_CAN_MULTISTREAM,
|
|
},
|
|
.get_frontend_algo = get_algo,
|
|
.tune = tune,
|
|
.release = release,
|
|
.read_status = read_status,
|
|
.set_input = set_input,
|
|
};
|
|
|
|
static struct mci_base *match_base(void *key)
|
|
{
|
|
struct mci_base *p;
|
|
|
|
list_for_each_entry(p, &mci_list, mci_list)
|
|
if (p->key == key)
|
|
return p;
|
|
return NULL;
|
|
}
|
|
|
|
static int probe(struct mci *state)
|
|
{
|
|
mci_reset(state);
|
|
return 0;
|
|
}
|
|
|
|
struct dvb_frontend *ddb_mci_attach(struct ddb_input *input, int mci_type, int nr)
|
|
{
|
|
struct ddb_port *port = input->port;
|
|
struct ddb *dev = port->dev;
|
|
struct ddb_link *link = &dev->link[port->lnr];
|
|
struct mci_base *base;
|
|
struct mci *state;
|
|
void *key = mci_type ? (void *) port : (void *) link;
|
|
|
|
state = kzalloc(sizeof(*state), GFP_KERNEL);
|
|
if (!state)
|
|
return NULL;
|
|
|
|
base = match_base(key);
|
|
if (base) {
|
|
base->count++;
|
|
state->base = base;
|
|
} else {
|
|
base = kzalloc(sizeof(*base), GFP_KERNEL);
|
|
if (!base)
|
|
goto fail;
|
|
base->key = key;
|
|
base->count = 1;
|
|
base->link = link;
|
|
mutex_init(&base->mci_lock);
|
|
mutex_init(&base->tuner_lock);
|
|
ddb_irq_set(dev, link->nr, 0, mci_handler, base);
|
|
init_completion(&base->completion);
|
|
state->base = base;
|
|
if (probe(state) < 0) {
|
|
kfree(base);
|
|
goto fail;
|
|
}
|
|
list_add(&base->mci_list, &mci_list);
|
|
}
|
|
state->fe.ops = mci_ops;
|
|
state->fe.demodulator_priv = state;
|
|
state->nr = nr;
|
|
|
|
state->tuner = nr;
|
|
state->demod = nr;
|
|
|
|
return &state->fe;
|
|
fail:
|
|
kfree(state);
|
|
return NULL;
|
|
}
|
|
|