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			90 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			90 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
OctopusNet
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Hardware:
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- SoC Atmel SAM9G45 400MHz ARM 926
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  64 MB DRAM
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  256 MB NAND flash
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- FPGA Lattice ECP3 17
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  data flash
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- 5 port switch Marvell 88E6175R
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The FPGA is connected to the memory bus of the G45 and maps control registers into the memory space
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of the G45. This is mainly to control the data flow on the FPGA. Only minimal data can be transferred
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(e.g. single sections). Transport streams cannot be transferred to the G45 this way!
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The FPGA can receive up to 8 TS from up to 4 Duo-Flex cards. You can also can alternatively connect
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CI modules to port 2 and 3 (TAP 3 and 4).
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The FPGA is also connected to one of the ports of the gigabit switch.
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There are up to 12 channels. Each channel can select one input TS, which is then passed through
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a PID filter (8192 bit array) and sent to the switch as a UDP/RTP stream.
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The G45 is connected to another port of the switch (but only with 100 MBit)
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Booting:
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The G45 does not boot from the NAND flash but from the dataflash connected to the FPGA. The G45
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does not support error correction for the boot sector and NAND with zero error boot pages
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is no longer easily available.
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Newer Atmel SoCs support 4-bit error correction in boot ROM but not the G45.
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So, the G45 boot looks like this:
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- Run a minimal boot rom mapped by the FPGA.
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- Boot rom loads a modified bootstrap via SPI (provided via FPGA ports) from the dataflash.
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- Bootstrap loads u-boot via SPI from dataflash.
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- u-boot boots Linux ...
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If you remove jumper XX, boot rom is disabled and the G45 will boot from NAND flash like this:
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- Internal G45 boot rom bootstrap from NAND flash.
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- Bootstrap boots u-boot from NAND flash
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- u-boot boots Linux ...
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This is just a fall-back since page 0 can contain errors which cannot be corrected by the G45 boot ROM
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and the bootstrap code which loads u-boot also does not contain error correction.
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- SPI dataflash
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0x000000 - 0x003fff FPGA config data
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0x004000 - 0x005fff G45 bootstrap
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0x010000 - 0x0affff FPGA bitstream
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0x0b0000 - 0x15ffff G45 u-boot
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0x160000 - 0x1fefff FPGA golden image
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0x1ff000 - 0x1fffff FPGA jump to golden image
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- NAND flash 256MB, block size 128K (0x20000)
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0x00000000 - 0x0001ffff G45 bootstrap (fallback bootstrap if SPI corrupted, pull jumper to use)
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0x00020000 - 0x0007ffff G45 u-boot (fallback u-boot if SPI corrupted)
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0x00080000 - 0x0009ffff spare (e.g. for bigger u-boot)
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0x000a0000 - 0x000bffff G45 u-boot environment
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0x000c0000 - 0x000dffff G45 u-boot redundant environment
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0x000e0000 - 0x000fffff spare
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0x00100000 - 0x01ffffff G45 Linux recovery
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0x02000000 - 0x0fffffff Linux UBI
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