mirror of
https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
680 lines
18 KiB
C
680 lines
18 KiB
C
/*
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* ddbridge.c: Digital Devices PCIe bridge driver
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*
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* Copyright (C) 2010-2015 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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*
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA
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* Or, point your browser to http://www.gnu.org/copyleft/gpl.html
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*/
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#define DDB_USE_WORK
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/*#define DDB_TEST_THREADED*/
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#include "ddbridge.h"
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#include "ddbridge-regs.h"
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static struct workqueue_struct *ddb_wq;
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static int adapter_alloc;
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module_param(adapter_alloc, int, 0444);
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MODULE_PARM_DESC(adapter_alloc,
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"0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
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#ifdef CONFIG_PCI_MSI
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static int msi = 1;
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module_param(msi, int, 0444);
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MODULE_PARM_DESC(msi,
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" Control MSI interrupts: 0-disable, 1-enable (default)");
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#endif
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#include "ddbridge-core.c"
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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static void ddb_unmap(struct ddb *dev)
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{
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if (dev->regs)
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iounmap(dev->regs);
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vfree(dev);
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}
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static void __devexit ddb_irq_disable(struct ddb *dev)
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{
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if (dev->link[0].info->regmap->irq_version == 2) {
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_CONTROL);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_1);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_2);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_3);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_4);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_5);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_6);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_7);
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} else {
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ddbwritel(dev, 0, INTERRUPT_ENABLE);
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ddbwritel(dev, 0, MSI1_ENABLE);
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}
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}
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static void __devexit ddb_irq_exit(struct ddb *dev)
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{
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ddb_irq_disable(dev);
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if (dev->msi == 2)
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free_irq(dev->pdev->irq + 1, dev);
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free_irq(dev->pdev->irq, dev);
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#ifdef CONFIG_PCI_MSI
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if (dev->msi)
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pci_disable_msi(dev->pdev);
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#endif
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}
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static void __devexit ddb_remove(struct pci_dev *pdev)
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{
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struct ddb *dev = (struct ddb *) pci_get_drvdata(pdev);
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ddb_device_destroy(dev);
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ddb_nsd_detach(dev);
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ddb_ports_detach(dev);
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ddb_i2c_release(dev);
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if (dev->link[0].info->ns_num)
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ddbwritel(dev, 0, ETHER_CONTROL);
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ddb_irq_exit(dev);
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ddb_ports_release(dev);
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ddb_buffers_free(dev);
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ddb_unmap(dev);
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pci_set_drvdata(pdev, NULL);
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pci_disable_device(pdev);
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}
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
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#define __devinit
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#define __devinitdata
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#endif
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static int __devinit ddb_irq_msi(struct ddb *dev, int nr)
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{
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int stat = 0;
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#ifdef CONFIG_PCI_MSI
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if (msi && pci_msi_enabled()) {
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0))
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
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stat = pci_alloc_irq_vectors(dev->pdev, 1, nr, PCI_IRQ_MSI);
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#else
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stat = pci_enable_msi_range(dev->pdev, 1, nr);
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#endif
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if (stat >= 1) {
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dev->msi = stat;
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pr_info("DDBridge: using %d MSI interrupt(s)\n",
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dev->msi);
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} else
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pr_info("DDBridge: MSI not available.\n");
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#else
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stat = pci_enable_msi_block(dev->pdev, nr);
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if (stat == 0) {
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dev->msi = nr;
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pr_info("DDBridge: using %d MSI interrupts\n", nr);
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} else if (stat == 1) {
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stat = pci_enable_msi(dev->pdev);
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dev->msi = 1;
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}
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if (stat < 0)
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pr_info("DDBridge: MSI not available.\n");
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#endif
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}
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return stat;
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}
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static int __devinit ddb_irq_init2(struct ddb *dev)
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{
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int stat;
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int irq_flag = IRQF_SHARED;
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pr_info("DDBridge: init type 2 IRQ hardware block\n");
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_CONTROL);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_1);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_2);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_3);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_4);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_5);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_6);
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ddbwritel(dev, 0x00000000, INTERRUPT_V2_ENABLE_7);
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ddb_irq_msi(dev, 1);
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if (dev->msi)
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irq_flag = 0;
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stat = request_irq(dev->pdev->irq, irq_handler_v2,
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irq_flag, "ddbridge", (void *) dev);
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if (stat < 0)
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return stat;
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ddbwritel(dev, 0x0000ff7f, INTERRUPT_V2_CONTROL);
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ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_1);
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ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_2);
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ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_3);
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ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_4);
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ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_5);
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ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_6);
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ddbwritel(dev, 0xffffffff, INTERRUPT_V2_ENABLE_7);
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return stat;
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}
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static int __devinit ddb_irq_init(struct ddb *dev)
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{
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int stat;
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int irq_flag = IRQF_SHARED;
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if (dev->link[0].info->regmap->irq_version == 2)
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return ddb_irq_init2(dev);
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ddbwritel(dev, 0x00000000, INTERRUPT_ENABLE);
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ddbwritel(dev, 0x00000000, MSI1_ENABLE);
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ddbwritel(dev, 0x00000000, MSI2_ENABLE);
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ddbwritel(dev, 0x00000000, MSI3_ENABLE);
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ddbwritel(dev, 0x00000000, MSI4_ENABLE);
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ddbwritel(dev, 0x00000000, MSI5_ENABLE);
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ddbwritel(dev, 0x00000000, MSI6_ENABLE);
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ddbwritel(dev, 0x00000000, MSI7_ENABLE);
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ddb_irq_msi(dev, 2);
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if (dev->msi)
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irq_flag = 0;
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if (dev->msi == 2) {
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stat = request_irq(dev->pdev->irq, irq_handler0,
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irq_flag, "ddbridge", (void *) dev);
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if (stat < 0)
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return stat;
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stat = request_irq(dev->pdev->irq + 1, irq_handler1,
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irq_flag, "ddbridge", (void *) dev);
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if (stat < 0) {
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free_irq(dev->pdev->irq, dev);
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return stat;
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}
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} else
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#endif
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{
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#ifdef DDB_TEST_THREADED
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stat = request_threaded_irq(dev->pdev->irq, irq_handler,
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irq_thread,
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irq_flag,
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"ddbridge", (void *) dev);
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#else
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stat = request_irq(dev->pdev->irq, irq_handler,
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irq_flag, "ddbridge", (void *) dev);
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#endif
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if (stat < 0)
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return stat;
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}
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/*ddbwritel(dev, 0xffffffff, INTERRUPT_ACK);*/
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if (dev->msi == 2) {
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ddbwritel(dev, 0x0fffff00, INTERRUPT_ENABLE);
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ddbwritel(dev, 0x0000000f, MSI1_ENABLE);
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} else {
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ddbwritel(dev, 0x0fffff0f, INTERRUPT_ENABLE);
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ddbwritel(dev, 0x00000000, MSI1_ENABLE);
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}
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return stat;
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}
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static int __devinit ddb_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct ddb *dev;
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int stat = 0;
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if (pci_enable_device(pdev) < 0)
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return -ENODEV;
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pci_set_master(pdev);
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
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return -ENODEV;
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dev = vzalloc(sizeof(struct ddb));
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if (dev == NULL)
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return -ENOMEM;
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mutex_init(&dev->mutex);
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dev->has_dma = 1;
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dev->pdev = pdev;
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dev->dev = &pdev->dev;
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pci_set_drvdata(pdev, dev);
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dev->link[0].ids.vendor = id->vendor;
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dev->link[0].ids.device = id->device;
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dev->link[0].ids.subvendor = id->subvendor;
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dev->link[0].ids.subdevice = id->subdevice;
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dev->link[0].dev = dev;
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#ifdef NUM_IDS
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dev->link[0].info = ddb_infos[id->driver_data];
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#else
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dev->link[0].info = (struct ddb_info *) id->driver_data;
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#endif
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pr_info("DDBridge: device name: %s\n", dev->link[0].info->name);
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dev->regs_len = pci_resource_len(dev->pdev, 0);
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dev->regs = ioremap(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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if (!dev->regs) {
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pr_err("DDBridge: not enough memory for register map\n");
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stat = -ENOMEM;
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goto fail;
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}
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if (ddbreadl(dev, 0) == 0xffffffff) {
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pr_err("DDBridge: cannot read registers\n");
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stat = -ENODEV;
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goto fail;
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}
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dev->link[0].ids.hwid = ddbreadl(dev, 0);
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dev->link[0].ids.regmapid = ddbreadl(dev, 4);
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pr_info("DDBridge: HW %08x REGMAP %08x\n",
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dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
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if (dev->link[0].info->ns_num) {
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ddbwritel(dev, 0, ETHER_CONTROL);
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ddb_reset_ios(dev);
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}
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ddbwritel(dev, 0, DMA_BASE_READ);
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if (dev->link[0].info->type != DDB_MOD)
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ddbwritel(dev, 0, DMA_BASE_WRITE);
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if (dev->link[0].info->type == DDB_MOD) {
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if (ddbreadl(dev, 0x1c) == 4)
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dev->link[0].info->port_num = 4;
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}
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stat = ddb_irq_init(dev);
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if (stat < 0)
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goto fail0;
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if (ddb_init(dev) == 0)
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return 0;
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ddb_irq_exit(dev);
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fail0:
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pr_err("DDBridge: fail0\n");
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if (dev->msi)
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pci_disable_msi(dev->pdev);
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fail:
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pr_err("DDBridge: fail\n");
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ddb_unmap(dev);
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pci_set_drvdata(pdev, NULL);
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pci_disable_device(pdev);
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return -1;
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}
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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static struct ddb_info ddb_none = {
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.type = DDB_NONE,
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.name = "unknown Digital Devices PCIe card, install newer driver",
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.regmap = &octopus_map,
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};
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static struct ddb_info ddb_octopus = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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};
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static struct ddb_info ddb_octopusv3 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus V3 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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};
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static struct ddb_info ddb_octopus_le = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus LE DVB adapter",
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.regmap = &octopus_map,
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.port_num = 2,
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.i2c_mask = 0x03,
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};
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static struct ddb_info ddb_octopus_oem = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus OEM",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.led_num = 1,
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.fan_num = 1,
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.temp_num = 1,
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.temp_bus = 0,
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};
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static struct ddb_info ddb_octopus_mini = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus Mini",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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};
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static struct ddb_info ddb_v6 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine S2 V6 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 3,
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.i2c_mask = 0x07,
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};
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static struct ddb_info ddb_v6_5 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine S2 V6.5 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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};
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static struct ddb_info ddb_v7a = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine S2 V7 Advanced DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 2,
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.board_control_2 = 4,
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.ts_quirks = TS_QUIRK_REVERSED,
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};
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static struct ddb_info ddb_v7 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine S2 V7 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 2,
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.board_control_2 = 4,
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.ts_quirks = TS_QUIRK_REVERSED,
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};
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static struct ddb_info ddb_ctv7 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine CT V7 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 3,
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.board_control_2 = 4,
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};
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static struct ddb_info ddb_satixS2v3 = {
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.type = DDB_OCTOPUS,
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.name = "Mystique SaTiX-S2 V3 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 3,
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.i2c_mask = 0x07,
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};
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static struct ddb_info ddb_ci = {
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.type = DDB_OCTOPUS_CI,
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.name = "Digital Devices Octopus CI",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x03,
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};
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static struct ddb_info ddb_cis = {
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.type = DDB_OCTOPUS_CI,
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.name = "Digital Devices Octopus CI single",
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.regmap = &octopus_map,
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.port_num = 3,
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.i2c_mask = 0x03,
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};
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static struct ddb_info ddb_ci_s2_pro = {
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.type = DDB_OCTOPUS_CI,
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.name = "Digital Devices Octopus CI S2 Pro",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x01,
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.board_control = 2,
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.board_control_2 = 4,
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};
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static struct ddb_info ddb_ci_s2_pro_a = {
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.type = DDB_OCTOPUS_CI,
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.name = "Digital Devices Octopus CI S2 Pro Advanced",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x01,
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.board_control = 2,
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.board_control_2 = 4,
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};
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static struct ddb_info ddb_dvbct = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices DVBCT V6.1 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 3,
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.i2c_mask = 0x07,
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};
|
|
|
|
/****************************************************************************/
|
|
|
|
static struct ddb_info ddb_mod = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices DVB-C modulator",
|
|
.regmap = &octopus_mod_map,
|
|
.port_num = 10,
|
|
.temp_num = 1,
|
|
};
|
|
|
|
static struct ddb_info ddb_mod_fsm_24 = {
|
|
.type = DDB_MOD,
|
|
.version = 2,
|
|
.name = "Digital Devices DVB-C modulator FSM-24",
|
|
.regmap = &octopus_mod_2_map,
|
|
.port_num = 24,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
};
|
|
|
|
static struct ddb_info ddb_mod_fsm_16 = {
|
|
.type = DDB_MOD,
|
|
.version = 2,
|
|
.name = "Digital Devices DVB-C modulator FSM-16",
|
|
.regmap = &octopus_mod_2_map,
|
|
.port_num = 16,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
};
|
|
|
|
static struct ddb_info ddb_mod_fsm_8 = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices DVB-C modulator FSM-8",
|
|
.version = 2,
|
|
.regmap = &octopus_mod_2_map,
|
|
.port_num = 8,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
};
|
|
|
|
static struct ddb_info ddb_sdr = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices SDR",
|
|
.version = 3,
|
|
.regmap = &octopus_sdr_map,
|
|
.port_num = 16,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
};
|
|
|
|
static struct ddb_info ddb_octopro_hdin = {
|
|
.type = DDB_OCTOPRO_HDIN,
|
|
.name = "Digital Devices OctopusNet Pro HDIN",
|
|
.regmap = &octopro_hdin_map,
|
|
.port_num = 10,
|
|
.i2c_mask = 0x3ff,
|
|
.mdio_num = 1,
|
|
};
|
|
|
|
static struct ddb_info ddb_octopro = {
|
|
.type = DDB_OCTOPRO,
|
|
.name = "Digital Devices OctopusNet Pro",
|
|
.regmap = &octopro_map,
|
|
.port_num = 10,
|
|
.i2c_mask = 0x3ff,
|
|
.mdio_num = 1,
|
|
};
|
|
|
|
/****************************************************************************/
|
|
/****************************************************************************/
|
|
/****************************************************************************/
|
|
|
|
#define DDB_DEVICE(_device, _subdevice, _driver_data) { \
|
|
PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, _subdevice), \
|
|
.driver_data = (kernel_ulong_t) &_driver_data }
|
|
|
|
#define DDB_DEVICE_ANY(_device) { \
|
|
PCI_DEVICE_SUB(0xdd01, _device, 0xdd01, PCI_ANY_ID), \
|
|
.driver_data = (kernel_ulong_t) &ddb_none }
|
|
|
|
static const struct pci_device_id ddb_id_table[] __devinitconst = {
|
|
DDB_DEVICE(0x0002, 0x0001, ddb_octopus),
|
|
DDB_DEVICE(0x0003, 0x0001, ddb_octopus),
|
|
DDB_DEVICE(0x0005, 0x0004, ddb_octopusv3),
|
|
DDB_DEVICE(0x0003, 0x0002, ddb_octopus_le),
|
|
DDB_DEVICE(0x0003, 0x0003, ddb_octopus_oem),
|
|
DDB_DEVICE(0x0003, 0x0010, ddb_octopus_mini),
|
|
DDB_DEVICE(0x0005, 0x0011, ddb_octopus_mini),
|
|
DDB_DEVICE(0x0003, 0x0020, ddb_v6),
|
|
DDB_DEVICE(0x0003, 0x0021, ddb_v6_5),
|
|
DDB_DEVICE(0x0006, 0x0022, ddb_v7),
|
|
DDB_DEVICE(0x0006, 0x0024, ddb_v7a),
|
|
DDB_DEVICE(0x0003, 0x0030, ddb_dvbct),
|
|
DDB_DEVICE(0x0003, 0xdb03, ddb_satixS2v3),
|
|
DDB_DEVICE(0x0006, 0x0031, ddb_ctv7),
|
|
DDB_DEVICE(0x0006, 0x0032, ddb_ctv7),
|
|
DDB_DEVICE(0x0006, 0x0033, ddb_ctv7),
|
|
DDB_DEVICE(0x0007, 0x0023, ddb_s2_48),
|
|
DDB_DEVICE(0x0008, 0x0034, ddb_ct2_8),
|
|
DDB_DEVICE(0x0008, 0x0035, ddb_c2t2_8),
|
|
DDB_DEVICE(0x0008, 0x0036, ddb_isdbt_8),
|
|
DDB_DEVICE(0x0008, 0x0037, ddb_c2t2i_v0_8),
|
|
DDB_DEVICE(0x0008, 0x0038, ddb_c2t2i_8),
|
|
DDB_DEVICE(0x0006, 0x0039, ddb_ctv7),
|
|
DDB_DEVICE(0x0011, 0x0040, ddb_ci),
|
|
DDB_DEVICE(0x0011, 0x0041, ddb_cis),
|
|
DDB_DEVICE(0x0012, 0x0042, ddb_ci),
|
|
DDB_DEVICE(0x0013, 0x0043, ddb_ci_s2_pro),
|
|
DDB_DEVICE(0x0013, 0x0044, ddb_ci_s2_pro_a),
|
|
DDB_DEVICE(0x0201, 0x0001, ddb_mod),
|
|
DDB_DEVICE(0x0201, 0x0002, ddb_mod),
|
|
DDB_DEVICE(0x0203, 0x0001, ddb_mod),
|
|
DDB_DEVICE(0x0210, 0x0001, ddb_mod_fsm_24),
|
|
DDB_DEVICE(0x0210, 0x0002, ddb_mod_fsm_16),
|
|
DDB_DEVICE(0x0210, 0x0003, ddb_mod_fsm_8),
|
|
DDB_DEVICE(0x0220, 0x0001, ddb_sdr),
|
|
/* testing on OctopusNet Pro */
|
|
DDB_DEVICE(0x0320, PCI_ANY_ID, ddb_octopro_hdin),
|
|
DDB_DEVICE(0x0321, PCI_ANY_ID, ddb_none),
|
|
DDB_DEVICE(0x0322, PCI_ANY_ID, ddb_octopro),
|
|
DDB_DEVICE(0x0323, PCI_ANY_ID, ddb_none),
|
|
DDB_DEVICE(0x0328, PCI_ANY_ID, ddb_none),
|
|
DDB_DEVICE(0x0329, PCI_ANY_ID, ddb_octopro_hdin),
|
|
/* in case sub-ids got deleted in flash */
|
|
DDB_DEVICE_ANY(0x0003),
|
|
DDB_DEVICE_ANY(0x0005),
|
|
DDB_DEVICE_ANY(0x0006),
|
|
DDB_DEVICE_ANY(0x0007),
|
|
DDB_DEVICE_ANY(0x0008),
|
|
DDB_DEVICE_ANY(0x0011),
|
|
DDB_DEVICE_ANY(0x0012),
|
|
DDB_DEVICE_ANY(0x0013),
|
|
DDB_DEVICE_ANY(0x0201),
|
|
DDB_DEVICE_ANY(0x0203),
|
|
DDB_DEVICE_ANY(0x0210),
|
|
DDB_DEVICE_ANY(0x0220),
|
|
DDB_DEVICE_ANY(0x0320),
|
|
DDB_DEVICE_ANY(0x0321),
|
|
DDB_DEVICE_ANY(0x0322),
|
|
DDB_DEVICE_ANY(0x0323),
|
|
DDB_DEVICE_ANY(0x0328),
|
|
DDB_DEVICE_ANY(0x0329),
|
|
{0}
|
|
};
|
|
MODULE_DEVICE_TABLE(pci, ddb_id_table);
|
|
|
|
static struct pci_driver ddb_pci_driver = {
|
|
.name = "ddbridge",
|
|
.id_table = ddb_id_table,
|
|
.probe = ddb_probe,
|
|
.remove = ddb_remove,
|
|
};
|
|
|
|
static __init int module_init_ddbridge(void)
|
|
{
|
|
int stat = -1;
|
|
|
|
pr_info("DDBridge: Digital Devices PCIE bridge driver "
|
|
DDBRIDGE_VERSION
|
|
", Copyright (C) 2010-16 Digital Devices GmbH\n");
|
|
if (ddb_class_create() < 0)
|
|
return -1;
|
|
ddb_wq = create_workqueue("ddbridge");
|
|
if (ddb_wq == NULL)
|
|
goto exit1;
|
|
stat = pci_register_driver(&ddb_pci_driver);
|
|
if (stat < 0)
|
|
goto exit2;
|
|
return stat;
|
|
exit2:
|
|
destroy_workqueue(ddb_wq);
|
|
exit1:
|
|
ddb_class_destroy();
|
|
return stat;
|
|
}
|
|
|
|
static __exit void module_exit_ddbridge(void)
|
|
{
|
|
pci_unregister_driver(&ddb_pci_driver);
|
|
destroy_workqueue(ddb_wq);
|
|
ddb_class_destroy();
|
|
}
|
|
|
|
module_init(module_init_ddbridge);
|
|
module_exit(module_exit_ddbridge);
|
|
|
|
MODULE_DESCRIPTION("Digital Devices PCIe Bridge");
|
|
MODULE_AUTHOR("Ralph and Marcus Metzler, Metzler Brothers Systementwicklung GbR");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_VERSION(DDBRIDGE_VERSION);
|