mirror of
https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
906 lines
21 KiB
C
906 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* ddbridge-hw.c: Digital Devices device information tables
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*
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* Copyright (C) 2010-2017 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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*
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "ddbridge.h"
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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static const struct ddb_regset octopus_mod_odma = {
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.base = 0x300,
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.num = 0x0a,
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.size = 0x10,
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};
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static const struct ddb_regset octopus_mod_odma_buf = {
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.base = 0x2000,
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.num = 0x0a,
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.size = 0x100,
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};
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static const struct ddb_regset octopus_mod_channel = {
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.base = 0x400,
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.num = 0x0a,
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.size = 0x40,
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};
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/****************************************************************************/
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static const struct ddb_regset octopus_mod_2_odma = {
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.base = 0x400,
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.num = 0x18,
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.size = 0x10,
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};
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static const struct ddb_regset octopus_mod_2_odma_buf = {
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.base = 0x8000,
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.num = 0x18,
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.size = 0x100,
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};
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static const struct ddb_regset octopus_mod_2_channel = {
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.base = 0x800,
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.num = 0x18,
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.size = 0x40,
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};
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static const struct ddb_regset octopus_sdr_output = {
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.base = 0x240,
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.num = 0x14,
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.size = 0x10,
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};
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/****************************************************************************/
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static const struct ddb_regset octopus_input = {
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.base = 0x200,
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.num = 0x08,
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.size = 0x10,
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};
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static const struct ddb_regset octopus_output = {
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.base = 0x280,
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.num = 0x08,
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.size = 0x10,
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};
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static const struct ddb_regset octopus_idma = {
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.base = 0x300,
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.num = 0x08,
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.size = 0x10,
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};
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static const struct ddb_regset octopus_idma_buf = {
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.base = 0x2000,
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.num = 0x08,
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.size = 0x100,
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};
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static const struct ddb_regset octopus_odma = {
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.base = 0x380,
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.num = 0x04,
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.size = 0x10,
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};
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static const struct ddb_regset octopus_odma_buf = {
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.base = 0x2800,
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.num = 0x04,
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.size = 0x100,
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};
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static const struct ddb_regset octopus_i2c = {
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.base = 0x80,
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.num = 0x04,
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.size = 0x20,
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};
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static const struct ddb_regset octopus_i2c_buf = {
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.base = 0x1000,
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.num = 0x04,
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.size = 0x200,
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};
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/****************************************************************************/
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static const struct ddb_regset max_mci = {
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.base = 0x500,
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.num = 0x01,
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.size = 0x04,
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};
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static const struct ddb_regset max_mci_buf = {
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.base = 0x600,
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.num = 0x01,
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.size = 0x100,
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};
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static const struct ddb_regset sdr_mci = {
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.base = 0x260,
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.num = 0x01,
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.size = 0x04,
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};
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static const struct ddb_regset sdr_mci_buf = {
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.base = 0x300,
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.num = 0x01,
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.size = 0x100,
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};
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/****************************************************************************/
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static const struct ddb_regset octopro_input = {
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.base = 0x400,
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.num = 0x14,
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.size = 0x10,
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};
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static const struct ddb_regset octopro_output = {
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.base = 0x600,
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.num = 0x0a,
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.size = 0x10,
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};
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static const struct ddb_regset octopro_idma = {
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.base = 0x800,
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.num = 0x40,
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.size = 0x10,
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};
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static const struct ddb_regset octopro_idma_buf = {
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.base = 0x4000,
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.num = 0x40,
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.size = 0x100,
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};
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static const struct ddb_regset octopro_odma = {
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.base = 0xc00,
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.num = 0x20,
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.size = 0x10,
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};
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static const struct ddb_regset octopro_odma_buf = {
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.base = 0x8000,
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.num = 0x20,
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.size = 0x100,
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};
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static const struct ddb_regset octopro_i2c = {
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.base = 0x200,
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.num = 0x0a,
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.size = 0x20,
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};
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static const struct ddb_regset octopro_i2c_buf = {
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.base = 0x2000,
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.num = 0x0a,
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.size = 0x200,
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};
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static const struct ddb_regset octopro_gtl = {
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.base = 0xe00,
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.num = 0x03,
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.size = 0x40,
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};
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/****************************************************************************/
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/****************************************************************************/
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static const struct ddb_regset gtl_mini_input = {
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.base = 0x400,
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.num = 0x14,
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.size = 0x10,
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};
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static const struct ddb_regset gtl_mini_idma = {
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.base = 0x800,
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.num = 0x40,
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.size = 0x10,
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};
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static const struct ddb_regset gtl_mini_idma_buf = {
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.base = 0x4000,
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.num = 0x40,
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.size = 0x100,
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};
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static const struct ddb_regset gtl_mini_gtl = {
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.base = 0xe00,
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.num = 0x03,
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.size = 0x40,
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};
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/****************************************************************************/
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/****************************************************************************/
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static const struct ddb_regmap octopus_map = {
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.irq_version = 1,
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.irq_base_i2c = 0,
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.irq_base_idma = 8,
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.irq_base_odma = 16,
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.i2c = &octopus_i2c,
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.i2c_buf = &octopus_i2c_buf,
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.idma = &octopus_idma,
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.idma_buf = &octopus_idma_buf,
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.odma = &octopus_odma,
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.odma_buf = &octopus_odma_buf,
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.input = &octopus_input,
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.output = &octopus_output,
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};
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static const struct ddb_regmap octopus_mci_map = {
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.irq_version = 1,
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.irq_base_i2c = 0,
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.irq_base_idma = 8,
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.irq_base_odma = 16,
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.irq_base_mci = 0,
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.i2c = &octopus_i2c,
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.i2c_buf = &octopus_i2c_buf,
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.idma = &octopus_idma,
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.idma_buf = &octopus_idma_buf,
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.odma = &octopus_odma,
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.odma_buf = &octopus_odma_buf,
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.input = &octopus_input,
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.output = &octopus_output,
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.mci = &max_mci,
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.mci_buf = &max_mci_buf,
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};
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static const struct ddb_regmap octopro_map = {
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.irq_version = 2,
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.irq_base_i2c = 32,
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.irq_base_idma = 64,
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.irq_base_odma = 128,
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.irq_base_gtl = 8,
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.i2c = &octopro_i2c,
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.i2c_buf = &octopro_i2c_buf,
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.idma = &octopro_idma,
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.idma_buf = &octopro_idma_buf,
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.odma = &octopro_odma,
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.odma_buf = &octopro_odma_buf,
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.input = &octopro_input,
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.output = &octopro_output,
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.gtl = &octopro_gtl,
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};
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static const struct ddb_regmap octopro_hdin_map = {
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.irq_version = 2,
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.irq_base_i2c = 32,
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.irq_base_idma = 64,
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.irq_base_odma = 128,
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.i2c = &octopro_i2c,
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.i2c_buf = &octopro_i2c_buf,
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.idma = &octopro_idma,
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.idma_buf = &octopro_idma_buf,
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.odma = &octopro_odma,
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.odma_buf = &octopro_odma_buf,
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.input = &octopro_input,
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.output = &octopro_output,
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};
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static const struct ddb_regmap octopus_mod_map = {
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.irq_version = 1,
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.irq_base_odma = 8,
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.irq_base_rate = 18,
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.output = &octopus_output,
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.odma = &octopus_mod_odma,
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.odma_buf = &octopus_mod_odma_buf,
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.channel = &octopus_mod_channel,
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};
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static const struct ddb_regmap octopus_mod_2_map = {
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.irq_version = 2,
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.irq_base_odma = 64,
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.irq_base_rate = 32,
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.irq_base_mci = 10,
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.output = &octopus_output,
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.odma = &octopus_mod_2_odma,
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.odma_buf = &octopus_mod_2_odma_buf,
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.channel = &octopus_mod_2_channel,
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.mci = &sdr_mci,
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.mci_buf = &sdr_mci_buf,
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};
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static const struct ddb_regmap octopus_sdr_map = {
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.irq_version = 2,
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.irq_base_odma = 64,
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.irq_base_rate = 32,
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.irq_base_mci = 10,
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.output = &octopus_sdr_output,
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.odma = &octopus_mod_2_odma,
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.odma_buf = &octopus_mod_2_odma_buf,
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.channel = &octopus_mod_2_channel,
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.mci = &sdr_mci,
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.mci_buf = &sdr_mci_buf,
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};
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static const struct ddb_regmap gtl_mini = {
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.irq_version = 2,
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.irq_base_i2c = 32,
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.irq_base_idma = 64,
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.irq_base_odma = 128,
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.irq_base_gtl = 8,
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.idma = >l_mini_idma,
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.idma_buf = >l_mini_idma_buf,
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.input = >l_mini_input,
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.gtl = >l_mini_gtl,
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};
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/****************************************************************************/
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/****************************************************************************/
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static const struct ddb_info ddb_none = {
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.type = DDB_NONE,
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.name = "unknown Digital Devices device, install newer driver",
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.regmap = &octopus_map,
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};
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static const struct ddb_info ddb_octopus = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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};
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static const struct ddb_info ddb_octopusv3 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus V3 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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};
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static const struct ddb_info ddb_octopus_le = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus LE DVB adapter",
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.regmap = &octopus_map,
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.port_num = 2,
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.i2c_mask = 0x03,
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};
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static const struct ddb_info ddb_octopus_oem = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus OEM",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.led_num = 1,
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.fan_num = 1,
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.temp_num = 1,
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.temp_bus = 0,
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};
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static const struct ddb_info ddb_octopus_mini = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus Mini",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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};
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static const struct ddb_info ddb_v6 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine S2 V6 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 3,
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.i2c_mask = 0x07,
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};
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static const struct ddb_info ddb_v6_5 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine S2 V6.5 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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};
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static const struct ddb_info ddb_v7a = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine S2 V7 Advanced DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 2,
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.board_control_2 = 4,
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.ts_quirks = TS_QUIRK_REVERSED,
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.hw_min = 0x010007,
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};
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static const struct ddb_info ddb_v7 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine S2 V7 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 2,
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.board_control_2 = 4,
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.ts_quirks = TS_QUIRK_REVERSED,
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.hw_min = 0x010007,
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};
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static const struct ddb_info ddb_ctv7 = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Cine CT V7 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x0f,
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.board_control = 3,
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.board_control_2 = 4,
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};
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static const struct ddb_info ddb_satixs2v3 = {
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.type = DDB_OCTOPUS,
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.name = "Mystique SaTiX-S2 V3 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 3,
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.i2c_mask = 0x07,
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};
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static const struct ddb_info ddb_ci = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus CI",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x03,
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.ci_mask = 0x0c,
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};
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static const struct ddb_info ddb_cis = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus CI single",
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.regmap = &octopus_map,
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.port_num = 3,
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.i2c_mask = 0x03,
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.ci_mask = 0x04,
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};
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static const struct ddb_info ddb_ci_s2_pro = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus CI S2 Pro",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x01,
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.board_control = 2,
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.board_control_2 = 4,
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.hw_min = 0x010007,
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.ci_mask = 0x0c,
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};
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static const struct ddb_info ddb_ci_s2_pro_a = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices Octopus CI S2 Pro Advanced",
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.regmap = &octopus_map,
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.port_num = 4,
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.i2c_mask = 0x01,
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.board_control = 2,
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.board_control_2 = 4,
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.hw_min = 0x010007,
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.ci_mask = 0x0c,
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};
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static const struct ddb_info ddb_dvbct = {
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.type = DDB_OCTOPUS,
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.name = "Digital Devices DVBCT V6.1 DVB adapter",
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.regmap = &octopus_map,
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.port_num = 3,
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.i2c_mask = 0x07,
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};
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/****************************************************************************/
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static const struct ddb_info ddb_mod = {
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.type = DDB_MOD,
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.name = "Digital Devices DVB-C modulator",
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.regmap = &octopus_mod_map,
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.port_num = 10,
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.temp_num = 1,
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};
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static const struct ddb_info ddb_mod_4 = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices DVB-C modulator",
|
|
.regmap = &octopus_mod_map,
|
|
.port_num = 4,
|
|
.temp_num = 1,
|
|
};
|
|
|
|
static const struct ddb_info ddb_mod_fsm_24 = {
|
|
.type = DDB_MOD,
|
|
.version = 2,
|
|
.name = "Digital Devices DVB-C modulator FSM-24",
|
|
.regmap = &octopus_mod_2_map,
|
|
.port_num = 24,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
.lostlock_irq = 9,
|
|
};
|
|
|
|
static const struct ddb_info ddb_mod_fsm_16 = {
|
|
.type = DDB_MOD,
|
|
.version = 2,
|
|
.name = "Digital Devices DVB-C modulator FSM-16",
|
|
.regmap = &octopus_mod_2_map,
|
|
.port_num = 16,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
.lostlock_irq = 9,
|
|
};
|
|
|
|
static const struct ddb_info ddb_mod_fsm_8 = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices DVB-C modulator FSM-8",
|
|
.version = 2,
|
|
.regmap = &octopus_mod_2_map,
|
|
.port_num = 8,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
.lostlock_irq = 9,
|
|
};
|
|
|
|
static const struct ddb_info ddb_mod_fsm_4 = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices DVB-C modulator FSM-4",
|
|
.version = 2,
|
|
.regmap = &octopus_mod_2_map,
|
|
.port_num = 4,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
.lostlock_irq = 9,
|
|
};
|
|
|
|
static const struct ddb_info ddb_mod_fsm = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices DVB-C FSM",
|
|
.version = 2,
|
|
.regmap = &octopus_mod_2_map,
|
|
.port_num = 0,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
.lostlock_irq = 9,
|
|
};
|
|
|
|
static const struct ddb_info ddb_sdr_atv = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices SDR ATV",
|
|
.version = 16,
|
|
.regmap = &octopus_sdr_map,
|
|
.port_num = 16,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
};
|
|
|
|
static const struct ddb_info ddb_sdr_iq = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices SDR IQ",
|
|
.version = 17,
|
|
.regmap = &octopus_sdr_map,
|
|
.port_num = 16,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
};
|
|
|
|
static const struct ddb_info ddb_sdr_iq2 = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices SDR IQ2",
|
|
.version = 17,
|
|
.regmap = &octopus_sdr_map,
|
|
.port_num = 4,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
};
|
|
|
|
static const struct ddb_info ddb_sdr_dvbt = {
|
|
.type = DDB_MOD,
|
|
.name = "Digital Devices DVBT",
|
|
.version = 18,
|
|
.regmap = &octopus_sdr_map,
|
|
.port_num = 14,
|
|
.temp_num = 1,
|
|
.tempmon_irq = 8,
|
|
};
|
|
|
|
static const struct ddb_info ddb_s2_48 = {
|
|
.type = DDB_OCTOPUS_MAX,
|
|
.name = "Digital Devices MAX S8 4/8",
|
|
.regmap = &octopus_mci_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x01,
|
|
.board_control = 1,
|
|
.tempmon_irq = 24,
|
|
.lnb_base = 0x400,
|
|
};
|
|
|
|
static const struct ddb_info ddb_ct2_8 = {
|
|
.type = DDB_OCTOPUS_MAX_CT,
|
|
.name = "Digital Devices MAX A8 CT2",
|
|
.regmap = &octopus_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x0f,
|
|
.board_control = 0x0ff,
|
|
.board_control_2 = 0xf00,
|
|
.ts_quirks = TS_QUIRK_SERIAL,
|
|
.tempmon_irq = 24,
|
|
};
|
|
|
|
static const struct ddb_info ddb_c2t2_8 = {
|
|
.type = DDB_OCTOPUS_MAX_CT,
|
|
.name = "Digital Devices MAX A8 C2T2",
|
|
.regmap = &octopus_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x0f,
|
|
.board_control = 0x0ff,
|
|
.board_control_2 = 0xf00,
|
|
.ts_quirks = TS_QUIRK_SERIAL,
|
|
.tempmon_irq = 24,
|
|
};
|
|
|
|
static const struct ddb_info ddb_isdbt_8 = {
|
|
.type = DDB_OCTOPUS_MAX_CT,
|
|
.name = "Digital Devices MAX A8 ISDBT",
|
|
.regmap = &octopus_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x0f,
|
|
.board_control = 0x0ff,
|
|
.board_control_2 = 0xf00,
|
|
.ts_quirks = TS_QUIRK_SERIAL,
|
|
.tempmon_irq = 24,
|
|
};
|
|
|
|
static const struct ddb_info ddb_c2t2i_v0_8 = {
|
|
.type = DDB_OCTOPUS_MAX_CT,
|
|
.name = "Digital Devices MAX A8 C2T2I V0",
|
|
.regmap = &octopus_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x0f,
|
|
.board_control = 0x0ff,
|
|
.board_control_2 = 0xf00,
|
|
.ts_quirks = TS_QUIRK_SERIAL | TS_QUIRK_ALT_OSC,
|
|
.tempmon_irq = 24,
|
|
};
|
|
|
|
static const struct ddb_info ddb_c2t2i_8 = {
|
|
.type = DDB_OCTOPUS_MAX_CT,
|
|
.name = "Digital Devices MAX A8 C2T2I",
|
|
.regmap = &octopus_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x0f,
|
|
.board_control = 0x0ff,
|
|
.board_control_2 = 0xf00,
|
|
.ts_quirks = TS_QUIRK_SERIAL,
|
|
.tempmon_irq = 24,
|
|
};
|
|
|
|
/****************************************************************************/
|
|
|
|
static const struct ddb_info ddb_s2x_48 = {
|
|
.type = DDB_OCTOPUS_MCI,
|
|
.name = "Digital Devices MAX SX8",
|
|
.regmap = &octopus_mci_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x00,
|
|
.tempmon_irq = 24,
|
|
.mci_ports = 4,
|
|
.mci_type = DDB_TUNER_MCI_SX8,
|
|
.temp_num = 1,
|
|
.lnb_base = 0x400,
|
|
};
|
|
|
|
static const struct ddb_info ddb_s2x_48_b = {
|
|
.type = DDB_OCTOPUS_MCI,
|
|
.name = "Digital Devices MAX SX8 Basic",
|
|
.regmap = &octopus_mci_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x00,
|
|
.tempmon_irq = 24,
|
|
.mci_ports = 4,
|
|
.mci_type = DDB_TUNER_MCI_SX8,
|
|
.temp_num = 1,
|
|
.lnb_base = 0x400,
|
|
};
|
|
|
|
static const struct ddb_info ddb_m4 = {
|
|
.type = DDB_OCTOPUS_MCI,
|
|
.name = "Digital Devices MAX M4",
|
|
.regmap = &octopus_mci_map,
|
|
.port_num = 2,
|
|
.i2c_mask = 0x00,
|
|
.tempmon_irq = 24,
|
|
.mci_ports = 2,
|
|
.mci_type = 1,
|
|
.temp_num = 1,
|
|
};
|
|
|
|
/****************************************************************************/
|
|
|
|
static const struct ddb_info ddb_gtl_mini = {
|
|
.type = DDB_OCTOPUS,
|
|
.name = "Digital Devices Octopus GT Mini",
|
|
.regmap = >l_mini,
|
|
.port_num = 0,
|
|
.i2c_mask = 0x00,
|
|
.ns_num = 0,
|
|
};
|
|
|
|
/****************************************************************************/
|
|
/****************************************************************************/
|
|
|
|
static const struct ddb_regmap octopus_net_map = {
|
|
.irq_version = 1,
|
|
.irq_base_i2c = 0,
|
|
.i2c = &octopus_i2c,
|
|
.i2c_buf = &octopus_i2c_buf,
|
|
.input = &octopus_input,
|
|
.output = &octopus_output,
|
|
};
|
|
|
|
static const struct ddb_regset octopus_gtl = {
|
|
.base = 0x180,
|
|
.num = 0x01,
|
|
.size = 0x20,
|
|
};
|
|
|
|
static const struct ddb_regmap octopus_net_gtl = {
|
|
.irq_version = 1,
|
|
.irq_base_i2c = 0,
|
|
.irq_base_gtl = 10,
|
|
.i2c = &octopus_i2c,
|
|
.i2c_buf = &octopus_i2c_buf,
|
|
.input = &octopus_input,
|
|
.output = &octopus_output,
|
|
.gtl = &octopus_gtl,
|
|
};
|
|
|
|
static const struct ddb_info ddb_octonet = {
|
|
.type = DDB_OCTONET,
|
|
.name = "Digital Devices OctopusNet network DVB adapter",
|
|
.regmap = &octopus_net_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x0f,
|
|
.ns_num = 12,
|
|
.mdio_base = 0x20,
|
|
};
|
|
|
|
static const struct ddb_info ddb_octonet_jse = {
|
|
.type = DDB_OCTONET,
|
|
.name = "Digital Devices OctopusNet network DVB adapter JSE",
|
|
.regmap = &octopus_net_map,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x0f,
|
|
.ns_num = 15,
|
|
.mdio_base = 0x20,
|
|
};
|
|
|
|
static const struct ddb_info ddb_octonet_gtl = {
|
|
.type = DDB_OCTONET,
|
|
.name = "Digital Devices OctopusNet GTL",
|
|
.regmap = &octopus_net_gtl,
|
|
.port_num = 4,
|
|
.i2c_mask = 0x05,
|
|
.ns_num = 12,
|
|
.mdio_base = 0x20,
|
|
.con_clock = 1,
|
|
};
|
|
|
|
/****************************************************************************/
|
|
/****************************************************************************/
|
|
/****************************************************************************/
|
|
|
|
struct ddb_device_id {
|
|
u16 vendor;
|
|
u16 device;
|
|
u16 subvendor;
|
|
u16 subdevice;
|
|
const struct ddb_info *info;
|
|
};
|
|
|
|
#define DDB_DEVID(_device, _subdevice, _info) { \
|
|
.vendor = 0xdd01, \
|
|
.device = _device, \
|
|
.subvendor = 0xdd01, \
|
|
.subdevice = _subdevice, \
|
|
.info = &(_info) }
|
|
|
|
static const struct ddb_device_id ddb_device_ids[] = {
|
|
/* OctopusNet */
|
|
DDB_DEVID(0x0300, 0xffff, ddb_octonet),
|
|
DDB_DEVID(0x0301, 0xffff, ddb_octonet_jse),
|
|
DDB_DEVID(0x0307, 0xffff, ddb_octonet_gtl),
|
|
|
|
/* PCIe devices */
|
|
|
|
/* DVB tuners and demodulators */
|
|
DDB_DEVID(0x0002, 0x0001, ddb_octopus),
|
|
DDB_DEVID(0x0003, 0x0001, ddb_octopus),
|
|
DDB_DEVID(0x0005, 0x0004, ddb_octopusv3),
|
|
DDB_DEVID(0x0003, 0x0002, ddb_octopus_le),
|
|
DDB_DEVID(0x0003, 0x0003, ddb_octopus_oem),
|
|
DDB_DEVID(0x0003, 0x0010, ddb_octopus_mini),
|
|
DDB_DEVID(0x0005, 0x0011, ddb_octopus_mini),
|
|
DDB_DEVID(0x0003, 0x0020, ddb_v6),
|
|
DDB_DEVID(0x0003, 0x0021, ddb_v6_5),
|
|
DDB_DEVID(0x0006, 0x0022, ddb_v7),
|
|
DDB_DEVID(0x0006, 0x0024, ddb_v7a),
|
|
DDB_DEVID(0x0003, 0x0030, ddb_dvbct),
|
|
DDB_DEVID(0x0003, 0xdb03, ddb_satixs2v3),
|
|
DDB_DEVID(0x0006, 0x0031, ddb_ctv7),
|
|
DDB_DEVID(0x0006, 0x0032, ddb_ctv7),
|
|
DDB_DEVID(0x0006, 0x0033, ddb_ctv7),
|
|
DDB_DEVID(0x0007, 0x0023, ddb_s2_48),
|
|
DDB_DEVID(0x0008, 0x0034, ddb_ct2_8),
|
|
DDB_DEVID(0x0008, 0x0035, ddb_c2t2_8),
|
|
DDB_DEVID(0x0008, 0x0036, ddb_isdbt_8),
|
|
DDB_DEVID(0x0008, 0x0037, ddb_c2t2i_v0_8),
|
|
DDB_DEVID(0x0008, 0x0038, ddb_c2t2i_8),
|
|
DDB_DEVID(0x0009, 0x0025, ddb_s2x_48),
|
|
DDB_DEVID(0x0006, 0x0039, ddb_ctv7),
|
|
DDB_DEVID(0x000a, 0x0050, ddb_m4),
|
|
DDB_DEVID(0x000b, 0x0026, ddb_s2x_48_b),
|
|
DDB_DEVID(0x0011, 0x0040, ddb_ci),
|
|
DDB_DEVID(0x0011, 0x0041, ddb_cis),
|
|
DDB_DEVID(0x0012, 0x0042, ddb_ci),
|
|
DDB_DEVID(0x0013, 0x0043, ddb_ci_s2_pro),
|
|
DDB_DEVID(0x0013, 0x0044, ddb_ci_s2_pro_a),
|
|
DDB_DEVID(0x0020, 0x0012, ddb_gtl_mini),
|
|
|
|
/* Modulators */
|
|
DDB_DEVID(0x0201, 0x0001, ddb_mod),
|
|
DDB_DEVID(0x0201, 0x0002, ddb_mod),
|
|
DDB_DEVID(0x0201, 0x0004, ddb_mod_4), /* dummy entry ! */
|
|
DDB_DEVID(0x0203, 0x0001, ddb_mod),
|
|
DDB_DEVID(0x0210, 0x0004, ddb_mod_fsm), /* dummy entry ! */
|
|
DDB_DEVID(0x0210, 0x0000, ddb_mod_fsm_4), /* dummy entry ! */
|
|
DDB_DEVID(0x0210, 0x0001, ddb_mod_fsm_24),
|
|
DDB_DEVID(0x0210, 0x0002, ddb_mod_fsm_16),
|
|
DDB_DEVID(0x0210, 0x0003, ddb_mod_fsm_8),
|
|
DDB_DEVID(0x0220, 0x0001, ddb_sdr_atv),
|
|
DDB_DEVID(0x0221, 0x0001, ddb_sdr_iq),
|
|
DDB_DEVID(0x0222, 0x0001, ddb_sdr_dvbt),
|
|
DDB_DEVID(0x0223, 0x0001, ddb_sdr_iq2),
|
|
|
|
DDB_DEVID(0xffff, 0xffff, ddb_none),
|
|
};
|
|
|
|
const struct ddb_info *get_ddb_info(u16 vendor, u16 device,
|
|
u16 subvendor, u16 subdevice)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(ddb_device_ids); i++) {
|
|
const struct ddb_device_id *id = &ddb_device_ids[i];
|
|
|
|
if (vendor == id->vendor &&
|
|
device == id->device &&
|
|
(subvendor == id->subvendor ||
|
|
id->subvendor == 0xffff) &&
|
|
(subdevice == id->subdevice ||
|
|
id->subdevice == 0xffff))
|
|
return id->info;
|
|
}
|
|
return &ddb_none;
|
|
}
|