mirror of
https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
580 lines
15 KiB
C
580 lines
15 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* ddbridge.h: Digital Devices PCIe bridge driver
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*
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* Copyright (C) 2010-2017 Digital Devices GmbH
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* Marcus Metzler <mocm@metzlerbros.de>
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* Ralph Metzler <rjkm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef _DDBRIDGE_H_
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#define _DDBRIDGE_H_
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#include <linux/version.h>
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#if (KERNEL_VERSION(3, 8, 0) <= LINUX_VERSION_CODE)
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#define __devexit
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#define __devinit
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#define __devinitconst
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#endif
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/poll.h>
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#include <linux/io.h>
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#include <linux/pci.h>
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/*#include <linux/pci_ids.h>*/
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#include <linux/timer.h>
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#include <linux/i2c.h>
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#include <linux/swab.h>
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#include <linux/vmalloc.h>
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#include <linux/workqueue.h>
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#include <linux/kthread.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/spi/spi.h>
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#include <linux/gpio.h>
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#include <linux/completion.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <asm/dma.h>
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#include <asm/irq.h>
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#include <linux/uaccess.h>
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#include <linux/dvb/ca.h>
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#include <linux/socket.h>
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#include <linux/device.h>
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#include "dvb_netstream.h"
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#include <media/dmxdev.h>
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#include <media/dvbdev.h>
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#include <media/dvb_demux.h>
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#include <media/dvb_frontend.h>
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#include <media/dvb_ringbuffer.h>
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#include <media/dvb_ca_en50221.h>
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#include <media/dvb_net.h>
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#include "tda18271c2dd.h"
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#include "stv6110x.h"
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#include "stv090x.h"
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#include "lnbh24.h"
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#include "drxk.h"
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#include "stv0367dd.h"
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#include "tda18212dd.h"
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#include "cxd2843.h"
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#include "cxd2099.h"
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#include "stv0910.h"
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#include "stv6111.h"
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#include "lnbh25.h"
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#include "mxl5xx.h"
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#include "ddbridge-regs.h"
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#include "ddbridge-mci.h"
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#define DDB_MAX_I2C 32
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#define DDB_MAX_PORT 32
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#define DDB_MAX_INPUT 64
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#define DDB_MAX_OUTPUT 32
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#define DDB_MAX_LINK 4
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#define DDB_LINK_SHIFT 28
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#define DDB_LINK_TAG(_x) ((_x) << DDB_LINK_SHIFT)
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struct ddb_regset {
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u32 base;
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u32 num;
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u32 size;
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};
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struct ddb_regmap {
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u32 irq_version;
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u32 irq_base_i2c;
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u32 irq_base_idma;
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u32 irq_base_odma;
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u32 irq_base_gtl;
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u32 irq_base_rate;
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u32 irq_base_mci;
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const struct ddb_regset *i2c;
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const struct ddb_regset *i2c_buf;
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const struct ddb_regset *idma;
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const struct ddb_regset *idma_buf;
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const struct ddb_regset *odma;
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const struct ddb_regset *odma_buf;
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const struct ddb_regset *input;
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const struct ddb_regset *output;
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const struct ddb_regset *channel;
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const struct ddb_regset *gtl;
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const struct ddb_regset *mci;
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const struct ddb_regset *mci_buf;
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};
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struct ddb_ids {
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u16 vendor;
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u16 device;
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u16 subvendor;
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u16 subdevice;
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u32 hwid;
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u32 regmapid;
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u32 devid;
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u32 mac;
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u8 revision;
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};
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struct ddb_info {
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u32 type;
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#define DDB_NONE 0
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#define DDB_OCTOPUS 1
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#define DDB_MOD 3
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#define DDB_OCTONET 4
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#define DDB_OCTOPUS_MAX 5
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#define DDB_OCTOPUS_MAX_CT 6
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#define DDB_OCTOPUS_MCI 9
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u32 version;
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char *name;
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u32 i2c_mask;
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u32 board_control;
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u32 board_control_2;
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u8 port_num;
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u8 led_num;
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u8 fan_num;
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u8 temp_num;
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u8 temp_bus;
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u8 ns_num;
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u8 con_clock; /* use a continuous clock */
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u8 ts_quirks;
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#define TS_QUIRK_SERIAL 1
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#define TS_QUIRK_REVERSED 2
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#define TS_QUIRK_NO_OUTPUT 4
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#define TS_QUIRK_ALT_OSC 8
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u8 mci_ports;
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u8 mci_type;
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u8 ci_mask;
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u32 tempmon_irq;
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u32 lostlock_irq;
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u32 mdio_base;
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u32 hw_min;
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u32 ci_base;
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u32 lnb_base;
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const struct ddb_regmap *regmap;
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};
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#define DMA_MAX_BUFS 32 /* hardware table limit */
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#define OUTPUT_DMA_BUFS_SDR 32
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#define OUTPUT_DMA_SIZE_SDR (256 * 1024)
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struct ddb;
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struct ddb_port;
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struct ddb_dma {
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void *io;
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u32 regs;
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u32 bufregs;
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dma_addr_t pbuf[DMA_MAX_BUFS];
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u8 *vbuf[DMA_MAX_BUFS];
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u32 num;
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u32 size;
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u32 div;
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u32 bufval;
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struct tasklet_struct tasklet;
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spinlock_t lock; /* DMA lock */
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wait_queue_head_t wq;
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int running;
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u32 stat;
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u32 ctrl;
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u32 cbuf;
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u32 coff;
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u32 stall_count;
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u32 packet_loss;
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u32 unaligned;
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};
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struct ddb_dvb {
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struct dvb_adapter *adap;
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int adap_registered;
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struct dvb_device *dev;
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struct dvb_frontend *fe;
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struct dvb_frontend *fe2;
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struct dmxdev dmxdev;
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struct dvb_demux demux;
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struct dvb_net dvbnet;
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struct dvb_netstream dvbns;
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struct dmx_frontend hw_frontend;
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struct dmx_frontend mem_frontend;
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int users;
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u32 attached;
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u8 input;
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enum fe_sec_tone_mode tone;
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enum fe_sec_voltage voltage;
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int (*i2c_gate_ctrl)(struct dvb_frontend *fe, int val);
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int (*set_voltage)(struct dvb_frontend *fe,
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enum fe_sec_voltage voltage);
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int (*set_input)(struct dvb_frontend *fe, int input);
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int (*diseqc_send_master_cmd)(struct dvb_frontend *fe,
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struct dvb_diseqc_master_cmd *cmd);
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};
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struct ddb_ci {
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struct dvb_ca_en50221 en;
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struct ddb_port *port;
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u32 nr;
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u32 regs;
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};
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struct ddb_io {
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struct ddb_port *port;
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u32 nr;
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u32 regs;
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u32 con;
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struct ddb_dma *dma;
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struct ddb_io *redo;
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struct ddb_io *redi;
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};
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#define ddb_output ddb_io
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#define ddb_input ddb_io
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struct ddb_i2c {
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struct ddb *dev;
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u32 nr;
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u32 regs;
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u32 link;
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struct i2c_adapter adap;
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u32 rbuf;
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u32 wbuf;
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u32 bsize;
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struct completion completion;
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};
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struct ddb_port {
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struct ddb *dev;
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u32 nr;
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u32 pnr;
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u32 regs;
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u32 lnr;
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struct ddb_i2c *i2c;
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struct mutex i2c_gate_lock; /* I2C access lock */
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u32 class;
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#define DDB_PORT_NONE 0
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#define DDB_PORT_CI 1
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#define DDB_PORT_TUNER 2
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#define DDB_PORT_LOOP 3
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#define DDB_PORT_MOD 4
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char *name;
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char *type_name;
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u32 type;
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#define DDB_TUNER_DUMMY 0xffffffff
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#define DDB_TUNER_NONE 0
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#define DDB_TUNER_DVBS_ST 1
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#define DDB_TUNER_DVBS_ST_AA 2
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#define DDB_TUNER_DVBCT_TR 3
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#define DDB_TUNER_DVBCT_ST 4
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#define DDB_CI_INTERNAL 5
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#define DDB_CI_EXTERNAL_SONY 6
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#define DDB_TUNER_DVBCT2_SONY_P 7
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#define DDB_TUNER_DVBC2T2_SONY_P 8
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#define DDB_TUNER_ISDBT_SONY_P 9
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#define DDB_TUNER_DVBS_STV0910_P 10
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#define DDB_TUNER_MXL5XX 11
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#define DDB_CI_EXTERNAL_XO2 12
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#define DDB_CI_EXTERNAL_XO2_B 13
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#define DDB_TUNER_DVBS_STV0910_PR 14
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#define DDB_TUNER_DVBC2T2I_SONY_P 15
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#define DDB_TUNER_XO2 32
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#define DDB_TUNER_DVBS_STV0910 (DDB_TUNER_XO2 + 0)
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#define DDB_TUNER_DVBCT2_SONY (DDB_TUNER_XO2 + 1)
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#define DDB_TUNER_ISDBT_SONY (DDB_TUNER_XO2 + 2)
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#define DDB_TUNER_DVBC2T2_SONY (DDB_TUNER_XO2 + 3)
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#define DDB_TUNER_ATSC_ST (DDB_TUNER_XO2 + 4)
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#define DDB_TUNER_DVBC2T2I_SONY (DDB_TUNER_XO2 + 5)
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#define DDB_TUNER_MCI 48
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#define DDB_TUNER_MCI_SX8 (DDB_TUNER_MCI + 0)
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#define DDB_TUNER_MCI_M4 (DDB_TUNER_MCI + 1)
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struct ddb_input *input[2];
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struct ddb_output *output;
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struct dvb_ca_en50221 *en;
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struct ddb_dvb dvb[2];
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u32 gap;
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u32 obr;
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u8 creg;
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};
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struct mod_base {
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u32 frequency;
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u32 flat_start;
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u32 flat_end;
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};
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struct ddb_mod {
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struct ddb_port *port;
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u32 frequency;
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u32 modulation;
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u32 symbolrate;
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u64 obitrate;
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u64 ibitrate;
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u32 pcr_correction;
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u32 rate_inc;
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u32 Control;
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u32 State;
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u32 StateCounter;
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s32 LastPCRAdjust;
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s32 PCRAdjustSum;
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s32 InPacketsSum;
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s32 OutPacketsSum;
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s64 PCRIncrement;
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s64 PCRDecrement;
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s32 PCRRunningCorr;
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u32 OutOverflowPacketCount;
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u32 InOverflowPacketCount;
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u32 LastOutPacketCount;
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u32 LastInPacketCount;
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u64 LastOutPackets;
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u64 LastInPackets;
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u32 MinInputPackets;
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};
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#define CM_STARTUP_DELAY 2
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#define CM_AVERAGE 20
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#define CM_GAIN 10
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#define HW_LSB_SHIFT 12
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#define HW_LSB_MASK 0x1000
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#define CM_IDLE 0
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#define CM_STARTUP 1
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#define CM_ADJUST 2
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#define TS_CAPTURE_LEN (4096)
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/* net streaming hardware block */
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#define DDB_NS_MAX 15
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struct ddb_ns {
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struct ddb_input *input;
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int nr;
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struct ddb_input *fe;
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u32 rtcp_udplen;
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u32 rtcp_len;
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u32 ts_offset;
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u32 udplen;
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u8 p[512];
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};
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struct ddb_lnb {
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struct mutex lock; /* lock lnb access */
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u32 tone;
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enum fe_sec_voltage oldvoltage[4];
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u32 voltage[4];
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u32 voltages;
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u32 fmode;
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};
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struct ddb_irq {
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void (*handler)(void *data);
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void *data;
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};
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struct ddb_link {
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struct ddb *dev;
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const struct ddb_info *info;
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u32 nr;
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u32 regs;
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spinlock_t lock; /* lock link access */
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struct mutex flash_mutex; /* lock flash access */
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struct ddb_lnb lnb;
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struct tasklet_struct tasklet;
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struct ddb_ids ids;
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spinlock_t temp_lock; /* lock temp chip access */
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int over_temperature_error;
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u8 temp_tab[11];
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struct ddb_irq irq[256];
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struct mci_base *mci_base;
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struct completion mci_completion;
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struct mutex mci_lock;
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int mci_ok;
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};
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struct ddb {
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struct pci_dev *pdev;
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struct platform_device *pfdev;
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struct device *dev;
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int msi;
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struct workqueue_struct *wq;
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u32 has_dma;
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u32 has_ns;
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struct ddb_link link[DDB_MAX_LINK];
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unsigned char *regs;
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u32 regs_len;
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u32 port_num;
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struct ddb_port port[DDB_MAX_PORT];
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u32 i2c_num;
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struct ddb_i2c i2c[DDB_MAX_I2C];
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struct ddb_input input[DDB_MAX_INPUT];
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struct ddb_output output[DDB_MAX_OUTPUT];
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struct dvb_adapter adap[DDB_MAX_INPUT];
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struct ddb_dma idma[DDB_MAX_INPUT];
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struct ddb_dma odma[DDB_MAX_OUTPUT];
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struct device *ddb_dev;
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atomic_t ddb_dev_users;
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u32 nr;
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u8 iobuf[1028];
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u8 leds;
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u32 ts_irq;
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u32 i2c_irq;
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int ns_num;
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struct ddb_ns ns[DDB_NS_MAX];
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int vlan;
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struct mutex mutex; /* lock accces to global ddb array */
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struct dvb_device *nsd_dev;
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u8 tsbuf[TS_CAPTURE_LEN];
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struct mod_base mod_base;
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struct ddb_mod mod[24];
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struct mutex ioctl_mutex; /* lock extra ioctls */
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};
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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#define dd_uint8 u8
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#define dd_uint16 u16
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#define dd_int16 s16
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#define dd_uint32 u32
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#define dd_int32 s32
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#define dd_uint64 u64
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#define dd_int64 s64
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#define DDMOD_FLASH_START 0x1000
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struct DDMOD_FLASH_DS {
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dd_uint32 Symbolrate; /* kSymbols/s */
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dd_uint32 DACFrequency; /* kHz */
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dd_uint16 FrequencyResolution; /* kHz */
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dd_uint16 IQTableLength;
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dd_uint16 FrequencyFactor;
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dd_int16 PhaseCorr; /* TBD */
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dd_uint32 Control2;
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dd_uint16 PostScaleI;
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dd_uint16 PostScaleQ;
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dd_uint16 PreScale;
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dd_int16 EQTap[11];
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dd_uint16 FlatStart;
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dd_uint16 FlatEnd;
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dd_uint32 FlashOffsetPrecalculatedIQTables; /* 0 = none */
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dd_uint8 Reserved[28];
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};
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struct DDMOD_FLASH {
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dd_uint32 Magic;
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dd_uint16 Version;
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dd_uint16 DataSets;
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dd_uint16 VCORefFrequency; /* MHz */
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dd_uint16 VCO1Frequency; /* MHz */
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dd_uint16 VCO2Frequency; /* MHz */
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dd_uint16 DACAux1; /* TBD */
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dd_uint16 DACAux2; /* TBD */
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dd_uint8 Reserved1[238];
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struct DDMOD_FLASH_DS DataSet[1];
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};
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#define DDMOD_FLASH_MAGIC 0x5F564d5F
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int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
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#define DDBRIDGE_VERSION "0.9.38"
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/* linked function prototypes */
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const struct ddb_info *get_ddb_info(u16 vendor, u16 device,
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u16 subvendor, u16 subdevice);
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int netstream_init(struct ddb_input *input);
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int ddb_dvb_ns_input_start(struct ddb_input *input);
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int ddb_dvb_ns_input_stop(struct ddb_input *input);
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int ddbridge_mod_do_ioctl(struct file *file, unsigned int cmd, void *parg);
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int ddbridge_mod_init(struct ddb *dev);
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void ddbridge_mod_output_stop(struct ddb_output *output);
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int ddbridge_mod_output_start(struct ddb_output *output);
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void ddbridge_mod_rate_handler(void *data);
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void ddb_device_destroy(struct ddb *dev);
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void ddb_nsd_detach(struct ddb *dev);
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void ddb_ports_detach(struct ddb *dev);
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void ddb_ports_release(struct ddb *dev);
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void ddb_buffers_free(struct ddb *dev);
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void ddb_unmap(struct ddb *dev);
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irqreturn_t ddb_irq_handler0(int irq, void *dev_id);
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irqreturn_t ddb_irq_handler1(int irq, void *dev_id);
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irqreturn_t ddb_irq_handler(int irq, void *dev_id);
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irqreturn_t ddb_irq_handler_v2(int irq, void *dev_id);
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void ddb_reset_ios(struct ddb *dev);
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int ddb_init(struct ddb *dev);
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int ddb_exit_ddbridge(int stage, int error);
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int ddb_init_ddbridge(void);
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int ddb_i2c_init(struct ddb *dev);
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void ddb_i2c_release(struct ddb *dev);
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int ddb_ci_attach(struct ddb_port *port, u32 bitrate);
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int ddb_fe_attach_mxl5xx(struct ddb_input *input);
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int ddb_fe_attach_mci(struct ddb_input *input, u32 type);
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int ddb_lnb_init_fmode(struct ddb *dev, struct ddb_link *link, u32 fm);
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struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr,
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void (*handler)(void *), void *data);
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struct dvb_frontend *ddb_mci_attach(struct ddb_input *input, struct mci_cfg *cfg, int nr, int tuner);
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#endif
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