mirror of
https://github.com/DigitalDevices/dddvb.git
synced 2023-10-10 13:37:43 +02:00
524 lines
14 KiB
C
524 lines
14 KiB
C
/*
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* ddbridge-sx8.c: Digital Devices MAX SX8 driver
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*
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* Copyright (C) 2018 Digital Devices GmbH
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* Marcus Metzler <mocm@metzlerbros.de>
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* Ralph Metzler <rjkm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, point your browser to
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "ddbridge.h"
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#include "ddbridge-io.h"
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#include "ddbridge-i2c.h"
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#include "ddbridge-mci.h"
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static int default_mod = 3;
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module_param(default_mod, int, 0444);
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MODULE_PARM_DESC(default_mod, "default modulations enabled, default is 3 (1 = QPSK, 2 = 8PSK, 4 = 16APSK, ...)");
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static const u32 MCLK = (1550000000 / 12);
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static const u32 MAX_LDPC_BITRATE = (720000000);
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static const u32 MAX_DEMOD_LDPC_BITRATE = (1550000000 / 6);
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#define SX8_TUNER_NUM 4
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#define SX8_DEMOD_NUM 8
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#define SX8_DEMOD_NONE 0xff
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struct sx8_base {
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struct mci_base mci_base;
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u8 tuner_use_count[SX8_TUNER_NUM];
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u32 gain_mode[SX8_TUNER_NUM];
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u32 used_ldpc_bitrate[SX8_DEMOD_NUM];
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u8 demod_in_use[SX8_DEMOD_NUM];
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u32 iq_mode;
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u32 burst_size;
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u32 direct_mode;
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};
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struct sx8 {
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struct mci mci;
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int first_time_lock;
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int started;
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u32 bb_mode;
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u32 local_frequency;
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};
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static const u8 dvbs2_bits_per_symbol[] = {
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0, 0, 0, 0,
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/* S2 QPSK */
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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/* S2 8PSK */
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3,
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/* S2 16APSK */
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
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4, 4, 4, 4, 4, 4, 4, 4,
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/* S2 32APSK */
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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3, 0, 4, 0,
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2, 2, 2, 2, 2, 2, // S2X QPSK
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // S2X 8PSK
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, // S2X 16APSK
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, // S2X 32APSK
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6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, // S2X 64APSK
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7, 7, 7, 7, // S2X 128APSK
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8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, // S2X 256APSK
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, // S2X QPSK
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3, 3, 3, 3, 3, 3, 3, 3, // S2X 8PSK
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4, // S2X 16APSK
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5, 5, 5, 5, // S2X 32APSK
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3, 4, 5, 6, 8, 10,
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};
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static void release(struct dvb_frontend *fe)
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{
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struct sx8 *state = fe->demodulator_priv;
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struct mci_base *mci_base = state->mci.base;
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mci_base->count--;
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if (mci_base->count == 0) {
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list_del(&mci_base->mci_list);
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kfree(mci_base);
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}
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kfree(state);
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}
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static int read_status(struct dvb_frontend *fe, enum fe_status *status)
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{
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int stat;
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struct sx8 *state = fe->demodulator_priv;
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struct mci_base *mci_base = state->mci.base;
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struct sx8_base *sx8_base = (struct sx8_base *) mci_base;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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struct mci_result res;
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stat = ddb_mci_get_status(&state->mci, &res);
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if (stat)
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return stat;
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*status = 0x00;
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ddb_mci_get_info(&state->mci);
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if (res.status == SX8_DEMOD_WAIT_MATYPE)
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*status = 0x0f;
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if (res.status == MCI_DEMOD_LOCKED) {
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*status = 0x1f;
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if (state->mci.signal_info.dvbs2_signal_info.standard == 2) {
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sx8_base->used_ldpc_bitrate[state->mci.nr] =
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p->symbol_rate *
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dvbs2_bits_per_symbol[
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state->mci.signal_info.
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dvbs2_signal_info.pls_code];
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//printk("PLS %02x\n", state->mci.signal_info.dvbs2_signal_info.pls_code);
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} else
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sx8_base->used_ldpc_bitrate[state->mci.nr] = 0;
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}
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return stat;
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}
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static int mci_set_tuner(struct dvb_frontend *fe, u32 tuner, u32 on)
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{
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struct sx8 *state = fe->demodulator_priv;
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struct mci_base *mci_base = state->mci.base;
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struct sx8_base *sx8_base = (struct sx8_base *) mci_base;
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struct mci_command cmd;
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memset(&cmd, 0, sizeof(cmd));
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cmd.tuner = state->mci.tuner;
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cmd.command = on ? SX8_CMD_INPUT_ENABLE : SX8_CMD_INPUT_DISABLE;
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cmd.sx8_input_enable.flags = sx8_base->gain_mode[state->mci.tuner];
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return ddb_mci_cmd(&state->mci, &cmd, NULL);
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}
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static int stop(struct dvb_frontend *fe)
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{
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struct sx8 *state = fe->demodulator_priv;
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struct mci_base *mci_base = state->mci.base;
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struct sx8_base *sx8_base = (struct sx8_base *) mci_base;
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struct mci_command cmd;
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u32 input = state->mci.tuner;
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if (!state->started)
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return -1;
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memset(&cmd, 0, sizeof(cmd));
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if (state->mci.demod != SX8_DEMOD_NONE) {
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cmd.command = MCI_CMD_STOP;
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cmd.demod = state->mci.demod;
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ddb_mci_cmd(&state->mci, &cmd, NULL);
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if (sx8_base->iq_mode) {
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cmd.command = SX8_CMD_DISABLE_IQOUTPUT;
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cmd.demod = state->mci.demod;
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cmd.output = 0;
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ddb_mci_cmd(&state->mci, &cmd, NULL);
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ddb_mci_config(&state->mci, SX8_TSCONFIG_MODE_NORMAL);
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}
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}
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mutex_lock(&mci_base->tuner_lock);
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sx8_base->tuner_use_count[input]--;
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if (!sx8_base->tuner_use_count[input])
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mci_set_tuner(fe, input, 0);
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if (state->mci.demod != SX8_DEMOD_NONE) {
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sx8_base->demod_in_use[state->mci.demod] = 0;
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state->mci.demod = SX8_DEMOD_NONE;
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}
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sx8_base->used_ldpc_bitrate[state->mci.nr] = 0;
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sx8_base->iq_mode = 0;
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mutex_unlock(&mci_base->tuner_lock);
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state->started = 0;
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return 0;
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}
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static int start(struct dvb_frontend *fe, u32 flags, u32 modmask, u32 ts_config)
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{
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struct sx8 *state = fe->demodulator_priv;
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struct mci_base *mci_base = state->mci.base;
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struct sx8_base *sx8_base = (struct sx8_base *) mci_base;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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static const u32 MAX_DEMOD_LDPC_BITRATE = (1550000000 / 6);
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u32 used_ldpc_bitrate = 0, free_ldpc_bitrate;
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u32 used_demods = 0;
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struct mci_command cmd;
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u32 input = state->mci.tuner;
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u32 bits_per_symbol = 0;
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int i = -1, stat = 0;
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if (p->symbol_rate >= MCLK / 2)
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flags &= ~1;
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if ((flags & 3) == 0)
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return -EINVAL;
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if (flags & 2) {
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u32 tmp = modmask;
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bits_per_symbol = 1;
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while (tmp & 1) {
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tmp >>= 1;
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bits_per_symbol++;
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}
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}
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mutex_lock(&mci_base->tuner_lock);
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if (sx8_base->iq_mode) {
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stat = -EBUSY;
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goto unlock;
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}
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if (sx8_base->direct_mode) {
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if (p->symbol_rate >= MCLK / 2) {
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if (state->mci.nr < 4)
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i = state->mci.nr;
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} else {
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i = state->mci.nr;
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}
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} else {
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for (i = 0; i < SX8_DEMOD_NUM; i++) {
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used_ldpc_bitrate += sx8_base->used_ldpc_bitrate[i];
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if (sx8_base->demod_in_use[i])
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used_demods++;
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}
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if ((used_ldpc_bitrate >= MAX_LDPC_BITRATE) ||
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((ts_config & SX8_TSCONFIG_MODE_MASK) >
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SX8_TSCONFIG_MODE_NORMAL && used_demods > 0)) {
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stat = -EBUSY;
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goto unlock;
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}
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free_ldpc_bitrate = MAX_LDPC_BITRATE - used_ldpc_bitrate;
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if (free_ldpc_bitrate > MAX_DEMOD_LDPC_BITRATE)
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free_ldpc_bitrate = MAX_DEMOD_LDPC_BITRATE;
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while (p->symbol_rate * bits_per_symbol > free_ldpc_bitrate)
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bits_per_symbol--;
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if (bits_per_symbol < 2) {
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stat = -EBUSY;
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goto unlock;
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}
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modmask &= ((1 << (bits_per_symbol - 1)) - 1);
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if( ((flags & 0x02) != 0) && (modmask == 0)) {
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stat = -EBUSY;
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goto unlock;
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}
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i = (p->symbol_rate > MCLK / 2) ? 3 : 7;
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while (i >= 0 && sx8_base->demod_in_use[i])
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i--;
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}
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if (i < 0) {
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stat = -EBUSY;
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goto unlock;
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}
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sx8_base->demod_in_use[i] = 1;
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sx8_base->used_ldpc_bitrate[state->mci.nr] = p->symbol_rate * bits_per_symbol;
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state->mci.demod = i;
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if (!sx8_base->tuner_use_count[input])
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mci_set_tuner(fe, input, 1);
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sx8_base->tuner_use_count[input]++;
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sx8_base->iq_mode = (ts_config > 1);
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unlock:
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mutex_unlock(&mci_base->tuner_lock);
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if (stat)
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return stat;
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memset(&cmd, 0, sizeof(cmd));
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if (sx8_base->iq_mode) {
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cmd.command = SX8_CMD_ENABLE_IQOUTPUT;
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cmd.demod = state->mci.demod;
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cmd.output = p->stream_id & 7;
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ddb_mci_cmd(&state->mci, &cmd, NULL);
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ddb_mci_config(&state->mci, ts_config);
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}
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if (p->stream_id != NO_STREAM_ID_FILTER && !(p->stream_id & 0xf0000000))
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flags |= 0x80;
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//printk("frontend %u: tuner=%u demod=%u\n", state->mci.nr, state->mci.tuner, state->mci.demod);
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cmd.command = MCI_CMD_SEARCH_DVBS;
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cmd.dvbs2_search.flags = flags;
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cmd.dvbs2_search.s2_modulation_mask = modmask;
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cmd.dvbs2_search.retry = 2;
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cmd.dvbs2_search.frequency = p->frequency * 1000;
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cmd.dvbs2_search.symbol_rate = p->symbol_rate;
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cmd.dvbs2_search.scrambling_sequence_index =
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p->scrambling_sequence_index | 0x80000000;
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cmd.dvbs2_search.input_stream_id = p->stream_id;
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cmd.tuner = state->mci.tuner;
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cmd.demod = state->mci.demod;
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cmd.output = state->mci.nr;
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if (p->stream_id == 0x80000000)
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cmd.output |= 0x80;
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stat = ddb_mci_cmd(&state->mci, &cmd, NULL);
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if (stat)
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stop(fe);
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return stat;
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}
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static int start_iq(struct dvb_frontend *fe, u32 flags,
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u32 roll_off, u32 ts_config)
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{
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struct sx8 *state = fe->demodulator_priv;
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struct mci_base *mci_base = state->mci.base;
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struct sx8_base *sx8_base = (struct sx8_base *) mci_base;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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u32 used_demods = 0;
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struct mci_command cmd;
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u32 input = state->mci.tuner;
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int i, stat = 0;
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mutex_lock(&mci_base->tuner_lock);
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if (sx8_base->iq_mode) {
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stat = -EBUSY;
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goto unlock;
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}
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for (i = 0; i < SX8_DEMOD_NUM; i++)
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if (sx8_base->demod_in_use[i])
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used_demods++;
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if (used_demods > 0) {
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stat = -EBUSY;
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goto unlock;
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}
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state->mci.demod = 0;
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if (!sx8_base->tuner_use_count[input])
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mci_set_tuner(fe, input, 1);
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sx8_base->tuner_use_count[input]++;
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sx8_base->iq_mode = (ts_config > 1);
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unlock:
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mutex_unlock(&mci_base->tuner_lock);
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if (stat)
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return stat;
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memset(&cmd, 0, sizeof(cmd));
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cmd.command = SX8_CMD_START_IQ;
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cmd.sx8_start_iq.flags = flags;
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cmd.sx8_start_iq.roll_off = roll_off;
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cmd.sx8_start_iq.frequency = p->frequency * 1000;
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cmd.sx8_start_iq.symbol_rate = p->symbol_rate;
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cmd.tuner = state->mci.tuner;
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cmd.demod = state->mci.demod;
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stat = ddb_mci_cmd(&state->mci, &cmd, NULL);
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if (stat)
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stop(fe);
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ddb_mci_config(&state->mci, ts_config);
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return stat;
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}
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static int set_parameters(struct dvb_frontend *fe)
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{
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int stat = 0;
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struct sx8 *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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u32 ts_config = SX8_TSCONFIG_MODE_NORMAL, iq_mode = 0, isi;
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stop(fe);
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isi = p->stream_id;
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if (isi != NO_STREAM_ID_FILTER) {
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iq_mode = (isi & 0x30000000) >> 28;
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}
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if (iq_mode)
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ts_config = (SX8_TSCONFIG_TSHEADER | SX8_TSCONFIG_MODE_IQ);
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if (iq_mode < 2) {
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u32 mask;
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switch (p->modulation) {
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case APSK_256:
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mask = 0x7f;
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break;
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case APSK_128:
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mask = 0x3f;
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break;
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case APSK_64:
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mask = 0x1f;
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break;
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case APSK_32:
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mask = 0x0f;
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break;
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case APSK_16:
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mask = 0x07;
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break;
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default:
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mask = default_mod;
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break;
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}
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stat = start(fe, 3, mask, ts_config);
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} else {
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stat = start_iq(fe, iq_mode & 1, 4, ts_config);
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}
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if (!stat) {
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state->started = 1;
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state->first_time_lock = 1;
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state->mci.signal_info.status = MCI_DEMOD_WAIT_SIGNAL;
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}
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return stat;
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}
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static int tune(struct dvb_frontend *fe, bool re_tune,
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unsigned int mode_flags,
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unsigned int *delay, enum fe_status *status)
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{
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int r;
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if (re_tune) {
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r = set_parameters(fe);
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if (r)
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return r;
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}
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r = read_status(fe, status);
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if (r)
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return r;
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if (*status & FE_HAS_LOCK)
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return 0;
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*delay = HZ / 10;
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return 0;
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}
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static int get_algo(struct dvb_frontend *fe)
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{
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return DVBFE_ALGO_HW;
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}
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static int set_input(struct dvb_frontend *fe, int input)
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{
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struct sx8 *state = fe->demodulator_priv;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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if (input >= SX8_TUNER_NUM)
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|
return -EINVAL;
|
|
if (state->mci.tuner == input)
|
|
return 0;
|
|
stop(fe);
|
|
state->mci.tuner = p->input = input;
|
|
return 0;
|
|
}
|
|
|
|
static int sleep(struct dvb_frontend *fe)
|
|
{
|
|
stop(fe);
|
|
return 0;
|
|
}
|
|
|
|
static int get_frontend(struct dvb_frontend *fe, struct dtv_frontend_properties *p)
|
|
{
|
|
struct sx8 *state = fe->demodulator_priv;
|
|
|
|
ddb_mci_proc_info(&state->mci, p);
|
|
return 0;
|
|
}
|
|
|
|
static struct dvb_frontend_ops sx8_ops = {
|
|
.delsys = { SYS_DVBS, SYS_DVBS2 },
|
|
.xbar = { 4, 0, 8 }, /* tuner_max, demod id, demod_max */
|
|
.info = {
|
|
.name = "DVB-S/S2X",
|
|
.frequency_min = 950000,
|
|
.frequency_max = 2150000,
|
|
.frequency_stepsize = 0,
|
|
.frequency_tolerance = 0,
|
|
.symbol_rate_min = 100000,
|
|
.symbol_rate_max = 100000000,
|
|
.caps = FE_CAN_INVERSION_AUTO |
|
|
FE_CAN_FEC_AUTO |
|
|
FE_CAN_QPSK |
|
|
FE_CAN_2G_MODULATION |
|
|
FE_CAN_MULTISTREAM,
|
|
},
|
|
.get_frontend_algo = get_algo,
|
|
.get_frontend = get_frontend,
|
|
.tune = tune,
|
|
.release = release,
|
|
.read_status = read_status,
|
|
.set_input = set_input,
|
|
.sleep = sleep,
|
|
};
|
|
|
|
static int init(struct mci *mci)
|
|
{
|
|
struct sx8 *state = (struct sx8 *) mci;
|
|
|
|
state->mci.demod = SX8_DEMOD_NONE;
|
|
mci->fe.ops.xbar[1] = mci->nr;
|
|
mci->fe.dtv_property_cache.input = mci->tuner;
|
|
return 0;
|
|
}
|
|
|
|
static int base_init(struct mci_base *mci_base)
|
|
{
|
|
//struct sx8_base *base = (struct sx8_base *) mci_base;
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct mci_cfg ddb_max_sx8_cfg = {
|
|
.type = 0,
|
|
.fe_ops = &sx8_ops,
|
|
.base_size = sizeof(struct sx8_base),
|
|
.state_size = sizeof(struct sx8),
|
|
.init = init,
|
|
.base_init = base_init,
|
|
};
|