363 lines
9.0 KiB
C
363 lines
9.0 KiB
C
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/*
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* (c) 2010 STMicroelectronics Limited
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*
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* Author: Pawel Moll <pawel.moll@st.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/stm/pad.h>
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#include <linux/stm/sysconf.h>
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#include <linux/stm/emi.h>
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#include <linux/stm/stx7108.h>
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#include <asm/irq-ilc.h>
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#define PCIE_SOFT_RST_N_PCIE (1<<6) /* Active low !! */
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#define PCIE_SYS_INT (1<<5)
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#define PCIE_P1_SSC_EN (1<<4)
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#define PCIE_APP_REQ_RETRY_EN (1<<3)
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#define PCIE_APP_LTSSM_ENABLE (1<<2)
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#define PCIE_APP_INIT_RST (1<<1)
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#define PCIE_DEVICE_TYPE (1<<0)
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#define PCIE_DEFAULT_VAL (PCIE_SOFT_RST_N_PCIE | PCIE_DEVICE_TYPE)
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static void stx7108_pcie_init(void *handle)
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{
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struct sysconf_field *sc = (struct sysconf_field *) handle;
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/* Drive RST_N low, set device type */
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sysconf_write(sc, PCIE_DEVICE_TYPE);
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sysconf_write(sc, PCIE_DEFAULT_VAL);
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mdelay(1);
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}
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static void stx7108_pcie_enable_ltssm(void *handle)
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{
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struct sysconf_field *sc = (struct sysconf_field *) handle;
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sysconf_write(sc, PCIE_DEFAULT_VAL | PCIE_APP_LTSSM_ENABLE);
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}
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static void stx7108_pcie_disable_ltssm(void *handle)
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{
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struct sysconf_field *sc = (struct sysconf_field *) handle;
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sysconf_write(sc, PCIE_DEFAULT_VAL);
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}
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/* Ops to drive the platform specific bits of the interface */
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static struct stm_plat_pcie_ops stx7108_pcie_ops = {
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.init = stx7108_pcie_init,
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.enable_ltssm = stx7108_pcie_enable_ltssm,
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.disable_ltssm = stx7108_pcie_disable_ltssm,
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};
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static struct stm_plat_pcie_config stx7108_plat_pcie_config = {
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.ahb_val = 0x264207,
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.ops = &stx7108_pcie_ops,
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};
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/* PCI express support */
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#define PCIE_MEM_START 0x20000000
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#define PCIE_MEM_SIZE 0x20000000
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#define MSI_FIRST_IRQ (NR_IRQS - 33)
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#define MSI_LAST_IRQ (NR_IRQS - 1)
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static struct platform_device stx7108_pcie_device = {
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.name = "pcie_stm",
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.id = -1,
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.num_resources = 8,
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.resource = (struct resource[]) {
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/* Main PCI window, 960 MB */
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STM_PLAT_RESOURCE_MEM_NAMED("pcie memory",
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PCIE_MEM_START, PCIE_MEM_SIZE),
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/* There actually is no IO for the PCI express cell, so this
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* is a dummy really. Must be disjoint from PCI
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*/
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{
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.name = "pcie io",
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.start = 0x1000,
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.end = 0x1fff,
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.flags = IORESOURCE_IO,
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},
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STM_PLAT_RESOURCE_MEM_NAMED("pcie cntrl", 0xfe780000, 0x1000),
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STM_PLAT_RESOURCE_MEM_NAMED("pcie ahb", 0xfe788000, 0x8),
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STM_PLAT_RESOURCE_IRQ_NAMED("pcie inta", ILC_IRQ(179), -1),
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STM_PLAT_RESOURCE_IRQ_NAMED("pcie syserr", ILC_IRQ(184), -1),
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STM_PLAT_RESOURCE_IRQ_NAMED("msi mux", ILC_IRQ(180), -1),
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{
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.start = MSI_FIRST_IRQ,
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.end = MSI_LAST_IRQ,
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.name = "msi range",
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.flags = IORESOURCE_IRQ,
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}
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},
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.dev.platform_data = &stx7108_plat_pcie_config,
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};
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void __init stx7108_configure_pcie(struct stx7108_pcie_config *config)
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{
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struct sysconf_field *sc;
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sc = sysconf_claim(SYS_CFG_BANK4, 69, 0, 6, "pcie");
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BUG_ON(!sc);
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stx7108_plat_pcie_config.ops_handle = sc;
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stx7108_plat_pcie_config.reset_gpio = config->reset_gpio;
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stx7108_plat_pcie_config.reset = config->reset;
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/* There is only one PCIe controller on the 7108c2 and it is hardwired
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* to use lane1
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*/
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stx7108_plat_pcie_config.miphy_num = 1;
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platform_device_register(&stx7108_pcie_device);
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}
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/* PCI Resources ---------------------------------------------------------- */
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/* You may pass one of the PCI_PIN_* constants to use dedicated pin or
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* just pass interrupt number generated with gpio_to_irq() when
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* non-standard PIO pads are used as interrupts. */
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int stx7108_pcibios_map_platform_irq(struct stm_plat_pci_config *pci_config,
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u8 pin)
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{
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int irq;
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int pin_type;
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if ((pin > 4) || (pin < 1))
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return -1;
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pin_type = pci_config->pci_irq[pin - 1];
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switch (pin_type) {
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case PCI_PIN_DEFAULT:
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irq = ILC_IRQ(122 + pin - 1);
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break;
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case PCI_PIN_ALTERNATIVE:
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/* No alternative here... */
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BUG();
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irq = -1;
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break;
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case PCI_PIN_UNUSED:
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irq = -1; /* Not used */
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break;
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default:
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irq = pin_type; /* Take whatever interrupt you are told */
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break;
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}
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return irq;
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}
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static struct platform_device stx7108_pci_device = {
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.name = "pci_stm",
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.id = -1,
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.num_resources = 7,
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.resource = (struct resource[]) {
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STM_PLAT_RESOURCE_MEM_NAMED("pci memory", 0xc0000000,
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960 * 1024 * 1024),
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{
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.name = "pci io",
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.start = 0x0400,
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.end = 0xffff,
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.flags = IORESOURCE_IO,
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},
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STM_PLAT_RESOURCE_MEM_NAMED("pci emiss", 0xfdaa8000, 0x17fc),
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STM_PLAT_RESOURCE_MEM_NAMED("pci ahb", 0xfea08000, 0xff),
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STM_PLAT_RESOURCE_IRQ_NAMED("pci dma", ILC_IRQ(126), -1),
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STM_PLAT_RESOURCE_IRQ_NAMED("pci err", ILC_IRQ(127), -1),
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/* SERR interrupt set in stx7105_configure_pci() */
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STM_PLAT_RESOURCE_IRQ_NAMED("pci serr", -1, -1),
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},
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};
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#define STX7108_PIO_PCI_SERR stm_gpio(6, 6)
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static struct stm_pad_config stx7108_pci_reqgnt_pad_config[] = {
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/* REQ0/GNT0 have dedicated pins... */
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[1] = {
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.gpios_num = 2,
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.gpios = (struct stm_pad_gpio []) {
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STM_PAD_PIO_IN(8, 6, 2), /* REQ1 */
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STM_PAD_PIO_OUT(8, 7, 2), /* GNT1 */
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},
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},
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[2] = {
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.gpios_num = 2,
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.gpios = (struct stm_pad_gpio []) {
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STM_PAD_PIO_IN(2, 4, 2), /* REQ2 */
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STM_PAD_PIO_OUT(2, 5, 2), /* GNT2 */
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},
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},
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[3] = {
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.gpios_num = 2,
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.gpios = (struct stm_pad_gpio []) {
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STM_PAD_PIO_IN(9, 4, 2), /* REQ3 */
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STM_PAD_PIO_OUT(9, 5, 2), /* GNT3 */
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},
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},
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};
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static struct stm_pad_config stx7108_pci_int_pad_config[] = {
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[0] = {
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.gpios_num = 1,
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.gpios = (struct stm_pad_gpio []) {
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STM_PAD_PIO_IN(8, 4, 2), /* INTA */
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},
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},
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[1] = {
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.gpios_num = 1,
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.gpios = (struct stm_pad_gpio []) {
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STM_PAD_PIO_IN(8, 5, 2), /* INTB */
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},
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},
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[2] = {
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.gpios_num = 1,
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.gpios = (struct stm_pad_gpio []) {
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STM_PAD_PIO_IN(2, 6, 2), /* INTC */
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},
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},
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[3] = {
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.gpios_num = 1,
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.gpios = (struct stm_pad_gpio []) {
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STM_PAD_PIO_IN(3, 4, 2), /* INTD */
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},
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},
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};
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void __init stx7108_configure_pci(struct stm_plat_pci_config *pci_conf)
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{
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struct sysconf_field *sc;
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int i;
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/* LLA clocks have these horrible names... */
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pci_conf->clk_name = "CLKA_PCI";
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/* REQ0 is actually wired to REQ3 to work around NAND problems */
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pci_conf->req0_to_req3 = 1;
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BUG_ON(pci_conf->req_gnt[3] != PCI_PIN_UNUSED);
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/* Fill in the default values */
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if (!pci_conf->ad_override_default) {
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pci_conf->ad_threshold = 5;
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pci_conf->ad_read_ahead = 1;
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pci_conf->ad_chunks_in_msg = 0;
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pci_conf->ad_pcks_in_chunk = 0;
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pci_conf->ad_trigger_mode = 1;
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pci_conf->ad_max_opcode = 5;
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pci_conf->ad_posted = 1;
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}
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/* Copy over platform specific data to driver */
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stx7108_pci_device.dev.platform_data = pci_conf;
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#if defined(CONFIG_PM)
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#warning TODO: PCI Power Management
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#endif
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/* Claim and power up the PCI cell */
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sc = sysconf_claim(SYS_CFG_BANK2, 30, 2, 2, "PCI_PWR_DWN_REQ");
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sysconf_write(sc, 0); /* We will need to stash this somewhere
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for power management. */
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sc = sysconf_claim(SYS_STA_BANK2, 1, 2, 2, "PCI_PWR_DWN_GRANT");
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while (sysconf_read(sc))
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cpu_relax(); /* Loop until powered up */
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/* Configure the REQ/GNT[1..2], muxed with PIOs */
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for (i = 1; i <= 2; i++) {
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switch (pci_conf->req_gnt[i]) {
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case PCI_PIN_DEFAULT:
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if (stm_pad_claim(&stx7108_pci_reqgnt_pad_config[i],
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"PCI") == NULL) {
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printk(KERN_ERR "Failed to claim REQ/GNT%d "
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"pads!\n", i);
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BUG();
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}
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break;
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case PCI_PIN_UNUSED:
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/* Unused is unused - nothing to do */
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break;
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default:
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/* No alternative here... */
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BUG();
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break;
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}
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}
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/* Configure INTA..D interrupts */
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for (i = 0; i < 4; i++) {
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switch (pci_conf->pci_irq[i]) {
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case PCI_PIN_DEFAULT:
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if (stm_pad_claim(&stx7108_pci_int_pad_config[i],
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"PCI") == NULL) {
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printk(KERN_ERR "Failed to claim INT%c pad!\n",
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'A' + i);
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BUG();
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}
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set_irq_type(ILC_IRQ(122 + i), IRQ_TYPE_LEVEL_LOW);
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break;
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case PCI_PIN_ALTERNATIVE:
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/* There is no alternative here ;-) */
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BUG();
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break;
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default:
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/* Unused or interrupt number passed, nothing to do */
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break;
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}
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}
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/* Configure the SERR interrupt (if wired up) */
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switch (pci_conf->serr_irq) {
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case PCI_PIN_DEFAULT:
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if (gpio_request(STX7108_PIO_PCI_SERR, "PCI_SERR#") == 0) {
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gpio_direction_input(STX7108_PIO_PCI_SERR);
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pci_conf->serr_irq = gpio_to_irq(STX7108_PIO_PCI_SERR);
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set_irq_type(pci_conf->serr_irq, IRQ_TYPE_LEVEL_LOW);
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} else {
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printk(KERN_WARNING "%s(): Failed to claim PCI SERR# "
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"PIO!\n", __func__);
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pci_conf->serr_irq = PCI_PIN_UNUSED;
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}
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break;
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case PCI_PIN_ALTERNATIVE:
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/* No alternative here */
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BUG();
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pci_conf->serr_irq = PCI_PIN_UNUSED;
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break;
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}
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if (pci_conf->serr_irq != PCI_PIN_UNUSED) {
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struct resource *res =
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platform_get_resource_byname(&stx7108_pci_device,
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IORESOURCE_IRQ, "pci serr");
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BUG_ON(!res);
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res->start = pci_conf->serr_irq;
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res->end = pci_conf->serr_irq;
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}
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/* LOCK is not claimed as is totally pointless, the SOCs do not
|
||
|
|
* support any form of coherency */
|
||
|
|
|
||
|
|
stx7108_pci_device.dev.parent =
|
||
|
|
bus_find_device_by_name(&platform_bus_type, NULL, "emi");
|
||
|
|
platform_device_register(&stx7108_pci_device);
|
||
|
|
}
|