389 lines
7.8 KiB
C
389 lines
7.8 KiB
C
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/*
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* MPC83xx suspend support
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*
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* Author: Scott Wood <scottwood@freescale.com>
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*
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* Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/pm.h>
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#include <linux/types.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/wait.h>
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#include <linux/kthread.h>
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#include <linux/freezer.h>
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#include <linux/suspend.h>
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#include <linux/fsl_devices.h>
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#include <linux/of_platform.h>
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#include <asm/reg.h>
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#include <asm/io.h>
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#include <asm/time.h>
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#include <asm/mpc6xx.h>
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#include <sysdev/fsl_soc.h>
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#define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
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#define PMCCR1_NEXT_STATE_SHIFT 2
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#define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
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#define IMMR_RCW_OFFSET 0x900
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#define RCW_PCI_HOST 0x80000000
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void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
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struct mpc83xx_pmc {
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u32 config;
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#define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
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#define PMCCR_SLPEN 1 /* System low power enable */
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u32 event;
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u32 mask;
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/* All but PMCI are deep-sleep only */
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#define PMCER_GPIO 0x100
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#define PMCER_PCI 0x080
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#define PMCER_USB 0x040
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#define PMCER_ETSEC1 0x020
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#define PMCER_ETSEC2 0x010
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#define PMCER_TIMER 0x008
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#define PMCER_INT1 0x004
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#define PMCER_INT2 0x002
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#define PMCER_PMCI 0x001
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#define PMCER_ALL 0x1FF
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/* deep-sleep only */
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u32 config1;
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#define PMCCR1_USE_STATE 0x80000000
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#define PMCCR1_PME_EN 0x00000080
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#define PMCCR1_ASSERT_PME 0x00000040
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#define PMCCR1_POWER_OFF 0x00000020
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/* deep-sleep only */
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u32 config2;
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};
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struct mpc83xx_rcw {
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u32 rcwlr;
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u32 rcwhr;
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};
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struct mpc83xx_clock {
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u32 spmr;
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u32 occr;
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u32 sccr;
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};
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struct pmc_type {
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int has_deep_sleep;
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};
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static struct of_device *pmc_dev;
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static int has_deep_sleep, deep_sleeping;
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static int pmc_irq;
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static struct mpc83xx_pmc __iomem *pmc_regs;
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static struct mpc83xx_clock __iomem *clock_regs;
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static int is_pci_agent, wake_from_pci;
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static phys_addr_t immrbase;
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static int pci_pm_state;
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static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
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int fsl_deep_sleep(void)
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{
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return deep_sleeping;
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}
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static int mpc83xx_change_state(void)
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{
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u32 curr_state;
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u32 reg_cfg1 = in_be32(&pmc_regs->config1);
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if (is_pci_agent) {
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pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
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PMCCR1_NEXT_STATE_SHIFT;
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curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
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if (curr_state != pci_pm_state) {
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reg_cfg1 &= ~PMCCR1_CURR_STATE;
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reg_cfg1 |= pci_pm_state;
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out_be32(&pmc_regs->config1, reg_cfg1);
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wake_up(&agent_wq);
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return 1;
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}
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}
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return 0;
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}
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static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
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{
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u32 event = in_be32(&pmc_regs->event);
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int ret = IRQ_NONE;
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if (mpc83xx_change_state())
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ret = IRQ_HANDLED;
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if (event) {
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out_be32(&pmc_regs->event, event);
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ret = IRQ_HANDLED;
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}
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return ret;
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}
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static int mpc83xx_suspend_enter(suspend_state_t state)
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{
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int ret = -EAGAIN;
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/* Don't go to sleep if there's a race where pci_pm_state changes
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* between the agent thread checking it and the PM code disabling
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* interrupts.
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*/
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if (wake_from_pci) {
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if (pci_pm_state != (deep_sleeping ? 3 : 2))
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goto out;
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out_be32(&pmc_regs->config1,
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in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
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}
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/* Put the system into low-power mode and the RAM
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* into self-refresh mode once the core goes to
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* sleep.
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*/
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out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
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/* If it has deep sleep (i.e. it's an 831x or compatible),
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* disable power to the core upon entering sleep mode. This will
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* require going through the boot firmware upon a wakeup event.
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*/
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if (deep_sleeping) {
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out_be32(&pmc_regs->mask, PMCER_ALL);
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out_be32(&pmc_regs->config1,
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in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
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enable_kernel_fp();
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mpc83xx_enter_deep_sleep(immrbase);
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out_be32(&pmc_regs->config1,
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in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
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out_be32(&pmc_regs->mask, PMCER_PMCI);
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} else {
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out_be32(&pmc_regs->mask, PMCER_PMCI);
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mpc6xx_enter_standby();
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}
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ret = 0;
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out:
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out_be32(&pmc_regs->config1,
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in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
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return ret;
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}
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static void mpc83xx_suspend_finish(void)
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{
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deep_sleeping = 0;
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}
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static int mpc83xx_suspend_valid(suspend_state_t state)
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{
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return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
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}
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static int mpc83xx_suspend_begin(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_STANDBY:
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deep_sleeping = 0;
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return 0;
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case PM_SUSPEND_MEM:
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if (has_deep_sleep)
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deep_sleeping = 1;
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return 0;
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default:
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return -EINVAL;
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}
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}
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static int agent_thread_fn(void *data)
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{
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while (1) {
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wait_event_interruptible(agent_wq, pci_pm_state >= 2);
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try_to_freeze();
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if (signal_pending(current) || pci_pm_state < 2)
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continue;
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/* With a preemptible kernel (or SMP), this could race with
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* a userspace-driven suspend request. It's probably best
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* to avoid mixing the two with such a configuration (or
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* else fix it by adding a mutex to state_store that we can
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* synchronize with).
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*/
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wake_from_pci = 1;
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pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
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PM_SUSPEND_STANDBY);
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wake_from_pci = 0;
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}
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return 0;
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}
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static void mpc83xx_set_agent(void)
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{
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out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
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out_be32(&pmc_regs->mask, PMCER_PMCI);
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kthread_run(agent_thread_fn, NULL, "PCI power mgt");
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}
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static int mpc83xx_is_pci_agent(void)
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{
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struct mpc83xx_rcw __iomem *rcw_regs;
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int ret;
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rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
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sizeof(struct mpc83xx_rcw));
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if (!rcw_regs)
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return -ENOMEM;
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ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
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iounmap(rcw_regs);
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return ret;
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}
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static struct platform_suspend_ops mpc83xx_suspend_ops = {
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.valid = mpc83xx_suspend_valid,
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.begin = mpc83xx_suspend_begin,
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.enter = mpc83xx_suspend_enter,
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.finish = mpc83xx_suspend_finish,
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};
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static int pmc_probe(struct of_device *ofdev,
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const struct of_device_id *match)
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{
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struct device_node *np = ofdev->node;
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struct resource res;
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struct pmc_type *type = match->data;
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int ret = 0;
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if (!of_device_is_available(np))
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return -ENODEV;
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has_deep_sleep = type->has_deep_sleep;
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immrbase = get_immrbase();
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pmc_dev = ofdev;
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is_pci_agent = mpc83xx_is_pci_agent();
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if (is_pci_agent < 0)
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return is_pci_agent;
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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return -ENODEV;
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pmc_irq = irq_of_parse_and_map(np, 0);
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if (pmc_irq != NO_IRQ) {
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ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
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"pmc", ofdev);
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if (ret)
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return -EBUSY;
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}
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pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
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if (!pmc_regs) {
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ret = -ENOMEM;
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goto out;
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}
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ret = of_address_to_resource(np, 1, &res);
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if (ret) {
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ret = -ENODEV;
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goto out_pmc;
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}
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clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
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if (!clock_regs) {
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ret = -ENOMEM;
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goto out_pmc;
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}
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if (is_pci_agent)
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mpc83xx_set_agent();
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suspend_set_ops(&mpc83xx_suspend_ops);
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return 0;
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out_pmc:
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iounmap(pmc_regs);
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out:
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if (pmc_irq != NO_IRQ)
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free_irq(pmc_irq, ofdev);
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return ret;
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}
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static int pmc_remove(struct of_device *ofdev)
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{
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return -EPERM;
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};
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static struct pmc_type pmc_types[] = {
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{
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.has_deep_sleep = 1,
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},
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{
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.has_deep_sleep = 0,
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}
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};
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static struct of_device_id pmc_match[] = {
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{
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.compatible = "fsl,mpc8313-pmc",
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.data = &pmc_types[0],
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},
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{
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.compatible = "fsl,mpc8349-pmc",
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.data = &pmc_types[1],
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},
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{}
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};
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static struct of_platform_driver pmc_driver = {
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.name = "mpc83xx-pmc",
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.match_table = pmc_match,
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.probe = pmc_probe,
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.remove = pmc_remove
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};
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static int pmc_init(void)
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{
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return of_register_platform_driver(&pmc_driver);
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}
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module_init(pmc_init);
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