771 lines
20 KiB
C
771 lines
20 KiB
C
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/*
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* cxgb3i_ddp.c: Chelsio S3xx iSCSI DDP Manager.
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*
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* Copyright (c) 2008 Chelsio Communications, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*
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* Written by: Karen Xie (kxie@chelsio.com)
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*/
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#include <linux/skbuff.h>
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#include <linux/scatterlist.h>
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/* from cxgb3 LLD */
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#include "common.h"
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#include "t3_cpl.h"
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#include "t3cdev.h"
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#include "cxgb3_ctl_defs.h"
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#include "cxgb3_offload.h"
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#include "firmware_exports.h"
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#include "cxgb3i_ddp.h"
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#define ddp_log_error(fmt...) printk(KERN_ERR "cxgb3i_ddp: ERR! " fmt)
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#define ddp_log_warn(fmt...) printk(KERN_WARNING "cxgb3i_ddp: WARN! " fmt)
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#define ddp_log_info(fmt...) printk(KERN_INFO "cxgb3i_ddp: " fmt)
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#ifdef __DEBUG_CXGB3I_DDP__
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#define ddp_log_debug(fmt, args...) \
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printk(KERN_INFO "cxgb3i_ddp: %s - " fmt, __func__ , ## args)
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#else
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#define ddp_log_debug(fmt...)
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#endif
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/*
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* iSCSI Direct Data Placement
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*
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* T3 h/w can directly place the iSCSI Data-In or Data-Out PDU's payload into
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* pre-posted final destination host-memory buffers based on the Initiator
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* Task Tag (ITT) in Data-In or Target Task Tag (TTT) in Data-Out PDUs.
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*
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* The host memory address is programmed into h/w in the format of pagepod
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* entries.
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* The location of the pagepod entry is encoded into ddp tag which is used or
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* is the base for ITT/TTT.
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*/
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#define DDP_PGIDX_MAX 4
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#define DDP_THRESHOLD 2048
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static unsigned char ddp_page_order[DDP_PGIDX_MAX] = {0, 1, 2, 4};
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static unsigned char ddp_page_shift[DDP_PGIDX_MAX] = {12, 13, 14, 16};
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static unsigned char page_idx = DDP_PGIDX_MAX;
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/*
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* functions to program the pagepod in h/w
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*/
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static inline void ulp_mem_io_set_hdr(struct sk_buff *skb, unsigned int addr)
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{
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struct ulp_mem_io *req = (struct ulp_mem_io *)skb->head;
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req->wr.wr_lo = 0;
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req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_BYPASS));
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req->cmd_lock_addr = htonl(V_ULP_MEMIO_ADDR(addr >> 5) |
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V_ULPTX_CMD(ULP_MEM_WRITE));
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req->len = htonl(V_ULP_MEMIO_DATA_LEN(PPOD_SIZE >> 5) |
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V_ULPTX_NFLITS((PPOD_SIZE >> 3) + 1));
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}
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static int set_ddp_map(struct cxgb3i_ddp_info *ddp, struct pagepod_hdr *hdr,
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unsigned int idx, unsigned int npods,
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struct cxgb3i_gather_list *gl)
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{
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unsigned int pm_addr = (idx << PPOD_SIZE_SHIFT) + ddp->llimit;
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int i;
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for (i = 0; i < npods; i++, idx++, pm_addr += PPOD_SIZE) {
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struct sk_buff *skb = ddp->gl_skb[idx];
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struct pagepod *ppod;
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int j, pidx;
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/* hold on to the skb until we clear the ddp mapping */
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skb_get(skb);
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ulp_mem_io_set_hdr(skb, pm_addr);
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ppod = (struct pagepod *)
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(skb->head + sizeof(struct ulp_mem_io));
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memcpy(&(ppod->hdr), hdr, sizeof(struct pagepod));
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for (pidx = 4 * i, j = 0; j < 5; ++j, ++pidx)
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ppod->addr[j] = pidx < gl->nelem ?
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cpu_to_be64(gl->phys_addr[pidx]) : 0UL;
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skb->priority = CPL_PRIORITY_CONTROL;
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cxgb3_ofld_send(ddp->tdev, skb);
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}
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return 0;
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}
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static void clear_ddp_map(struct cxgb3i_ddp_info *ddp, unsigned int tag,
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unsigned int idx, unsigned int npods)
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{
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unsigned int pm_addr = (idx << PPOD_SIZE_SHIFT) + ddp->llimit;
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int i;
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for (i = 0; i < npods; i++, idx++, pm_addr += PPOD_SIZE) {
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struct sk_buff *skb = ddp->gl_skb[idx];
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if (!skb) {
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ddp_log_error("ddp tag 0x%x, 0x%x, %d/%u, skb NULL.\n",
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tag, idx, i, npods);
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continue;
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}
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ddp->gl_skb[idx] = NULL;
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memset((skb->head + sizeof(struct ulp_mem_io)), 0, PPOD_SIZE);
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ulp_mem_io_set_hdr(skb, pm_addr);
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skb->priority = CPL_PRIORITY_CONTROL;
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cxgb3_ofld_send(ddp->tdev, skb);
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}
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}
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static inline int ddp_find_unused_entries(struct cxgb3i_ddp_info *ddp,
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unsigned int start, unsigned int max,
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unsigned int count,
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struct cxgb3i_gather_list *gl)
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{
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unsigned int i, j, k;
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/* not enough entries */
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if ((max - start) < count)
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return -EBUSY;
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max -= count;
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spin_lock(&ddp->map_lock);
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for (i = start; i < max;) {
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for (j = 0, k = i; j < count; j++, k++) {
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if (ddp->gl_map[k])
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break;
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}
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if (j == count) {
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for (j = 0, k = i; j < count; j++, k++)
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ddp->gl_map[k] = gl;
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spin_unlock(&ddp->map_lock);
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return i;
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}
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i += j + 1;
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}
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spin_unlock(&ddp->map_lock);
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return -EBUSY;
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}
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static inline void ddp_unmark_entries(struct cxgb3i_ddp_info *ddp,
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int start, int count)
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{
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spin_lock(&ddp->map_lock);
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memset(&ddp->gl_map[start], 0,
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count * sizeof(struct cxgb3i_gather_list *));
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spin_unlock(&ddp->map_lock);
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}
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static inline void ddp_free_gl_skb(struct cxgb3i_ddp_info *ddp,
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int idx, int count)
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{
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int i;
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for (i = 0; i < count; i++, idx++)
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if (ddp->gl_skb[idx]) {
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kfree_skb(ddp->gl_skb[idx]);
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ddp->gl_skb[idx] = NULL;
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}
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}
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static inline int ddp_alloc_gl_skb(struct cxgb3i_ddp_info *ddp, int idx,
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int count, gfp_t gfp)
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{
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int i;
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for (i = 0; i < count; i++) {
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struct sk_buff *skb = alloc_skb(sizeof(struct ulp_mem_io) +
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PPOD_SIZE, gfp);
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if (skb) {
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ddp->gl_skb[idx + i] = skb;
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skb_put(skb, sizeof(struct ulp_mem_io) + PPOD_SIZE);
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} else {
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ddp_free_gl_skb(ddp, idx, i);
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return -ENOMEM;
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}
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}
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return 0;
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}
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/**
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* cxgb3i_ddp_find_page_index - return ddp page index for a given page size
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* @pgsz: page size
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* return the ddp page index, if no match is found return DDP_PGIDX_MAX.
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*/
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int cxgb3i_ddp_find_page_index(unsigned long pgsz)
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{
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int i;
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for (i = 0; i < DDP_PGIDX_MAX; i++) {
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if (pgsz == (1UL << ddp_page_shift[i]))
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return i;
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}
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ddp_log_debug("ddp page size 0x%lx not supported.\n", pgsz);
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return DDP_PGIDX_MAX;
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}
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/**
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* cxgb3i_ddp_adjust_page_table - adjust page table with PAGE_SIZE
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* return the ddp page index, if no match is found return DDP_PGIDX_MAX.
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*/
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int cxgb3i_ddp_adjust_page_table(void)
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{
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int i;
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unsigned int base_order, order;
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if (PAGE_SIZE < (1UL << ddp_page_shift[0])) {
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ddp_log_info("PAGE_SIZE 0x%lx too small, min. 0x%lx.\n",
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PAGE_SIZE, 1UL << ddp_page_shift[0]);
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return -EINVAL;
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}
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base_order = get_order(1UL << ddp_page_shift[0]);
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order = get_order(1 << PAGE_SHIFT);
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for (i = 0; i < DDP_PGIDX_MAX; i++) {
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/* first is the kernel page size, then just doubling the size */
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ddp_page_order[i] = order - base_order + i;
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ddp_page_shift[i] = PAGE_SHIFT + i;
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}
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return 0;
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}
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static inline void ddp_gl_unmap(struct pci_dev *pdev,
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struct cxgb3i_gather_list *gl)
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{
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int i;
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for (i = 0; i < gl->nelem; i++)
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pci_unmap_page(pdev, gl->phys_addr[i], PAGE_SIZE,
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PCI_DMA_FROMDEVICE);
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}
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static inline int ddp_gl_map(struct pci_dev *pdev,
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struct cxgb3i_gather_list *gl)
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{
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int i;
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for (i = 0; i < gl->nelem; i++) {
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gl->phys_addr[i] = pci_map_page(pdev, gl->pages[i], 0,
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PAGE_SIZE,
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PCI_DMA_FROMDEVICE);
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if (unlikely(pci_dma_mapping_error(pdev, gl->phys_addr[i])))
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goto unmap;
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}
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return i;
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unmap:
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if (i) {
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unsigned int nelem = gl->nelem;
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gl->nelem = i;
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ddp_gl_unmap(pdev, gl);
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gl->nelem = nelem;
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}
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return -ENOMEM;
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}
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/**
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* cxgb3i_ddp_make_gl - build ddp page buffer list
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* @xferlen: total buffer length
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* @sgl: page buffer scatter-gather list
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* @sgcnt: # of page buffers
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* @pdev: pci_dev, used for pci map
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* @gfp: allocation mode
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*
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* construct a ddp page buffer list from the scsi scattergather list.
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* coalesce buffers as much as possible, and obtain dma addresses for
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* each page.
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*
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* Return the cxgb3i_gather_list constructed from the page buffers if the
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* memory can be used for ddp. Return NULL otherwise.
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*/
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struct cxgb3i_gather_list *cxgb3i_ddp_make_gl(unsigned int xferlen,
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struct scatterlist *sgl,
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unsigned int sgcnt,
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struct pci_dev *pdev,
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gfp_t gfp)
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{
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struct cxgb3i_gather_list *gl;
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struct scatterlist *sg = sgl;
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struct page *sgpage = sg_page(sg);
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unsigned int sglen = sg->length;
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unsigned int sgoffset = sg->offset;
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unsigned int npages = (xferlen + sgoffset + PAGE_SIZE - 1) >>
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PAGE_SHIFT;
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int i = 1, j = 0;
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if (xferlen < DDP_THRESHOLD) {
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ddp_log_debug("xfer %u < threshold %u, no ddp.\n",
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xferlen, DDP_THRESHOLD);
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return NULL;
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}
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gl = kzalloc(sizeof(struct cxgb3i_gather_list) +
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npages * (sizeof(dma_addr_t) + sizeof(struct page *)),
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gfp);
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if (!gl)
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return NULL;
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gl->pages = (struct page **)&gl->phys_addr[npages];
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gl->length = xferlen;
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gl->offset = sgoffset;
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gl->pages[0] = sgpage;
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sg = sg_next(sg);
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while (sg) {
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struct page *page = sg_page(sg);
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if (sgpage == page && sg->offset == sgoffset + sglen)
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sglen += sg->length;
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else {
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/* make sure the sgl is fit for ddp:
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* each has the same page size, and
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* all of the middle pages are used completely
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*/
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if ((j && sgoffset) ||
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((i != sgcnt - 1) &&
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((sglen + sgoffset) & ~PAGE_MASK)))
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goto error_out;
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j++;
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if (j == gl->nelem || sg->offset)
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goto error_out;
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gl->pages[j] = page;
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sglen = sg->length;
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sgoffset = sg->offset;
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sgpage = page;
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}
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i++;
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sg = sg_next(sg);
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}
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gl->nelem = ++j;
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if (ddp_gl_map(pdev, gl) < 0)
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goto error_out;
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return gl;
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error_out:
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kfree(gl);
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return NULL;
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}
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/**
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* cxgb3i_ddp_release_gl - release a page buffer list
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* @gl: a ddp page buffer list
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* @pdev: pci_dev used for pci_unmap
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* free a ddp page buffer list resulted from cxgb3i_ddp_make_gl().
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*/
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void cxgb3i_ddp_release_gl(struct cxgb3i_gather_list *gl,
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struct pci_dev *pdev)
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{
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ddp_gl_unmap(pdev, gl);
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kfree(gl);
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}
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/**
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* cxgb3i_ddp_tag_reserve - set up ddp for a data transfer
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* @tdev: t3cdev adapter
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* @tid: connection id
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* @tformat: tag format
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* @tagp: contains s/w tag initially, will be updated with ddp/hw tag
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* @gl: the page momory list
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* @gfp: allocation mode
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*
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* ddp setup for a given page buffer list and construct the ddp tag.
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* return 0 if success, < 0 otherwise.
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*/
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int cxgb3i_ddp_tag_reserve(struct t3cdev *tdev, unsigned int tid,
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struct cxgb3i_tag_format *tformat, u32 *tagp,
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struct cxgb3i_gather_list *gl, gfp_t gfp)
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{
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struct cxgb3i_ddp_info *ddp = tdev->ulp_iscsi;
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struct pagepod_hdr hdr;
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unsigned int npods;
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int idx = -1;
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int err = -ENOMEM;
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u32 sw_tag = *tagp;
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u32 tag;
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if (page_idx >= DDP_PGIDX_MAX || !ddp || !gl || !gl->nelem ||
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gl->length < DDP_THRESHOLD) {
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ddp_log_debug("pgidx %u, xfer %u/%u, NO ddp.\n",
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page_idx, gl->length, DDP_THRESHOLD);
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return -EINVAL;
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}
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npods = (gl->nelem + PPOD_PAGES_MAX - 1) >> PPOD_PAGES_SHIFT;
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if (ddp->idx_last == ddp->nppods)
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idx = ddp_find_unused_entries(ddp, 0, ddp->nppods, npods, gl);
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else {
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idx = ddp_find_unused_entries(ddp, ddp->idx_last + 1,
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ddp->nppods, npods, gl);
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if (idx < 0 && ddp->idx_last >= npods) {
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||
|
idx = ddp_find_unused_entries(ddp, 0,
|
||
|
min(ddp->idx_last + npods, ddp->nppods),
|
||
|
npods, gl);
|
||
|
}
|
||
|
}
|
||
|
if (idx < 0) {
|
||
|
ddp_log_debug("xferlen %u, gl %u, npods %u NO DDP.\n",
|
||
|
gl->length, gl->nelem, npods);
|
||
|
return idx;
|
||
|
}
|
||
|
|
||
|
err = ddp_alloc_gl_skb(ddp, idx, npods, gfp);
|
||
|
if (err < 0)
|
||
|
goto unmark_entries;
|
||
|
|
||
|
tag = cxgb3i_ddp_tag_base(tformat, sw_tag);
|
||
|
tag |= idx << PPOD_IDX_SHIFT;
|
||
|
|
||
|
hdr.rsvd = 0;
|
||
|
hdr.vld_tid = htonl(F_PPOD_VALID | V_PPOD_TID(tid));
|
||
|
hdr.pgsz_tag_clr = htonl(tag & ddp->rsvd_tag_mask);
|
||
|
hdr.maxoffset = htonl(gl->length);
|
||
|
hdr.pgoffset = htonl(gl->offset);
|
||
|
|
||
|
err = set_ddp_map(ddp, &hdr, idx, npods, gl);
|
||
|
if (err < 0)
|
||
|
goto free_gl_skb;
|
||
|
|
||
|
ddp->idx_last = idx;
|
||
|
ddp_log_debug("xfer %u, gl %u,%u, tid 0x%x, 0x%x -> 0x%x(%u,%u).\n",
|
||
|
gl->length, gl->nelem, gl->offset, tid, sw_tag, tag,
|
||
|
idx, npods);
|
||
|
*tagp = tag;
|
||
|
return 0;
|
||
|
|
||
|
free_gl_skb:
|
||
|
ddp_free_gl_skb(ddp, idx, npods);
|
||
|
unmark_entries:
|
||
|
ddp_unmark_entries(ddp, idx, npods);
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* cxgb3i_ddp_tag_release - release a ddp tag
|
||
|
* @tdev: t3cdev adapter
|
||
|
* @tag: ddp tag
|
||
|
* ddp cleanup for a given ddp tag and release all the resources held
|
||
|
*/
|
||
|
void cxgb3i_ddp_tag_release(struct t3cdev *tdev, u32 tag)
|
||
|
{
|
||
|
struct cxgb3i_ddp_info *ddp = tdev->ulp_iscsi;
|
||
|
u32 idx;
|
||
|
|
||
|
if (!ddp) {
|
||
|
ddp_log_error("release ddp tag 0x%x, ddp NULL.\n", tag);
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
idx = (tag >> PPOD_IDX_SHIFT) & ddp->idx_mask;
|
||
|
if (idx < ddp->nppods) {
|
||
|
struct cxgb3i_gather_list *gl = ddp->gl_map[idx];
|
||
|
unsigned int npods;
|
||
|
|
||
|
if (!gl || !gl->nelem) {
|
||
|
ddp_log_error("release 0x%x, idx 0x%x, gl 0x%p, %u.\n",
|
||
|
tag, idx, gl, gl ? gl->nelem : 0);
|
||
|
return;
|
||
|
}
|
||
|
npods = (gl->nelem + PPOD_PAGES_MAX - 1) >> PPOD_PAGES_SHIFT;
|
||
|
ddp_log_debug("ddp tag 0x%x, release idx 0x%x, npods %u.\n",
|
||
|
tag, idx, npods);
|
||
|
clear_ddp_map(ddp, tag, idx, npods);
|
||
|
ddp_unmark_entries(ddp, idx, npods);
|
||
|
cxgb3i_ddp_release_gl(gl, ddp->pdev);
|
||
|
} else
|
||
|
ddp_log_error("ddp tag 0x%x, idx 0x%x > max 0x%x.\n",
|
||
|
tag, idx, ddp->nppods);
|
||
|
}
|
||
|
|
||
|
static int setup_conn_pgidx(struct t3cdev *tdev, unsigned int tid, int pg_idx,
|
||
|
int reply)
|
||
|
{
|
||
|
struct sk_buff *skb = alloc_skb(sizeof(struct cpl_set_tcb_field),
|
||
|
GFP_KERNEL);
|
||
|
struct cpl_set_tcb_field *req;
|
||
|
u64 val = pg_idx < DDP_PGIDX_MAX ? pg_idx : 0;
|
||
|
|
||
|
if (!skb)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
/* set up ulp submode and page size */
|
||
|
req = (struct cpl_set_tcb_field *)skb_put(skb, sizeof(*req));
|
||
|
req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
|
||
|
OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid));
|
||
|
req->reply = V_NO_REPLY(reply ? 0 : 1);
|
||
|
req->cpu_idx = 0;
|
||
|
req->word = htons(31);
|
||
|
req->mask = cpu_to_be64(0xF0000000);
|
||
|
req->val = cpu_to_be64(val << 28);
|
||
|
skb->priority = CPL_PRIORITY_CONTROL;
|
||
|
|
||
|
cxgb3_ofld_send(tdev, skb);
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* cxgb3i_setup_conn_host_pagesize - setup the conn.'s ddp page size
|
||
|
* @tdev: t3cdev adapter
|
||
|
* @tid: connection id
|
||
|
* @reply: request reply from h/w
|
||
|
* set up the ddp page size based on the host PAGE_SIZE for a connection
|
||
|
* identified by tid
|
||
|
*/
|
||
|
int cxgb3i_setup_conn_host_pagesize(struct t3cdev *tdev, unsigned int tid,
|
||
|
int reply)
|
||
|
{
|
||
|
return setup_conn_pgidx(tdev, tid, page_idx, reply);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* cxgb3i_setup_conn_pagesize - setup the conn.'s ddp page size
|
||
|
* @tdev: t3cdev adapter
|
||
|
* @tid: connection id
|
||
|
* @reply: request reply from h/w
|
||
|
* @pgsz: ddp page size
|
||
|
* set up the ddp page size for a connection identified by tid
|
||
|
*/
|
||
|
int cxgb3i_setup_conn_pagesize(struct t3cdev *tdev, unsigned int tid,
|
||
|
int reply, unsigned long pgsz)
|
||
|
{
|
||
|
int pgidx = cxgb3i_ddp_find_page_index(pgsz);
|
||
|
|
||
|
return setup_conn_pgidx(tdev, tid, pgidx, reply);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* cxgb3i_setup_conn_digest - setup conn. digest setting
|
||
|
* @tdev: t3cdev adapter
|
||
|
* @tid: connection id
|
||
|
* @hcrc: header digest enabled
|
||
|
* @dcrc: data digest enabled
|
||
|
* @reply: request reply from h/w
|
||
|
* set up the iscsi digest settings for a connection identified by tid
|
||
|
*/
|
||
|
int cxgb3i_setup_conn_digest(struct t3cdev *tdev, unsigned int tid,
|
||
|
int hcrc, int dcrc, int reply)
|
||
|
{
|
||
|
struct sk_buff *skb = alloc_skb(sizeof(struct cpl_set_tcb_field),
|
||
|
GFP_KERNEL);
|
||
|
struct cpl_set_tcb_field *req;
|
||
|
u64 val = (hcrc ? 1 : 0) | (dcrc ? 2 : 0);
|
||
|
|
||
|
if (!skb)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
/* set up ulp submode and page size */
|
||
|
req = (struct cpl_set_tcb_field *)skb_put(skb, sizeof(*req));
|
||
|
req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
|
||
|
OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid));
|
||
|
req->reply = V_NO_REPLY(reply ? 0 : 1);
|
||
|
req->cpu_idx = 0;
|
||
|
req->word = htons(31);
|
||
|
req->mask = cpu_to_be64(0x0F000000);
|
||
|
req->val = cpu_to_be64(val << 24);
|
||
|
skb->priority = CPL_PRIORITY_CONTROL;
|
||
|
|
||
|
cxgb3_ofld_send(tdev, skb);
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
|
||
|
/**
|
||
|
* cxgb3i_adapter_ddp_info - read the adapter's ddp information
|
||
|
* @tdev: t3cdev adapter
|
||
|
* @tformat: tag format
|
||
|
* @txsz: max tx pdu payload size, filled in by this func.
|
||
|
* @rxsz: max rx pdu payload size, filled in by this func.
|
||
|
* setup the tag format for a given iscsi entity
|
||
|
*/
|
||
|
int cxgb3i_adapter_ddp_info(struct t3cdev *tdev,
|
||
|
struct cxgb3i_tag_format *tformat,
|
||
|
unsigned int *txsz, unsigned int *rxsz)
|
||
|
{
|
||
|
struct cxgb3i_ddp_info *ddp;
|
||
|
unsigned char idx_bits;
|
||
|
|
||
|
if (!tformat)
|
||
|
return -EINVAL;
|
||
|
|
||
|
if (!tdev->ulp_iscsi)
|
||
|
return -EINVAL;
|
||
|
|
||
|
ddp = (struct cxgb3i_ddp_info *)tdev->ulp_iscsi;
|
||
|
|
||
|
idx_bits = 32 - tformat->sw_bits;
|
||
|
tformat->rsvd_bits = ddp->idx_bits;
|
||
|
tformat->rsvd_shift = PPOD_IDX_SHIFT;
|
||
|
tformat->rsvd_mask = (1 << tformat->rsvd_bits) - 1;
|
||
|
|
||
|
ddp_log_info("tag format: sw %u, rsvd %u,%u, mask 0x%x.\n",
|
||
|
tformat->sw_bits, tformat->rsvd_bits,
|
||
|
tformat->rsvd_shift, tformat->rsvd_mask);
|
||
|
|
||
|
*txsz = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
|
||
|
ddp->max_txsz - ISCSI_PDU_NONPAYLOAD_LEN);
|
||
|
*rxsz = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
|
||
|
ddp->max_rxsz - ISCSI_PDU_NONPAYLOAD_LEN);
|
||
|
ddp_log_info("max payload size: %u/%u, %u/%u.\n",
|
||
|
*txsz, ddp->max_txsz, *rxsz, ddp->max_rxsz);
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* cxgb3i_ddp_cleanup - release the cxgb3 adapter's ddp resource
|
||
|
* @tdev: t3cdev adapter
|
||
|
* release all the resource held by the ddp pagepod manager for a given
|
||
|
* adapter if needed
|
||
|
*/
|
||
|
|
||
|
static void ddp_cleanup(struct kref *kref)
|
||
|
{
|
||
|
struct cxgb3i_ddp_info *ddp = container_of(kref,
|
||
|
struct cxgb3i_ddp_info,
|
||
|
refcnt);
|
||
|
int i = 0;
|
||
|
|
||
|
ddp_log_info("kref release ddp 0x%p, t3dev 0x%p.\n", ddp, ddp->tdev);
|
||
|
|
||
|
ddp->tdev->ulp_iscsi = NULL;
|
||
|
while (i < ddp->nppods) {
|
||
|
struct cxgb3i_gather_list *gl = ddp->gl_map[i];
|
||
|
if (gl) {
|
||
|
int npods = (gl->nelem + PPOD_PAGES_MAX - 1)
|
||
|
>> PPOD_PAGES_SHIFT;
|
||
|
ddp_log_info("t3dev 0x%p, ddp %d + %d.\n",
|
||
|
ddp->tdev, i, npods);
|
||
|
kfree(gl);
|
||
|
ddp_free_gl_skb(ddp, i, npods);
|
||
|
i += npods;
|
||
|
} else
|
||
|
i++;
|
||
|
}
|
||
|
cxgb3i_free_big_mem(ddp);
|
||
|
}
|
||
|
|
||
|
void cxgb3i_ddp_cleanup(struct t3cdev *tdev)
|
||
|
{
|
||
|
struct cxgb3i_ddp_info *ddp = (struct cxgb3i_ddp_info *)tdev->ulp_iscsi;
|
||
|
|
||
|
ddp_log_info("t3dev 0x%p, release ddp 0x%p.\n", tdev, ddp);
|
||
|
if (ddp)
|
||
|
kref_put(&ddp->refcnt, ddp_cleanup);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* ddp_init - initialize the cxgb3 adapter's ddp resource
|
||
|
* @tdev: t3cdev adapter
|
||
|
* initialize the ddp pagepod manager for a given adapter
|
||
|
*/
|
||
|
static void ddp_init(struct t3cdev *tdev)
|
||
|
{
|
||
|
struct cxgb3i_ddp_info *ddp = tdev->ulp_iscsi;
|
||
|
struct ulp_iscsi_info uinfo;
|
||
|
unsigned int ppmax, bits;
|
||
|
int i, err;
|
||
|
|
||
|
if (ddp) {
|
||
|
kref_get(&ddp->refcnt);
|
||
|
ddp_log_warn("t3dev 0x%p, ddp 0x%p already set up.\n",
|
||
|
tdev, tdev->ulp_iscsi);
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
err = tdev->ctl(tdev, ULP_ISCSI_GET_PARAMS, &uinfo);
|
||
|
if (err < 0) {
|
||
|
ddp_log_error("%s, failed to get iscsi param err=%d.\n",
|
||
|
tdev->name, err);
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
ppmax = (uinfo.ulimit - uinfo.llimit + 1) >> PPOD_SIZE_SHIFT;
|
||
|
bits = __ilog2_u32(ppmax) + 1;
|
||
|
if (bits > PPOD_IDX_MAX_SIZE)
|
||
|
bits = PPOD_IDX_MAX_SIZE;
|
||
|
ppmax = (1 << (bits - 1)) - 1;
|
||
|
|
||
|
ddp = cxgb3i_alloc_big_mem(sizeof(struct cxgb3i_ddp_info) +
|
||
|
ppmax *
|
||
|
(sizeof(struct cxgb3i_gather_list *) +
|
||
|
sizeof(struct sk_buff *)),
|
||
|
GFP_KERNEL);
|
||
|
if (!ddp) {
|
||
|
ddp_log_warn("%s unable to alloc ddp 0x%d, ddp disabled.\n",
|
||
|
tdev->name, ppmax);
|
||
|
return;
|
||
|
}
|
||
|
ddp->gl_map = (struct cxgb3i_gather_list **)(ddp + 1);
|
||
|
ddp->gl_skb = (struct sk_buff **)(((char *)ddp->gl_map) +
|
||
|
ppmax *
|
||
|
sizeof(struct cxgb3i_gather_list *));
|
||
|
spin_lock_init(&ddp->map_lock);
|
||
|
kref_init(&ddp->refcnt);
|
||
|
|
||
|
ddp->tdev = tdev;
|
||
|
ddp->pdev = uinfo.pdev;
|
||
|
ddp->max_txsz = min_t(unsigned int, uinfo.max_txsz, ULP2_MAX_PKT_SIZE);
|
||
|
ddp->max_rxsz = min_t(unsigned int, uinfo.max_rxsz, ULP2_MAX_PKT_SIZE);
|
||
|
ddp->llimit = uinfo.llimit;
|
||
|
ddp->ulimit = uinfo.ulimit;
|
||
|
ddp->nppods = ppmax;
|
||
|
ddp->idx_last = ppmax;
|
||
|
ddp->idx_bits = bits;
|
||
|
ddp->idx_mask = (1 << bits) - 1;
|
||
|
ddp->rsvd_tag_mask = (1 << (bits + PPOD_IDX_SHIFT)) - 1;
|
||
|
|
||
|
uinfo.tagmask = ddp->idx_mask << PPOD_IDX_SHIFT;
|
||
|
for (i = 0; i < DDP_PGIDX_MAX; i++)
|
||
|
uinfo.pgsz_factor[i] = ddp_page_order[i];
|
||
|
uinfo.ulimit = uinfo.llimit + (ppmax << PPOD_SIZE_SHIFT);
|
||
|
|
||
|
err = tdev->ctl(tdev, ULP_ISCSI_SET_PARAMS, &uinfo);
|
||
|
if (err < 0) {
|
||
|
ddp_log_warn("%s unable to set iscsi param err=%d, "
|
||
|
"ddp disabled.\n", tdev->name, err);
|
||
|
goto free_ddp_map;
|
||
|
}
|
||
|
|
||
|
tdev->ulp_iscsi = ddp;
|
||
|
|
||
|
ddp_log_info("tdev 0x%p, nppods %u, bits %u, mask 0x%x,0x%x pkt %u/%u,"
|
||
|
" %u/%u.\n",
|
||
|
tdev, ppmax, ddp->idx_bits, ddp->idx_mask,
|
||
|
ddp->rsvd_tag_mask, ddp->max_txsz, uinfo.max_txsz,
|
||
|
ddp->max_rxsz, uinfo.max_rxsz);
|
||
|
return;
|
||
|
|
||
|
free_ddp_map:
|
||
|
cxgb3i_free_big_mem(ddp);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* cxgb3i_ddp_init - initialize ddp functions
|
||
|
*/
|
||
|
void cxgb3i_ddp_init(struct t3cdev *tdev)
|
||
|
{
|
||
|
if (page_idx == DDP_PGIDX_MAX) {
|
||
|
page_idx = cxgb3i_ddp_find_page_index(PAGE_SIZE);
|
||
|
|
||
|
if (page_idx == DDP_PGIDX_MAX) {
|
||
|
ddp_log_info("system PAGE_SIZE %lu, update hw.\n",
|
||
|
PAGE_SIZE);
|
||
|
if (cxgb3i_ddp_adjust_page_table() < 0) {
|
||
|
ddp_log_info("PAGE_SIZE %lu, ddp disabled.\n",
|
||
|
PAGE_SIZE);
|
||
|
return;
|
||
|
}
|
||
|
page_idx = cxgb3i_ddp_find_page_index(PAGE_SIZE);
|
||
|
}
|
||
|
ddp_log_info("system PAGE_SIZE %lu, ddp idx %u.\n",
|
||
|
PAGE_SIZE, page_idx);
|
||
|
}
|
||
|
ddp_init(tdev);
|
||
|
}
|