627 lines
19 KiB
C
627 lines
19 KiB
C
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#ifndef __marb_foo_defs_h
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#define __marb_foo_defs_h
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/*
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* This file is autogenerated from
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* file: marb_foo.r
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*
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* by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r
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* Any changes here will be lost.
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*
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* -*- buffer-read-only: t -*-
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*/
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/* Main access macros */
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#ifndef REG_RD
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#define REG_RD( scope, inst, reg ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR
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#define REG_WR( scope, inst, reg, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_VECT
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#define REG_RD_VECT( scope, inst, reg, index ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_VECT
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#define REG_WR_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT
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#define REG_RD_INT( scope, inst, reg ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT
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#define REG_WR_INT( scope, inst, reg, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT_VECT
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#define REG_RD_INT_VECT( scope, inst, reg, index ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT_VECT
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#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_TYPE_CONV
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#define REG_TYPE_CONV( type, orgtype, val ) \
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( { union { orgtype o; type n; } r; r.o = val; r.n; } )
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#endif
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#ifndef reg_page_size
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#define reg_page_size 8192
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#endif
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#ifndef REG_ADDR
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#define REG_ADDR( scope, inst, reg ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_ADDR_VECT
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#define REG_ADDR_VECT( scope, inst, reg, index ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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/* C-code for register scope marb_foo */
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#define STRIDE_marb_foo_rw_intm_slots 4
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/* Register rw_intm_slots, scope marb_foo, type rw */
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typedef struct {
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unsigned int owner : 4;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_intm_slots;
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#define REG_RD_ADDR_marb_foo_rw_intm_slots 0
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#define REG_WR_ADDR_marb_foo_rw_intm_slots 0
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#define STRIDE_marb_foo_rw_l2_slots 4
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/* Register rw_l2_slots, scope marb_foo, type rw */
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typedef struct {
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unsigned int owner : 4;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_l2_slots;
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#define REG_RD_ADDR_marb_foo_rw_l2_slots 256
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#define REG_WR_ADDR_marb_foo_rw_l2_slots 256
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#define STRIDE_marb_foo_rw_regs_slots 4
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/* Register rw_regs_slots, scope marb_foo, type rw */
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typedef struct {
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unsigned int owner : 4;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_regs_slots;
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#define REG_RD_ADDR_marb_foo_rw_regs_slots 512
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#define REG_WR_ADDR_marb_foo_rw_regs_slots 512
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/* Register rw_sclr_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_sclr_burst;
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#define REG_RD_ADDR_marb_foo_rw_sclr_burst 528
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#define REG_WR_ADDR_marb_foo_rw_sclr_burst 528
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/* Register rw_dma0_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma0_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma0_burst 532
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#define REG_WR_ADDR_marb_foo_rw_dma0_burst 532
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/* Register rw_dma1_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma1_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma1_burst 536
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#define REG_WR_ADDR_marb_foo_rw_dma1_burst 536
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/* Register rw_dma2_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma2_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma2_burst 540
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#define REG_WR_ADDR_marb_foo_rw_dma2_burst 540
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/* Register rw_dma3_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma3_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma3_burst 544
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#define REG_WR_ADDR_marb_foo_rw_dma3_burst 544
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/* Register rw_dma4_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma4_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma4_burst 548
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#define REG_WR_ADDR_marb_foo_rw_dma4_burst 548
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/* Register rw_dma5_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma5_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma5_burst 552
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#define REG_WR_ADDR_marb_foo_rw_dma5_burst 552
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/* Register rw_dma6_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma6_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma6_burst 556
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#define REG_WR_ADDR_marb_foo_rw_dma6_burst 556
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/* Register rw_dma7_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma7_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma7_burst 560
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#define REG_WR_ADDR_marb_foo_rw_dma7_burst 560
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/* Register rw_dma9_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma9_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma9_burst 564
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#define REG_WR_ADDR_marb_foo_rw_dma9_burst 564
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/* Register rw_dma11_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_dma11_burst;
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#define REG_RD_ADDR_marb_foo_rw_dma11_burst 568
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#define REG_WR_ADDR_marb_foo_rw_dma11_burst 568
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/* Register rw_cpui_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_cpui_burst;
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#define REG_RD_ADDR_marb_foo_rw_cpui_burst 572
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#define REG_WR_ADDR_marb_foo_rw_cpui_burst 572
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/* Register rw_cpud_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_cpud_burst;
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#define REG_RD_ADDR_marb_foo_rw_cpud_burst 576
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#define REG_WR_ADDR_marb_foo_rw_cpud_burst 576
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/* Register rw_iop_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_iop_burst;
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#define REG_RD_ADDR_marb_foo_rw_iop_burst 580
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#define REG_WR_ADDR_marb_foo_rw_iop_burst 580
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/* Register rw_ccdstat_burst, scope marb_foo, type rw */
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typedef struct {
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unsigned int intm_bsize : 2;
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unsigned int l2_bsize : 2;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_ccdstat_burst;
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#define REG_RD_ADDR_marb_foo_rw_ccdstat_burst 584
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#define REG_WR_ADDR_marb_foo_rw_ccdstat_burst 584
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/* Register rw_intr_mask, scope marb_foo, type rw */
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typedef struct {
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unsigned int bp0 : 1;
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unsigned int bp1 : 1;
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unsigned int bp2 : 1;
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unsigned int bp3 : 1;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_intr_mask;
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#define REG_RD_ADDR_marb_foo_rw_intr_mask 588
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#define REG_WR_ADDR_marb_foo_rw_intr_mask 588
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/* Register rw_ack_intr, scope marb_foo, type rw */
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typedef struct {
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unsigned int bp0 : 1;
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unsigned int bp1 : 1;
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unsigned int bp2 : 1;
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unsigned int bp3 : 1;
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unsigned int dummy1 : 28;
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} reg_marb_foo_rw_ack_intr;
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#define REG_RD_ADDR_marb_foo_rw_ack_intr 592
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#define REG_WR_ADDR_marb_foo_rw_ack_intr 592
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/* Register r_intr, scope marb_foo, type r */
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typedef struct {
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unsigned int bp0 : 1;
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unsigned int bp1 : 1;
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unsigned int bp2 : 1;
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unsigned int bp3 : 1;
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unsigned int dummy1 : 28;
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} reg_marb_foo_r_intr;
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#define REG_RD_ADDR_marb_foo_r_intr 596
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/* Register r_masked_intr, scope marb_foo, type r */
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typedef struct {
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unsigned int bp0 : 1;
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unsigned int bp1 : 1;
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unsigned int bp2 : 1;
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unsigned int bp3 : 1;
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unsigned int dummy1 : 28;
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} reg_marb_foo_r_masked_intr;
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#define REG_RD_ADDR_marb_foo_r_masked_intr 600
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/* Register rw_stop_mask, scope marb_foo, type rw */
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typedef struct {
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unsigned int sclr : 1;
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unsigned int dma0 : 1;
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unsigned int dma1 : 1;
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unsigned int dma2 : 1;
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unsigned int dma3 : 1;
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unsigned int dma4 : 1;
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unsigned int dma5 : 1;
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unsigned int dma6 : 1;
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unsigned int dma7 : 1;
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unsigned int dma9 : 1;
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unsigned int dma11 : 1;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int iop : 1;
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unsigned int ccdstat : 1;
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unsigned int dummy1 : 17;
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} reg_marb_foo_rw_stop_mask;
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#define REG_RD_ADDR_marb_foo_rw_stop_mask 604
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#define REG_WR_ADDR_marb_foo_rw_stop_mask 604
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/* Register r_stopped, scope marb_foo, type r */
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typedef struct {
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unsigned int sclr : 1;
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unsigned int dma0 : 1;
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unsigned int dma1 : 1;
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unsigned int dma2 : 1;
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unsigned int dma3 : 1;
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unsigned int dma4 : 1;
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unsigned int dma5 : 1;
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unsigned int dma6 : 1;
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unsigned int dma7 : 1;
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unsigned int dma9 : 1;
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unsigned int dma11 : 1;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int iop : 1;
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unsigned int ccdstat : 1;
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unsigned int dummy1 : 17;
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} reg_marb_foo_r_stopped;
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#define REG_RD_ADDR_marb_foo_r_stopped 608
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/* Register rw_no_snoop, scope marb_foo, type rw */
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typedef struct {
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unsigned int sclr : 1;
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unsigned int dma0 : 1;
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unsigned int dma1 : 1;
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unsigned int dma2 : 1;
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unsigned int dma3 : 1;
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unsigned int dma4 : 1;
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unsigned int dma5 : 1;
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unsigned int dma6 : 1;
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unsigned int dma7 : 1;
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unsigned int dma9 : 1;
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unsigned int dma11 : 1;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int iop : 1;
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unsigned int ccdstat : 1;
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unsigned int dummy1 : 17;
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} reg_marb_foo_rw_no_snoop;
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#define REG_RD_ADDR_marb_foo_rw_no_snoop 896
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#define REG_WR_ADDR_marb_foo_rw_no_snoop 896
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/* Register rw_no_snoop_rq, scope marb_foo, type rw */
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typedef struct {
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unsigned int dummy1 : 11;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int dummy2 : 19;
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} reg_marb_foo_rw_no_snoop_rq;
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#define REG_RD_ADDR_marb_foo_rw_no_snoop_rq 900
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#define REG_WR_ADDR_marb_foo_rw_no_snoop_rq 900
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/* Constants */
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enum {
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regk_marb_foo_ccdstat = 0x0000000e,
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regk_marb_foo_cpud = 0x0000000c,
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regk_marb_foo_cpui = 0x0000000b,
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regk_marb_foo_dma0 = 0x00000001,
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regk_marb_foo_dma1 = 0x00000002,
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regk_marb_foo_dma11 = 0x0000000a,
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regk_marb_foo_dma2 = 0x00000003,
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regk_marb_foo_dma3 = 0x00000004,
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regk_marb_foo_dma4 = 0x00000005,
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regk_marb_foo_dma5 = 0x00000006,
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regk_marb_foo_dma6 = 0x00000007,
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regk_marb_foo_dma7 = 0x00000008,
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regk_marb_foo_dma9 = 0x00000009,
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regk_marb_foo_iop = 0x0000000d,
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regk_marb_foo_no = 0x00000000,
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regk_marb_foo_r_stopped_default = 0x00000000,
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|
regk_marb_foo_rw_ccdstat_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_cpud_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_cpui_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma0_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma11_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma1_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma2_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma3_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma4_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma5_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma6_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma7_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_dma9_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_intm_slots_default = 0x00000000,
|
||
|
regk_marb_foo_rw_intm_slots_size = 0x00000040,
|
||
|
regk_marb_foo_rw_intr_mask_default = 0x00000000,
|
||
|
regk_marb_foo_rw_iop_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_l2_slots_default = 0x00000000,
|
||
|
regk_marb_foo_rw_l2_slots_size = 0x00000040,
|
||
|
regk_marb_foo_rw_no_snoop_default = 0x00000000,
|
||
|
regk_marb_foo_rw_no_snoop_rq_default = 0x00000000,
|
||
|
regk_marb_foo_rw_regs_slots_default = 0x00000000,
|
||
|
regk_marb_foo_rw_regs_slots_size = 0x00000004,
|
||
|
regk_marb_foo_rw_sclr_burst_default = 0x00000000,
|
||
|
regk_marb_foo_rw_stop_mask_default = 0x00000000,
|
||
|
regk_marb_foo_sclr = 0x00000000,
|
||
|
regk_marb_foo_yes = 0x00000001
|
||
|
};
|
||
|
#endif /* __marb_foo_defs_h */
|
||
|
#ifndef __marb_foo_bp_defs_h
|
||
|
#define __marb_foo_bp_defs_h
|
||
|
|
||
|
/*
|
||
|
* This file is autogenerated from
|
||
|
* file: marb_foo.r
|
||
|
*
|
||
|
* by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r
|
||
|
* Any changes here will be lost.
|
||
|
*
|
||
|
* -*- buffer-read-only: t -*-
|
||
|
*/
|
||
|
/* Main access macros */
|
||
|
#ifndef REG_RD
|
||
|
#define REG_RD( scope, inst, reg ) \
|
||
|
REG_READ( reg_##scope##_##reg, \
|
||
|
(inst) + REG_RD_ADDR_##scope##_##reg )
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_WR
|
||
|
#define REG_WR( scope, inst, reg, val ) \
|
||
|
REG_WRITE( reg_##scope##_##reg, \
|
||
|
(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_RD_VECT
|
||
|
#define REG_RD_VECT( scope, inst, reg, index ) \
|
||
|
REG_READ( reg_##scope##_##reg, \
|
||
|
(inst) + REG_RD_ADDR_##scope##_##reg + \
|
||
|
(index) * STRIDE_##scope##_##reg )
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_WR_VECT
|
||
|
#define REG_WR_VECT( scope, inst, reg, index, val ) \
|
||
|
REG_WRITE( reg_##scope##_##reg, \
|
||
|
(inst) + REG_WR_ADDR_##scope##_##reg + \
|
||
|
(index) * STRIDE_##scope##_##reg, (val) )
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_RD_INT
|
||
|
#define REG_RD_INT( scope, inst, reg ) \
|
||
|
REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_WR_INT
|
||
|
#define REG_WR_INT( scope, inst, reg, val ) \
|
||
|
REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_RD_INT_VECT
|
||
|
#define REG_RD_INT_VECT( scope, inst, reg, index ) \
|
||
|
REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
|
||
|
(index) * STRIDE_##scope##_##reg )
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_WR_INT_VECT
|
||
|
#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
|
||
|
REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
|
||
|
(index) * STRIDE_##scope##_##reg, (val) )
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_TYPE_CONV
|
||
|
#define REG_TYPE_CONV( type, orgtype, val ) \
|
||
|
( { union { orgtype o; type n; } r; r.o = val; r.n; } )
|
||
|
#endif
|
||
|
|
||
|
#ifndef reg_page_size
|
||
|
#define reg_page_size 8192
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_ADDR
|
||
|
#define REG_ADDR( scope, inst, reg ) \
|
||
|
( (inst) + REG_RD_ADDR_##scope##_##reg )
|
||
|
#endif
|
||
|
|
||
|
#ifndef REG_ADDR_VECT
|
||
|
#define REG_ADDR_VECT( scope, inst, reg, index ) \
|
||
|
( (inst) + REG_RD_ADDR_##scope##_##reg + \
|
||
|
(index) * STRIDE_##scope##_##reg )
|
||
|
#endif
|
||
|
|
||
|
/* C-code for register scope marb_foo_bp */
|
||
|
|
||
|
/* Register rw_first_addr, scope marb_foo_bp, type rw */
|
||
|
typedef unsigned int reg_marb_foo_bp_rw_first_addr;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_rw_first_addr 0
|
||
|
#define REG_WR_ADDR_marb_foo_bp_rw_first_addr 0
|
||
|
|
||
|
/* Register rw_last_addr, scope marb_foo_bp, type rw */
|
||
|
typedef unsigned int reg_marb_foo_bp_rw_last_addr;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_rw_last_addr 4
|
||
|
#define REG_WR_ADDR_marb_foo_bp_rw_last_addr 4
|
||
|
|
||
|
/* Register rw_op, scope marb_foo_bp, type rw */
|
||
|
typedef struct {
|
||
|
unsigned int rd : 1;
|
||
|
unsigned int wr : 1;
|
||
|
unsigned int rd_excl : 1;
|
||
|
unsigned int pri_wr : 1;
|
||
|
unsigned int us_rd : 1;
|
||
|
unsigned int us_wr : 1;
|
||
|
unsigned int us_rd_excl : 1;
|
||
|
unsigned int us_pri_wr : 1;
|
||
|
unsigned int dummy1 : 24;
|
||
|
} reg_marb_foo_bp_rw_op;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_rw_op 8
|
||
|
#define REG_WR_ADDR_marb_foo_bp_rw_op 8
|
||
|
|
||
|
/* Register rw_clients, scope marb_foo_bp, type rw */
|
||
|
typedef struct {
|
||
|
unsigned int sclr : 1;
|
||
|
unsigned int dma0 : 1;
|
||
|
unsigned int dma1 : 1;
|
||
|
unsigned int dma2 : 1;
|
||
|
unsigned int dma3 : 1;
|
||
|
unsigned int dma4 : 1;
|
||
|
unsigned int dma5 : 1;
|
||
|
unsigned int dma6 : 1;
|
||
|
unsigned int dma7 : 1;
|
||
|
unsigned int dma9 : 1;
|
||
|
unsigned int dma11 : 1;
|
||
|
unsigned int cpui : 1;
|
||
|
unsigned int cpud : 1;
|
||
|
unsigned int iop : 1;
|
||
|
unsigned int ccdstat : 1;
|
||
|
unsigned int dummy1 : 17;
|
||
|
} reg_marb_foo_bp_rw_clients;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_rw_clients 12
|
||
|
#define REG_WR_ADDR_marb_foo_bp_rw_clients 12
|
||
|
|
||
|
/* Register rw_options, scope marb_foo_bp, type rw */
|
||
|
typedef struct {
|
||
|
unsigned int wrap : 1;
|
||
|
unsigned int dummy1 : 31;
|
||
|
} reg_marb_foo_bp_rw_options;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_rw_options 16
|
||
|
#define REG_WR_ADDR_marb_foo_bp_rw_options 16
|
||
|
|
||
|
/* Register r_brk_addr, scope marb_foo_bp, type r */
|
||
|
typedef unsigned int reg_marb_foo_bp_r_brk_addr;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_r_brk_addr 20
|
||
|
|
||
|
/* Register r_brk_op, scope marb_foo_bp, type r */
|
||
|
typedef struct {
|
||
|
unsigned int rd : 1;
|
||
|
unsigned int wr : 1;
|
||
|
unsigned int rd_excl : 1;
|
||
|
unsigned int pri_wr : 1;
|
||
|
unsigned int us_rd : 1;
|
||
|
unsigned int us_wr : 1;
|
||
|
unsigned int us_rd_excl : 1;
|
||
|
unsigned int us_pri_wr : 1;
|
||
|
unsigned int dummy1 : 24;
|
||
|
} reg_marb_foo_bp_r_brk_op;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_r_brk_op 24
|
||
|
|
||
|
/* Register r_brk_clients, scope marb_foo_bp, type r */
|
||
|
typedef struct {
|
||
|
unsigned int sclr : 1;
|
||
|
unsigned int dma0 : 1;
|
||
|
unsigned int dma1 : 1;
|
||
|
unsigned int dma2 : 1;
|
||
|
unsigned int dma3 : 1;
|
||
|
unsigned int dma4 : 1;
|
||
|
unsigned int dma5 : 1;
|
||
|
unsigned int dma6 : 1;
|
||
|
unsigned int dma7 : 1;
|
||
|
unsigned int dma9 : 1;
|
||
|
unsigned int dma11 : 1;
|
||
|
unsigned int cpui : 1;
|
||
|
unsigned int cpud : 1;
|
||
|
unsigned int iop : 1;
|
||
|
unsigned int ccdstat : 1;
|
||
|
unsigned int dummy1 : 17;
|
||
|
} reg_marb_foo_bp_r_brk_clients;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_r_brk_clients 28
|
||
|
|
||
|
/* Register r_brk_first_client, scope marb_foo_bp, type r */
|
||
|
typedef struct {
|
||
|
unsigned int sclr : 1;
|
||
|
unsigned int dma0 : 1;
|
||
|
unsigned int dma1 : 1;
|
||
|
unsigned int dma2 : 1;
|
||
|
unsigned int dma3 : 1;
|
||
|
unsigned int dma4 : 1;
|
||
|
unsigned int dma5 : 1;
|
||
|
unsigned int dma6 : 1;
|
||
|
unsigned int dma7 : 1;
|
||
|
unsigned int dma9 : 1;
|
||
|
unsigned int dma11 : 1;
|
||
|
unsigned int cpui : 1;
|
||
|
unsigned int cpud : 1;
|
||
|
unsigned int iop : 1;
|
||
|
unsigned int ccdstat : 1;
|
||
|
unsigned int dummy1 : 17;
|
||
|
} reg_marb_foo_bp_r_brk_first_client;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_r_brk_first_client 32
|
||
|
|
||
|
/* Register r_brk_size, scope marb_foo_bp, type r */
|
||
|
typedef unsigned int reg_marb_foo_bp_r_brk_size;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_r_brk_size 36
|
||
|
|
||
|
/* Register rw_ack, scope marb_foo_bp, type rw */
|
||
|
typedef unsigned int reg_marb_foo_bp_rw_ack;
|
||
|
#define REG_RD_ADDR_marb_foo_bp_rw_ack 40
|
||
|
#define REG_WR_ADDR_marb_foo_bp_rw_ack 40
|
||
|
|
||
|
|
||
|
/* Constants */
|
||
|
enum {
|
||
|
regk_marb_foo_bp_no = 0x00000000,
|
||
|
regk_marb_foo_bp_rw_op_default = 0x00000000,
|
||
|
regk_marb_foo_bp_rw_options_default = 0x00000000,
|
||
|
regk_marb_foo_bp_yes = 0x00000001
|
||
|
};
|
||
|
#endif /* __marb_foo_bp_defs_h */
|