87 lines
2.4 KiB
C
87 lines
2.4 KiB
C
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/*
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* arch/arm/mach-ns9xxx/include/mach/irqs.h
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*
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* Copyright (C) 2006,2007 by Digi International Inc.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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/* NetSilicon 9360 */
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#define IRQ_NS9XXX_WATCHDOG 0
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#define IRQ_NS9XXX_AHBBUSERR 1
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#define IRQ_NS9360_BBUSAGG 2
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/* irq 3 is reserved for NS9360 */
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#define IRQ_NS9XXX_ETHRX 4
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#define IRQ_NS9XXX_ETHTX 5
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#define IRQ_NS9XXX_ETHPHY 6
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#define IRQ_NS9360_LCD 7
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#define IRQ_NS9360_SERBRX 8
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#define IRQ_NS9360_SERBTX 9
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#define IRQ_NS9360_SERARX 10
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#define IRQ_NS9360_SERATX 11
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#define IRQ_NS9360_SERCRX 12
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#define IRQ_NS9360_SERCTX 13
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#define IRQ_NS9360_I2C 14
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#define IRQ_NS9360_BBUSDMA 15
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#define IRQ_NS9360_TIMER0 16
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#define IRQ_NS9360_TIMER1 17
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#define IRQ_NS9360_TIMER2 18
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#define IRQ_NS9360_TIMER3 19
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#define IRQ_NS9360_TIMER4 20
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#define IRQ_NS9360_TIMER5 21
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#define IRQ_NS9360_TIMER6 22
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#define IRQ_NS9360_TIMER7 23
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#define IRQ_NS9360_RTC 24
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#define IRQ_NS9360_USBHOST 25
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#define IRQ_NS9360_USBDEVICE 26
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#define IRQ_NS9360_IEEE1284 27
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#define IRQ_NS9XXX_EXT0 28
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#define IRQ_NS9XXX_EXT1 29
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#define IRQ_NS9XXX_EXT2 30
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#define IRQ_NS9XXX_EXT3 31
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#define BBUS_IRQ(irq) (32 + irq)
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#define IRQ_BBUS_DMA BBUS_IRQ(0)
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#define IRQ_BBUS_SERBRX BBUS_IRQ(2)
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#define IRQ_BBUS_SERBTX BBUS_IRQ(3)
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#define IRQ_BBUS_SERARX BBUS_IRQ(4)
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#define IRQ_BBUS_SERATX BBUS_IRQ(5)
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#define IRQ_BBUS_SERCRX BBUS_IRQ(6)
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#define IRQ_BBUS_SERCTX BBUS_IRQ(7)
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#define IRQ_BBUS_SERDRX BBUS_IRQ(8)
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#define IRQ_BBUS_SERDTX BBUS_IRQ(9)
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#define IRQ_BBUS_I2C BBUS_IRQ(10)
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#define IRQ_BBUS_1284 BBUS_IRQ(11)
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#define IRQ_BBUS_UTIL BBUS_IRQ(12)
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#define IRQ_BBUS_RTC BBUS_IRQ(13)
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#define IRQ_BBUS_USBHST BBUS_IRQ(14)
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#define IRQ_BBUS_USBDEV BBUS_IRQ(15)
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#define IRQ_BBUS_AHBDMA1 BBUS_IRQ(24)
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#define IRQ_BBUS_AHBDMA2 BBUS_IRQ(25)
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/*
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* these Interrupts are specific for the a9m9750dev board.
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* They are generated by an FPGA that interrupts the CPU on
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* IRQ_NS9360_EXT2
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*/
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#define FPGA_IRQ(irq) (64 + irq)
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#define IRQ_FPGA_UARTA FPGA_IRQ(0)
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#define IRQ_FPGA_UARTB FPGA_IRQ(1)
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#define IRQ_FPGA_UARTC FPGA_IRQ(2)
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#define IRQ_FPGA_UARTD FPGA_IRQ(3)
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#define IRQ_FPGA_TOUCH FPGA_IRQ(4)
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#define IRQ_FPGA_CF FPGA_IRQ(5)
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#define IRQ_FPGA_CAN0 FPGA_IRQ(6)
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#define IRQ_FPGA_CAN1 FPGA_IRQ(7)
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#define NR_IRQS 72
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#endif /* __ASM_ARCH_IRQS_H */
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