644 lines
15 KiB
C
644 lines
15 KiB
C
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/*
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* Copyright 2004-2009 Analog Devices Inc.
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* 2005 National ICT Australia (NICTA)
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* Aidan Williams <aidan@nicta.com.au>
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*
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* Licensed under the GPL-2
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/dma.h>
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#include <asm/gpio.h>
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#include <asm/nand.h>
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#include <asm/portmux.h>
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#include <asm/dpmc.h>
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#include <linux/input.h>
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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const char bfin_board_name[] = "ADI BF538-EZKIT";
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/*
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* Driver needs to know address, irq and flag pin.
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*/
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#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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static struct platform_device rtc_device = {
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.name = "rtc-bfin",
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.id = -1,
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};
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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static struct resource bfin_uart_resources[] = {
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#ifdef CONFIG_SERIAL_BFIN_UART0
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{
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.start = 0xFFC00400,
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.end = 0xFFC004FF,
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.flags = IORESOURCE_MEM,
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},
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#endif
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#ifdef CONFIG_SERIAL_BFIN_UART1
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{
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.start = 0xFFC02000,
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.end = 0xFFC020FF,
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.flags = IORESOURCE_MEM,
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},
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#endif
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#ifdef CONFIG_SERIAL_BFIN_UART2
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{
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.start = 0xFFC02100,
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.end = 0xFFC021FF,
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.flags = IORESOURCE_MEM,
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},
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#endif
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};
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static struct platform_device bfin_uart_device = {
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.name = "bfin-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_uart_resources),
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.resource = bfin_uart_resources,
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};
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#endif
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#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
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#ifdef CONFIG_BFIN_SIR0
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static struct resource bfin_sir0_resources[] = {
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{
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.start = 0xFFC00400,
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.end = 0xFFC004FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART0_RX,
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.end = IRQ_UART0_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART0_RX,
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.end = CH_UART0_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device bfin_sir0_device = {
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.name = "bfin_sir",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_sir0_resources),
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.resource = bfin_sir0_resources,
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};
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#endif
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#ifdef CONFIG_BFIN_SIR1
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static struct resource bfin_sir1_resources[] = {
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{
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.start = 0xFFC02000,
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.end = 0xFFC020FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART1_RX,
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.end = IRQ_UART1_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART1_RX,
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.end = CH_UART1_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device bfin_sir1_device = {
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.name = "bfin_sir",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_sir1_resources),
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.resource = bfin_sir1_resources,
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};
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#endif
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#ifdef CONFIG_BFIN_SIR2
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static struct resource bfin_sir2_resources[] = {
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{
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.start = 0xFFC02100,
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.end = 0xFFC021FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART2_RX,
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.end = IRQ_UART2_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART2_RX,
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.end = CH_UART2_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device bfin_sir2_device = {
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.name = "bfin_sir",
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.id = 2,
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.num_resources = ARRAY_SIZE(bfin_sir2_resources),
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.resource = bfin_sir2_resources,
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};
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#endif
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#endif
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/*
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* USB-LAN EzExtender board
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* Driver needs to know address, irq and flag pin.
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*/
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#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
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#include <linux/smc91x.h>
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static struct smc91x_platdata smc91x_info = {
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.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
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.leda = RPC_LED_100_10,
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.ledb = RPC_LED_TX_RX,
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};
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static struct resource smc91x_resources[] = {
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{
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.name = "smc91x-regs",
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.start = 0x20310300,
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.end = 0x20310300 + 16,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF0,
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.end = IRQ_PF0,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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.dev = {
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.platform_data = &smc91x_info,
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},
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};
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#endif
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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/* all SPI peripherals info goes here */
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#if defined(CONFIG_MTD_M25P80) \
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|| defined(CONFIG_MTD_M25P80_MODULE)
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/* SPI flash chip (m25p16) */
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static struct mtd_partition bfin_spi_flash_partitions[] = {
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{
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.name = "bootloader(spi)",
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.size = 0x00040000,
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.offset = 0,
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.mask_flags = MTD_CAP_ROM
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}, {
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.name = "linux kernel(spi)",
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.size = 0x1c0000,
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.offset = 0x40000
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}
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};
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static struct flash_platform_data bfin_spi_flash_data = {
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.name = "m25p80",
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.parts = bfin_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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.type = "m25p16",
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};
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static struct bfin5xx_spi_chip spi_flash_chip_info = {
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.enable_dma = 0, /* use dma transfer with this chip*/
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.bits_per_word = 8,
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};
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#endif
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#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
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#include <linux/spi/ad7879.h>
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static const struct ad7879_platform_data bfin_ad7879_ts_info = {
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.model = 7879, /* Model = AD7879 */
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.x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
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.pressure_max = 10000,
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.pressure_min = 0,
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.first_conversion_delay = 3, /* wait 512us before do a first conversion */
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.acquisition_time = 1, /* 4us acquisition time per sample */
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.median = 2, /* do 8 measurements */
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.averaging = 1, /* take the average of 4 middle samples */
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.pen_down_acc_interval = 255, /* 9.4 ms */
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.gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
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.gpio_default = 1, /* During initialization set GPIO = HIGH */
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};
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#endif
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#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
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static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
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.enable_dma = 0,
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.bits_per_word = 16,
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};
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#endif
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#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
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#include <asm/bfin-lq035q1.h>
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static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
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.mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
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.use_bl = 0, /* let something else control the LCD Blacklight */
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.gpio_bl = GPIO_PF7,
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};
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static struct resource bfin_lq035q1_resources[] = {
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{
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.start = IRQ_PPI_ERROR,
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.end = IRQ_PPI_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_lq035q1_device = {
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.name = "bfin-lq035q1",
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.id = -1,
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.num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
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.resource = bfin_lq035q1_resources,
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.dev = {
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.platform_data = &bfin_lq035q1_data,
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},
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};
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#endif
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#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
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static struct bfin5xx_spi_chip spidev_chip_info = {
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.enable_dma = 0,
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.bits_per_word = 8,
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};
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#endif
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#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
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static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
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.enable_dma = 0,
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.bits_per_word = 8,
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};
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#endif
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static struct spi_board_info bf538_spi_board_info[] __initdata = {
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#if defined(CONFIG_MTD_M25P80) \
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|| defined(CONFIG_MTD_M25P80_MODULE)
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{
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/* the modalias must be the same as spi device driver name */
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.modalias = "m25p80", /* Name of spi_driver for this device */
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.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0, /* Framework bus number */
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.chip_select = 1, /* SPI_SSEL1*/
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.platform_data = &bfin_spi_flash_data,
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.controller_data = &spi_flash_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
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{
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.modalias = "ad7879",
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.platform_data = &bfin_ad7879_ts_info,
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.irq = IRQ_PF3,
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.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 1,
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.controller_data = &spi_ad7879_chip_info,
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.mode = SPI_CPHA | SPI_CPOL,
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},
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#endif
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#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
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{
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.modalias = "bfin-lq035q1-spi",
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.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 2,
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.controller_data = &lq035q1_spi_chip_info,
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.mode = SPI_CPHA | SPI_CPOL,
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},
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#endif
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#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
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{
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.modalias = "spidev",
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.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 1,
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.controller_data = &spidev_chip_info,
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},
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#endif
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};
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/* SPI (0) */
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static struct resource bfin_spi0_resource[] = {
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[0] = {
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.start = SPI0_REGBASE,
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.end = SPI0_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = CH_SPI0,
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.end = CH_SPI0,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = IRQ_SPI0,
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.end = IRQ_SPI0,
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.flags = IORESOURCE_IRQ,
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}
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};
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/* SPI (1) */
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static struct resource bfin_spi1_resource[] = {
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[0] = {
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.start = SPI1_REGBASE,
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.end = SPI1_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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|
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.start = CH_SPI1,
|
||
|
|
.end = CH_SPI1,
|
||
|
|
.flags = IORESOURCE_DMA,
|
||
|
|
},
|
||
|
|
[2] = {
|
||
|
|
.start = IRQ_SPI1,
|
||
|
|
.end = IRQ_SPI1,
|
||
|
|
.flags = IORESOURCE_IRQ,
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
/* SPI (2) */
|
||
|
|
static struct resource bfin_spi2_resource[] = {
|
||
|
|
[0] = {
|
||
|
|
.start = SPI2_REGBASE,
|
||
|
|
.end = SPI2_REGBASE + 0xFF,
|
||
|
|
.flags = IORESOURCE_MEM,
|
||
|
|
},
|
||
|
|
[1] = {
|
||
|
|
.start = CH_SPI2,
|
||
|
|
.end = CH_SPI2,
|
||
|
|
.flags = IORESOURCE_DMA,
|
||
|
|
},
|
||
|
|
[2] = {
|
||
|
|
.start = IRQ_SPI2,
|
||
|
|
.end = IRQ_SPI2,
|
||
|
|
.flags = IORESOURCE_IRQ,
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
/* SPI controller data */
|
||
|
|
static struct bfin5xx_spi_master bf538_spi_master_info0 = {
|
||
|
|
.num_chipselect = 8,
|
||
|
|
.enable_dma = 1, /* master has the ability to do dma transfer */
|
||
|
|
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device bf538_spi_master0 = {
|
||
|
|
.name = "bfin-spi",
|
||
|
|
.id = 0, /* Bus number */
|
||
|
|
.num_resources = ARRAY_SIZE(bfin_spi0_resource),
|
||
|
|
.resource = bfin_spi0_resource,
|
||
|
|
.dev = {
|
||
|
|
.platform_data = &bf538_spi_master_info0, /* Passed to driver */
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct bfin5xx_spi_master bf538_spi_master_info1 = {
|
||
|
|
.num_chipselect = 8,
|
||
|
|
.enable_dma = 1, /* master has the ability to do dma transfer */
|
||
|
|
.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device bf538_spi_master1 = {
|
||
|
|
.name = "bfin-spi",
|
||
|
|
.id = 1, /* Bus number */
|
||
|
|
.num_resources = ARRAY_SIZE(bfin_spi1_resource),
|
||
|
|
.resource = bfin_spi1_resource,
|
||
|
|
.dev = {
|
||
|
|
.platform_data = &bf538_spi_master_info1, /* Passed to driver */
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct bfin5xx_spi_master bf538_spi_master_info2 = {
|
||
|
|
.num_chipselect = 8,
|
||
|
|
.enable_dma = 1, /* master has the ability to do dma transfer */
|
||
|
|
.pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device bf538_spi_master2 = {
|
||
|
|
.name = "bfin-spi",
|
||
|
|
.id = 2, /* Bus number */
|
||
|
|
.num_resources = ARRAY_SIZE(bfin_spi2_resource),
|
||
|
|
.resource = bfin_spi2_resource,
|
||
|
|
.dev = {
|
||
|
|
.platform_data = &bf538_spi_master_info2, /* Passed to driver */
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
#endif /* spi master and devices */
|
||
|
|
|
||
|
|
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||
|
|
static struct resource bfin_twi0_resource[] = {
|
||
|
|
[0] = {
|
||
|
|
.start = TWI0_REGBASE,
|
||
|
|
.end = TWI0_REGBASE + 0xFF,
|
||
|
|
.flags = IORESOURCE_MEM,
|
||
|
|
},
|
||
|
|
[1] = {
|
||
|
|
.start = IRQ_TWI0,
|
||
|
|
.end = IRQ_TWI0,
|
||
|
|
.flags = IORESOURCE_IRQ,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device i2c_bfin_twi0_device = {
|
||
|
|
.name = "i2c-bfin-twi",
|
||
|
|
.id = 0,
|
||
|
|
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
|
||
|
|
.resource = bfin_twi0_resource,
|
||
|
|
};
|
||
|
|
|
||
|
|
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
|
||
|
|
static struct resource bfin_twi1_resource[] = {
|
||
|
|
[0] = {
|
||
|
|
.start = TWI1_REGBASE,
|
||
|
|
.end = TWI1_REGBASE + 0xFF,
|
||
|
|
.flags = IORESOURCE_MEM,
|
||
|
|
},
|
||
|
|
[1] = {
|
||
|
|
.start = IRQ_TWI1,
|
||
|
|
.end = IRQ_TWI1,
|
||
|
|
.flags = IORESOURCE_IRQ,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device i2c_bfin_twi1_device = {
|
||
|
|
.name = "i2c-bfin-twi",
|
||
|
|
.id = 1,
|
||
|
|
.num_resources = ARRAY_SIZE(bfin_twi1_resource),
|
||
|
|
.resource = bfin_twi1_resource,
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||
|
|
#include <linux/gpio_keys.h>
|
||
|
|
|
||
|
|
static struct gpio_keys_button bfin_gpio_keys_table[] = {
|
||
|
|
{BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct gpio_keys_platform_data bfin_gpio_keys_data = {
|
||
|
|
.buttons = bfin_gpio_keys_table,
|
||
|
|
.nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device bfin_device_gpiokeys = {
|
||
|
|
.name = "gpio-keys",
|
||
|
|
.dev = {
|
||
|
|
.platform_data = &bfin_gpio_keys_data,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
|
||
|
|
static const unsigned int cclk_vlev_datasheet[] =
|
||
|
|
{
|
||
|
|
/*
|
||
|
|
* Internal VLEV BF538SBBC1533
|
||
|
|
****temporarily using these values until data sheet is updated
|
||
|
|
*/
|
||
|
|
VRPAIR(VLEV_100, 150000000),
|
||
|
|
VRPAIR(VLEV_100, 250000000),
|
||
|
|
VRPAIR(VLEV_110, 276000000),
|
||
|
|
VRPAIR(VLEV_115, 301000000),
|
||
|
|
VRPAIR(VLEV_120, 525000000),
|
||
|
|
VRPAIR(VLEV_125, 550000000),
|
||
|
|
VRPAIR(VLEV_130, 600000000),
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
|
||
|
|
.tuple_tab = cclk_vlev_datasheet,
|
||
|
|
.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
|
||
|
|
.vr_settling_time = 25 /* us */,
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device bfin_dpmc = {
|
||
|
|
.name = "bfin dpmc",
|
||
|
|
.dev = {
|
||
|
|
.platform_data = &bfin_dmpc_vreg_data,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||
|
|
static struct mtd_partition ezkit_partitions[] = {
|
||
|
|
{
|
||
|
|
.name = "bootloader(nor)",
|
||
|
|
.size = 0x40000,
|
||
|
|
.offset = 0,
|
||
|
|
}, {
|
||
|
|
.name = "linux kernel(nor)",
|
||
|
|
.size = 0x180000,
|
||
|
|
.offset = MTDPART_OFS_APPEND,
|
||
|
|
}, {
|
||
|
|
.name = "file system(nor)",
|
||
|
|
.size = MTDPART_SIZ_FULL,
|
||
|
|
.offset = MTDPART_OFS_APPEND,
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct physmap_flash_data ezkit_flash_data = {
|
||
|
|
.width = 2,
|
||
|
|
.parts = ezkit_partitions,
|
||
|
|
.nr_parts = ARRAY_SIZE(ezkit_partitions),
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct resource ezkit_flash_resource = {
|
||
|
|
.start = 0x20000000,
|
||
|
|
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
|
||
|
|
.end = 0x202fffff,
|
||
|
|
#else
|
||
|
|
.end = 0x203fffff,
|
||
|
|
#endif
|
||
|
|
.flags = IORESOURCE_MEM,
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device ezkit_flash_device = {
|
||
|
|
.name = "physmap-flash",
|
||
|
|
.id = 0,
|
||
|
|
.dev = {
|
||
|
|
.platform_data = &ezkit_flash_data,
|
||
|
|
},
|
||
|
|
.num_resources = 1,
|
||
|
|
.resource = &ezkit_flash_resource,
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
|
||
|
|
static struct platform_device *cm_bf538_devices[] __initdata = {
|
||
|
|
|
||
|
|
&bfin_dpmc,
|
||
|
|
|
||
|
|
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
||
|
|
&rtc_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
||
|
|
&bfin_uart_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||
|
|
&bf538_spi_master0,
|
||
|
|
&bf538_spi_master1,
|
||
|
|
&bf538_spi_master2,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||
|
|
&i2c_bfin_twi0_device,
|
||
|
|
&i2c_bfin_twi1_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
||
|
|
#ifdef CONFIG_BFIN_SIR0
|
||
|
|
&bfin_sir0_device,
|
||
|
|
#endif
|
||
|
|
#ifdef CONFIG_BFIN_SIR1
|
||
|
|
&bfin_sir1_device,
|
||
|
|
#endif
|
||
|
|
#ifdef CONFIG_BFIN_SIR2
|
||
|
|
&bfin_sir2_device,
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
|
||
|
|
&smc91x_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
|
||
|
|
&bfin_lq035q1_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||
|
|
&bfin_device_gpiokeys,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||
|
|
&ezkit_flash_device,
|
||
|
|
#endif
|
||
|
|
};
|
||
|
|
|
||
|
|
static int __init ezkit_init(void)
|
||
|
|
{
|
||
|
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||
|
|
platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
|
||
|
|
|
||
|
|
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||
|
|
spi_register_board_info(bf538_spi_board_info,
|
||
|
|
ARRAY_SIZE(bf538_spi_board_info));
|
||
|
|
#endif
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
arch_initcall(ezkit_init);
|