136 lines
2.6 KiB
C
136 lines
2.6 KiB
C
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/* ASB2305 timer specifcations
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_UNIT_TIMEX_H
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#define _ASM_UNIT_TIMEX_H
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#ifndef __ASSEMBLY__
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#include <linux/irq.h>
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#endif /* __ASSEMBLY__ */
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#include <asm/cpu/timer-regs.h>
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#include <unit/clock.h>
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/*
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* jiffies counter specifications
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*/
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#define TMJCBR_MAX 0xffff
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#define TMJCBC TM01BC
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#define TMJCMD TM01MD
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#define TMJCBR TM01BR
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#define TMJCIRQ TM1IRQ
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#define TMJCICR TM1ICR
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#define TMJCICR_LEVEL GxICR_LEVEL_5
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#ifndef __ASSEMBLY__
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static inline void startup_jiffies_counter(void)
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{
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unsigned rate;
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u16 md, t16;
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/* use as little prescaling as possible to avoid losing accuracy */
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md = TM0MD_SRC_IOCLK;
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rate = MN10300_JCCLK / HZ;
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if (rate > TMJCBR_MAX) {
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md = TM0MD_SRC_IOCLK_8;
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rate = MN10300_JCCLK / 8 / HZ;
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if (rate > TMJCBR_MAX) {
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md = TM0MD_SRC_IOCLK_32;
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rate = MN10300_JCCLK / 32 / HZ;
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if (rate > TMJCBR_MAX)
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BUG();
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}
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}
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TMJCBR = rate - 1;
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t16 = TMJCBR;
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TMJCMD =
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md |
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TM1MD_SRC_TM0CASCADE << 8 |
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TM0MD_INIT_COUNTER |
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TM1MD_INIT_COUNTER << 8;
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TMJCMD =
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md |
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TM1MD_SRC_TM0CASCADE << 8 |
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TM0MD_COUNT_ENABLE |
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TM1MD_COUNT_ENABLE << 8;
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t16 = TMJCMD;
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TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
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t16 = TMJCICR;
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}
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static inline void shutdown_jiffies_counter(void)
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{
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}
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#endif /* !__ASSEMBLY__ */
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/*
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* timestamp counter specifications
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*/
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#define TMTSCBR_MAX 0xffffffff
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#define TMTSCBC TM45BC
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#ifndef __ASSEMBLY__
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static inline void startup_timestamp_counter(void)
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{
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/* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
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* - count down from 4Gig-1 to 0 and wrap at IOCLK rate
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*/
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TM45BR = TMTSCBR_MAX;
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TM4MD = TM4MD_SRC_IOCLK;
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TM4MD |= TM4MD_INIT_COUNTER;
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TM4MD &= ~TM4MD_INIT_COUNTER;
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TM4ICR = 0;
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TM5MD = TM5MD_SRC_TM4CASCADE;
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TM5MD |= TM5MD_INIT_COUNTER;
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TM5MD &= ~TM5MD_INIT_COUNTER;
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TM5ICR = 0;
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TM5MD |= TM5MD_COUNT_ENABLE;
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TM4MD |= TM4MD_COUNT_ENABLE;
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}
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static inline void shutdown_timestamp_counter(void)
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{
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TM4MD = 0;
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TM5MD = 0;
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}
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/*
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* we use a cascaded pair of 16-bit down-counting timers to count I/O
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* clock cycles for the purposes of time keeping
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*/
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typedef unsigned long cycles_t;
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static inline cycles_t read_timestamp_counter(void)
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{
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return (cycles_t) TMTSCBC;
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}
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_UNIT_TIMEX_H */
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