300 lines
6.8 KiB
C
300 lines
6.8 KiB
C
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/*
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* Freescale STMP378X platform support
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*
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* Embedded Alley Solutions, Inc <source@embeddedalley.com>
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*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/dma-mapping.h>
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#include <asm/dma.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <mach/pins.h>
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#include <mach/pinmux.h>
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#include <mach/dma.h>
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#include <mach/hardware.h>
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#include <mach/system.h>
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#include <mach/platform.h>
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#include <mach/stmp3xxx.h>
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#include <mach/regs-icoll.h>
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#include <mach/regs-apbh.h>
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#include <mach/regs-apbx.h>
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#include <mach/regs-pxp.h>
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#include <mach/regs-i2c.h>
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#include "stmp378x.h"
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/*
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* IRQ handling
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*/
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static void stmp378x_ack_irq(unsigned int irq)
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{
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/* Tell ICOLL to release IRQ line */
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__raw_writel(0, REGS_ICOLL_BASE + HW_ICOLL_VECTOR);
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/* ACK current interrupt */
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__raw_writel(0x01 /* BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 */,
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REGS_ICOLL_BASE + HW_ICOLL_LEVELACK);
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/* Barrier */
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(void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT);
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}
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static void stmp378x_mask_irq(unsigned int irq)
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{
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/* IRQ disable */
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stmp3xxx_clearl(BM_ICOLL_INTERRUPTn_ENABLE,
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REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10);
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}
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static void stmp378x_unmask_irq(unsigned int irq)
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{
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/* IRQ enable */
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stmp3xxx_setl(BM_ICOLL_INTERRUPTn_ENABLE,
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REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10);
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}
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static struct irq_chip stmp378x_chip = {
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.ack = stmp378x_ack_irq,
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.mask = stmp378x_mask_irq,
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.unmask = stmp378x_unmask_irq,
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};
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void __init stmp378x_init_irq(void)
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{
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stmp3xxx_init_irq(&stmp378x_chip);
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}
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/*
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* DMA interrupt handling
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*/
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void stmp3xxx_arch_dma_enable_interrupt(int channel)
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{
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void __iomem *c1, *c2;
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switch (STMP3XXX_DMA_BUS(channel)) {
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case STMP3XXX_BUS_APBH:
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c1 = REGS_APBH_BASE + HW_APBH_CTRL1;
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c2 = REGS_APBH_BASE + HW_APBH_CTRL2;
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break;
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case STMP3XXX_BUS_APBX:
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c1 = REGS_APBX_BASE + HW_APBX_CTRL1;
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c2 = REGS_APBX_BASE + HW_APBX_CTRL2;
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break;
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default:
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return;
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}
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stmp3xxx_setl(1 << (16 + STMP3XXX_DMA_CHANNEL(channel)), c1);
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stmp3xxx_setl(1 << (16 + STMP3XXX_DMA_CHANNEL(channel)), c2);
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_enable_interrupt);
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void stmp3xxx_arch_dma_clear_interrupt(int channel)
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{
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void __iomem *c1, *c2;
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switch (STMP3XXX_DMA_BUS(channel)) {
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case STMP3XXX_BUS_APBH:
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c1 = REGS_APBH_BASE + HW_APBH_CTRL1;
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c2 = REGS_APBH_BASE + HW_APBH_CTRL2;
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break;
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case STMP3XXX_BUS_APBX:
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c1 = REGS_APBX_BASE + HW_APBX_CTRL1;
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c2 = REGS_APBX_BASE + HW_APBX_CTRL2;
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break;
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default:
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return;
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}
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stmp3xxx_clearl(1 << STMP3XXX_DMA_CHANNEL(channel), c1);
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stmp3xxx_clearl(1 << STMP3XXX_DMA_CHANNEL(channel), c2);
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_clear_interrupt);
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int stmp3xxx_arch_dma_is_interrupt(int channel)
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{
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int r = 0;
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switch (STMP3XXX_DMA_BUS(channel)) {
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case STMP3XXX_BUS_APBH:
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r = __raw_readl(REGS_APBH_BASE + HW_APBH_CTRL1) &
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(1 << STMP3XXX_DMA_CHANNEL(channel));
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break;
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case STMP3XXX_BUS_APBX:
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r = __raw_readl(REGS_APBX_BASE + HW_APBX_CTRL1) &
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(1 << STMP3XXX_DMA_CHANNEL(channel));
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break;
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}
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return r;
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_is_interrupt);
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void stmp3xxx_arch_dma_reset_channel(int channel)
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{
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unsigned chbit = 1 << STMP3XXX_DMA_CHANNEL(channel);
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void __iomem *c0;
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u32 mask;
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switch (STMP3XXX_DMA_BUS(channel)) {
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case STMP3XXX_BUS_APBH:
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c0 = REGS_APBH_BASE + HW_APBH_CTRL0;
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mask = chbit << BP_APBH_CTRL0_RESET_CHANNEL;
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break;
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case STMP3XXX_BUS_APBX:
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c0 = REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL;
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mask = chbit << BP_APBX_CHANNEL_CTRL_RESET_CHANNEL;
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break;
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default:
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return;
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}
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/* Reset channel and wait for it to complete */
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stmp3xxx_setl(mask, c0);
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while (__raw_readl(c0) & mask)
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cpu_relax();
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_reset_channel);
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void stmp3xxx_arch_dma_freeze(int channel)
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{
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unsigned chbit = 1 << STMP3XXX_DMA_CHANNEL(channel);
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u32 mask = 1 << chbit;
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switch (STMP3XXX_DMA_BUS(channel)) {
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case STMP3XXX_BUS_APBH:
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stmp3xxx_setl(mask, REGS_APBH_BASE + HW_APBH_CTRL0);
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break;
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case STMP3XXX_BUS_APBX:
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stmp3xxx_setl(mask, REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL);
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break;
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}
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_freeze);
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void stmp3xxx_arch_dma_unfreeze(int channel)
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{
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unsigned chbit = 1 << STMP3XXX_DMA_CHANNEL(channel);
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u32 mask = 1 << chbit;
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switch (STMP3XXX_DMA_BUS(channel)) {
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case STMP3XXX_BUS_APBH:
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stmp3xxx_clearl(mask, REGS_APBH_BASE + HW_APBH_CTRL0);
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break;
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case STMP3XXX_BUS_APBX:
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stmp3xxx_clearl(mask, REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL);
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break;
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}
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_unfreeze);
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/*
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* The registers are all very closely mapped, so we might as well map them all
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* with a single mapping
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*
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* Logical Physical
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* f0000000 80000000 On-chip registers
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* f1000000 00000000 32k on-chip SRAM
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*/
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static struct map_desc stmp378x_io_desc[] __initdata = {
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{
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.virtual = (u32)STMP3XXX_REGS_BASE,
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.pfn = __phys_to_pfn(STMP3XXX_REGS_PHBASE),
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.length = STMP3XXX_REGS_SIZE,
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.type = MT_DEVICE,
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},
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{
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.virtual = (u32)STMP3XXX_OCRAM_BASE,
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.pfn = __phys_to_pfn(STMP3XXX_OCRAM_PHBASE),
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.length = STMP3XXX_OCRAM_SIZE,
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.type = MT_DEVICE,
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},
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};
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static u64 common_dmamask = DMA_BIT_MASK(32);
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/*
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* devices that are present only on stmp378x, not on all 3xxx boards:
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* PxP
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* I2C
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*/
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static struct resource pxp_resource[] = {
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{
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.flags = IORESOURCE_MEM,
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.start = REGS_PXP_PHYS,
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.end = REGS_PXP_PHYS + REGS_PXP_SIZE,
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}, {
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.flags = IORESOURCE_IRQ,
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.start = IRQ_PXP,
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.end = IRQ_PXP,
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},
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};
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struct platform_device stmp378x_pxp = {
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.name = "stmp3xxx-pxp",
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.id = -1,
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.dev = {
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.dma_mask = &common_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(pxp_resource),
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.resource = pxp_resource,
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};
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static struct resource i2c_resources[] = {
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{
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.flags = IORESOURCE_IRQ,
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.start = IRQ_I2C_ERROR,
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.end = IRQ_I2C_ERROR,
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}, {
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.flags = IORESOURCE_MEM,
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.start = REGS_I2C_PHYS,
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.end = REGS_I2C_PHYS + REGS_I2C_SIZE,
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}, {
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.flags = IORESOURCE_DMA,
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.start = STMP3XXX_DMA(3, STMP3XXX_BUS_APBX),
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.end = STMP3XXX_DMA(3, STMP3XXX_BUS_APBX),
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},
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};
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struct platform_device stmp378x_i2c = {
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.name = "i2c_stmp3xxx",
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.id = 0,
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.dev = {
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.dma_mask = &common_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = i2c_resources,
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.num_resources = ARRAY_SIZE(i2c_resources),
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};
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void __init stmp378x_map_io(void)
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{
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iotable_init(stmp378x_io_desc, ARRAY_SIZE(stmp378x_io_desc));
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}
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