140 lines
3.5 KiB
ArmAsm
140 lines
3.5 KiB
ArmAsm
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/* The head-file for the Shark
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* by Alexander Schulz
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*
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* Does the following:
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* - get the memory layout from firmware. This can only be done as long as the mmu
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* is still on.
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* - switch the mmu off, so we have physical addresses
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* - copy the kernel to 0x08508000. This is done to have a fixed address where the
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* C-parts (misc.c) are executed. This address must be known at compile-time,
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* but the load-address of the kernel depends on how much memory is installed.
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* - Jump to this location.
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* - Set r8 with 0, r7 with the architecture ID for head.S
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.section ".start", "ax"
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b __beginning
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__ofw_data: .long 0 @ the number of memory blocks
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.space 128 @ (startaddr,size) ...
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.space 128 @ bootargs
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.align
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__beginning: mov r4, r0 @ save the entry to the firmware
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mov r0, #0xC0 @ disable irq and fiq
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mov r1, r0
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mrs r3, cpsr
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bic r2, r3, r0
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eor r2, r2, r1
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msr cpsr_c, r2
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mov r0, r4 @ get the Memory layout from firmware
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adr r1, __ofw_data
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add r2, r1, #4
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mov lr, pc
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b ofw_init
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mov r1, #0
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adr r2, __mmu_off @ calculate physical address
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sub r2, r2, #0xf0000000 @ openprom maps us at f000 virt, 0e50 phys
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adr r0, __ofw_data
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ldr r0, [r0, #4]
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add r2, r2, r0
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add r2, r2, #0x00500000
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mrc p15, 0, r3, c1, c0
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bic r3, r3, #0xC @ Write Buffer and DCache
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bic r3, r3, #0x1000 @ ICache
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mcr p15, 0, r3, c1, c0 @ disabled
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mov r0, #0
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mcr p15, 0, r0, c7, c7 @ flush I,D caches on v4
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mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
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mcr p15, 0, r0, c8, c7 @ flush I,D TLBs on v4
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bic r3, r3, #0x1 @ MMU
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mcr p15, 0, r3, c1, c0 @ disabled
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mov pc, r2
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__copy_target: .long 0x08507FFC
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__copy_end: .long 0x08607FFC
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.word _start
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.word __bss_start
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.align
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__temp_stack: .space 128
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__mmu_off:
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adr r0, __ofw_data @ read the 1. entry of the memory map
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ldr r0, [r0, #4]
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orr r0, r0, #0x00600000
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sub r0, r0, #4
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ldr r1, __copy_end
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ldr r3, __copy_target
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/* r0 = 0x0e600000 (current end of kernelcode)
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* r3 = 0x08508000 (where it should begin)
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* r1 = 0x08608000 (end of copying area, 1MB)
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* The kernel is compressed, so 1 MB should be enough.
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* copy the kernel to the beginning of physical memory
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* We start from the highest address, so we can copy
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* from 0x08500000 to 0x08508000 if we have only 8MB
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*/
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/* As we get more 2.6-kernels it gets more and more
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* uncomfortable to be bound to kernel images of 1MB only.
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* So we add a loop here, to be able to copy some more.
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* Alexander Schulz 2005-07-17
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*/
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mov r4, #3 @ How many megabytes to copy
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__MoveCode: sub r4, r4, #1
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__Copy: ldr r2, [r0], #-4
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str r2, [r1], #-4
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teq r1, r3
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bne __Copy
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/* The firmware maps us in blocks of 1 MB, the next block is
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_below_ the last one. So our decrementing source pointer
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ist right here, but the destination pointer must be increased
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by 2 MB */
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add r1, r1, #0x00200000
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add r3, r3, #0x00100000
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teq r4, #0
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bne __MoveCode
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/* and jump to it */
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adr r2, __go_on @ where we want to jump
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adr r0, __ofw_data @ read the 1. entry of the memory map
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ldr r0, [r0, #4]
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sub r2, r2, r0 @ we are mapped add 0e50 now, sub that (-0e00)
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sub r2, r2, #0x00500000 @ -0050
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ldr r0, __copy_target @ and add 0850 8000 instead
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add r0, r0, #4
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add r2, r2, r0
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mov pc, r2 @ and jump there
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__go_on:
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adr sp, __temp_stack
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add sp, sp, #128
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adr r0, __ofw_data
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mov lr, pc
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b create_params
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mov r8, #0
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mov r7, #15
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