378 lines
12 KiB
C
378 lines
12 KiB
C
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/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_AVR32_PGTABLE_H
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#define __ASM_AVR32_PGTABLE_H
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#include <asm/addrspace.h>
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#ifndef __ASSEMBLY__
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#include <linux/sched.h>
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#endif /* !__ASSEMBLY__ */
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/*
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* Use two-level page tables just as the i386 (without PAE)
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*/
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#include <asm/pgtable-2level.h>
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/*
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* The following code might need some cleanup when the values are
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* final...
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*/
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE-1))
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
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#define FIRST_USER_ADDRESS 0
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#ifndef __ASSEMBLY__
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extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
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extern void paging_init(void);
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/*
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* ZERO_PAGE is a global shared page that is always zero: used for
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* zero-mapped memory areas etc.
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*/
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extern struct page *empty_zero_page;
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#define ZERO_PAGE(vaddr) (empty_zero_page)
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/*
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* Just any arbitrary offset to the start of the vmalloc VM area: the
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* current 8 MiB value just means that there will be a 8 MiB "hole"
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* after the uncached physical memory (P2 segment) until the vmalloc
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* area starts. That means that any out-of-bounds memory accesses will
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* hopefully be caught; we don't know if the end of the P1/P2 segments
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* are actually used for anything, but it is anyway safer to let the
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* MMU catch these kinds of errors than to rely on the memory bus.
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*
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* A "hole" of the same size is added to the end of the P3 segment as
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* well. It might seem wasteful to use 16 MiB of virtual address space
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* on this, but we do have 512 MiB of it...
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*
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* The vmalloc() routines leave a hole of 4 KiB between each vmalloced
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* area for the same reason.
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*/
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#define VMALLOC_OFFSET (8 * 1024 * 1024)
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#define VMALLOC_START (P3SEG + VMALLOC_OFFSET)
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#define VMALLOC_END (P4SEG - VMALLOC_OFFSET)
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#endif /* !__ASSEMBLY__ */
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/*
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* Page flags. Some of these flags are not directly supported by
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* hardware, so we have to emulate them.
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*/
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#define _TLBEHI_BIT_VALID 9
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#define _TLBEHI_VALID (1 << _TLBEHI_BIT_VALID)
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#define _PAGE_BIT_WT 0 /* W-bit : write-through */
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#define _PAGE_BIT_DIRTY 1 /* D-bit : page changed */
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#define _PAGE_BIT_SZ0 2 /* SZ0-bit : Size of page */
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#define _PAGE_BIT_SZ1 3 /* SZ1-bit : Size of page */
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#define _PAGE_BIT_EXECUTE 4 /* X-bit : execute access allowed */
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#define _PAGE_BIT_RW 5 /* AP0-bit : write access allowed */
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#define _PAGE_BIT_USER 6 /* AP1-bit : user space access allowed */
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#define _PAGE_BIT_BUFFER 7 /* B-bit : bufferable */
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#define _PAGE_BIT_GLOBAL 8 /* G-bit : global (ignore ASID) */
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#define _PAGE_BIT_CACHABLE 9 /* C-bit : cachable */
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/* If we drop support for 1K pages, we get two extra bits */
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#define _PAGE_BIT_PRESENT 10
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#define _PAGE_BIT_ACCESSED 11 /* software: page was accessed */
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/* The following flags are only valid when !PRESENT */
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#define _PAGE_BIT_FILE 0 /* software: pagecache or swap? */
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#define _PAGE_WT (1 << _PAGE_BIT_WT)
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#define _PAGE_DIRTY (1 << _PAGE_BIT_DIRTY)
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#define _PAGE_EXECUTE (1 << _PAGE_BIT_EXECUTE)
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#define _PAGE_RW (1 << _PAGE_BIT_RW)
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#define _PAGE_USER (1 << _PAGE_BIT_USER)
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#define _PAGE_BUFFER (1 << _PAGE_BIT_BUFFER)
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#define _PAGE_GLOBAL (1 << _PAGE_BIT_GLOBAL)
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#define _PAGE_CACHABLE (1 << _PAGE_BIT_CACHABLE)
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/* Software flags */
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#define _PAGE_ACCESSED (1 << _PAGE_BIT_ACCESSED)
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#define _PAGE_PRESENT (1 << _PAGE_BIT_PRESENT)
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#define _PAGE_FILE (1 << _PAGE_BIT_FILE)
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/*
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* Page types, i.e. sizes. _PAGE_TYPE_NONE corresponds to what is
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* usually called _PAGE_PROTNONE on other architectures.
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*
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* XXX: Find out if _PAGE_PROTNONE is equivalent with !_PAGE_USER. If
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* so, we can encode all possible page sizes (although we can't really
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* support 1K pages anyway due to the _PAGE_PRESENT and _PAGE_ACCESSED
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* bits)
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*
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*/
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#define _PAGE_TYPE_MASK ((1 << _PAGE_BIT_SZ0) | (1 << _PAGE_BIT_SZ1))
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#define _PAGE_TYPE_NONE (0 << _PAGE_BIT_SZ0)
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#define _PAGE_TYPE_SMALL (1 << _PAGE_BIT_SZ0)
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#define _PAGE_TYPE_MEDIUM (2 << _PAGE_BIT_SZ0)
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#define _PAGE_TYPE_LARGE (3 << _PAGE_BIT_SZ0)
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/*
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* Mask which drop software flags. We currently can't handle more than
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* 512 MiB of physical memory, so we can use bits 29-31 for other
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* stuff. With a fixed 4K page size, we can use bits 10-11 as well as
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* bits 2-3 (SZ)
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*/
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#define _PAGE_FLAGS_HARDWARE_MASK 0xfffff3ff
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#define _PAGE_FLAGS_CACHE_MASK (_PAGE_CACHABLE | _PAGE_BUFFER | _PAGE_WT)
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/* Flags that may be modified by software */
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#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY \
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| _PAGE_FLAGS_CACHE_MASK)
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#define _PAGE_FLAGS_READ (_PAGE_CACHABLE | _PAGE_BUFFER)
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#define _PAGE_FLAGS_WRITE (_PAGE_FLAGS_READ | _PAGE_RW | _PAGE_DIRTY)
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#define _PAGE_NORMAL(x) __pgprot((x) | _PAGE_PRESENT | _PAGE_TYPE_SMALL \
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| _PAGE_ACCESSED)
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#define PAGE_NONE (_PAGE_ACCESSED | _PAGE_TYPE_NONE)
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#define PAGE_READ (_PAGE_FLAGS_READ | _PAGE_USER)
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#define PAGE_EXEC (_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_USER)
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#define PAGE_WRITE (_PAGE_FLAGS_WRITE | _PAGE_USER)
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#define PAGE_KERNEL _PAGE_NORMAL(_PAGE_FLAGS_WRITE | _PAGE_EXECUTE | _PAGE_GLOBAL)
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#define PAGE_KERNEL_RO _PAGE_NORMAL(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_GLOBAL)
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#define _PAGE_P(x) _PAGE_NORMAL((x) & ~(_PAGE_RW | _PAGE_DIRTY))
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#define _PAGE_S(x) _PAGE_NORMAL(x)
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#define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ)
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#define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ)
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#ifndef __ASSEMBLY__
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/*
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* The hardware supports flags for write- and execute access. Read is
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* always allowed if the page is loaded into the TLB, so the "-w-",
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* "--x" and "-wx" mappings are implemented as "rw-", "r-x" and "rwx",
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* respectively.
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*
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* The "---" case is handled by software; the page will simply not be
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* loaded into the TLB if the page type is _PAGE_TYPE_NONE.
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*/
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#define __P000 __pgprot(PAGE_NONE)
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#define __P001 _PAGE_P(PAGE_READ)
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#define __P010 _PAGE_P(PAGE_WRITE)
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#define __P011 _PAGE_P(PAGE_WRITE | PAGE_READ)
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#define __P100 _PAGE_P(PAGE_EXEC)
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#define __P101 _PAGE_P(PAGE_EXEC | PAGE_READ)
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#define __P110 _PAGE_P(PAGE_EXEC | PAGE_WRITE)
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#define __P111 _PAGE_P(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
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#define __S000 __pgprot(PAGE_NONE)
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#define __S001 _PAGE_S(PAGE_READ)
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#define __S010 _PAGE_S(PAGE_WRITE)
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#define __S011 _PAGE_S(PAGE_WRITE | PAGE_READ)
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#define __S100 _PAGE_S(PAGE_EXEC)
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#define __S101 _PAGE_S(PAGE_EXEC | PAGE_READ)
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#define __S110 _PAGE_S(PAGE_EXEC | PAGE_WRITE)
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#define __S111 _PAGE_S(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
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#define pte_none(x) (!pte_val(x))
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#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
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#define pte_clear(mm,addr,xp) \
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do { \
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set_pte_at(mm, addr, xp, __pte(0)); \
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} while (0)
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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static inline int pte_write(pte_t pte)
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{
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return pte_val(pte) & _PAGE_RW;
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}
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static inline int pte_dirty(pte_t pte)
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{
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return pte_val(pte) & _PAGE_DIRTY;
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}
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static inline int pte_young(pte_t pte)
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{
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return pte_val(pte) & _PAGE_ACCESSED;
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}
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static inline int pte_special(pte_t pte)
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{
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return 0;
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}
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/*
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* The following only work if pte_present() is not true.
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*/
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static inline int pte_file(pte_t pte)
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{
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return pte_val(pte) & _PAGE_FILE;
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}
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/* Mutator functions for PTE bits */
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW));
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return pte;
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}
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static inline pte_t pte_mkclean(pte_t pte)
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{
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set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY));
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return pte;
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}
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static inline pte_t pte_mkold(pte_t pte)
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{
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set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED));
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return pte;
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}
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static inline pte_t pte_mkwrite(pte_t pte)
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{
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set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW));
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return pte;
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY));
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return pte;
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED));
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return pte;
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}
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static inline pte_t pte_mkspecial(pte_t pte)
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{
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return pte;
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}
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#define pmd_none(x) (!pmd_val(x))
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#define pmd_present(x) (pmd_val(x))
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static inline void pmd_clear(pmd_t *pmdp)
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{
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set_pmd(pmdp, __pmd(0));
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}
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#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
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/*
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* Permanent address of a page. We don't support highmem, so this is
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* trivial.
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*/
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#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
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#define pte_page(x) (pfn_to_page(pte_pfn(x)))
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/*
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* Mark the prot value as uncacheable and unbufferable
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*/
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#define pgprot_noncached(prot) \
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__pgprot(pgprot_val(prot) & ~(_PAGE_BUFFER | _PAGE_CACHABLE))
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/*
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* Mark the prot value as uncacheable but bufferable
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*/
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#define pgprot_writecombine(prot) \
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__pgprot((pgprot_val(prot) & ~_PAGE_CACHABLE) | _PAGE_BUFFER)
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*
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* extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
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*/
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK)
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| pgprot_val(newprot)));
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return pte;
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}
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#define page_pte(page) page_pte_prot(page, __pgprot(0))
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#define pmd_page_vaddr(pmd) pmd_val(pmd)
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#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
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/* to find an entry in a page-table-directory. */
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#define pgd_index(address) (((address) >> PGDIR_SHIFT) \
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& (PTRS_PER_PGD - 1))
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#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
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/* to find an entry in a kernel page-table-directory */
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#define pgd_offset_k(address) pgd_offset(&init_mm, address)
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/* Find an entry in the third-level page table.. */
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#define pte_index(address) \
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((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
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#define pte_offset(dir, address) \
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((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
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#define pte_offset_kernel(dir, address) \
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((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
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#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
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#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
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#define pte_unmap(pte) do { } while (0)
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#define pte_unmap_nested(pte) do { } while (0)
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struct vm_area_struct;
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extern void update_mmu_cache(struct vm_area_struct * vma,
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unsigned long address, pte_t pte);
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/*
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* Encode and decode a swap entry
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*
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* Constraints:
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* _PAGE_FILE at bit 0
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* _PAGE_TYPE_* at bits 2-3 (for emulating _PAGE_PROTNONE)
|
||
|
|
* _PAGE_PRESENT at bit 10
|
||
|
|
*
|
||
|
|
* We encode the type into bits 4-9 and offset into bits 11-31. This
|
||
|
|
* gives us a 21 bits offset, or 2**21 * 4K = 8G usable swap space per
|
||
|
|
* device, and 64 possible types.
|
||
|
|
*
|
||
|
|
* NOTE: We should set ZEROs at the position of _PAGE_PRESENT
|
||
|
|
* and _PAGE_PROTNONE bits
|
||
|
|
*/
|
||
|
|
#define __swp_type(x) (((x).val >> 4) & 0x3f)
|
||
|
|
#define __swp_offset(x) ((x).val >> 11)
|
||
|
|
#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 11) })
|
||
|
|
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
|
||
|
|
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Encode and decode a nonlinear file mapping entry. We have to
|
||
|
|
* preserve _PAGE_FILE and _PAGE_PRESENT here. _PAGE_TYPE_* isn't
|
||
|
|
* necessary, since _PAGE_FILE implies !_PAGE_PROTNONE (?)
|
||
|
|
*/
|
||
|
|
#define PTE_FILE_MAX_BITS 30
|
||
|
|
#define pte_to_pgoff(pte) (((pte_val(pte) >> 1) & 0x1ff) \
|
||
|
|
| ((pte_val(pte) >> 11) << 9))
|
||
|
|
#define pgoff_to_pte(off) ((pte_t) { ((((off) & 0x1ff) << 1) \
|
||
|
|
| (((off) >> 9) << 11) \
|
||
|
|
| _PAGE_FILE) })
|
||
|
|
|
||
|
|
typedef pte_t *pte_addr_t;
|
||
|
|
|
||
|
|
#define kern_addr_valid(addr) (1)
|
||
|
|
|
||
|
|
#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
|
||
|
|
remap_pfn_range(vma, vaddr, pfn, size, prot)
|
||
|
|
|
||
|
|
/* No page table caches to initialize (?) */
|
||
|
|
#define pgtable_cache_init() do { } while(0)
|
||
|
|
|
||
|
|
#include <asm-generic/pgtable.h>
|
||
|
|
|
||
|
|
#endif /* !__ASSEMBLY__ */
|
||
|
|
|
||
|
|
#endif /* __ASM_AVR32_PGTABLE_H */
|