522 lines
16 KiB
Plaintext
522 lines
16 KiB
Plaintext
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Marvell Discovery mv64[345]6x System Controller chips
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===========================================================
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The Marvell mv64[345]60 series of system controller chips contain
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many of the peripherals needed to implement a complete computer
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system. In this section, we define device tree nodes to describe
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the system controller chip itself and each of the peripherals
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which it contains. Compatible string values for each node are
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prefixed with the string "marvell,", for Marvell Technology Group Ltd.
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1) The /system-controller node
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This node is used to represent the system-controller and must be
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present when the system uses a system controller chip. The top-level
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system-controller node contains information that is global to all
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devices within the system controller chip. The node name begins
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with "system-controller" followed by the unit address, which is
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the base address of the memory-mapped register set for the system
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controller chip.
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Required properties:
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- ranges : Describes the translation of system controller addresses
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for memory mapped registers.
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- clock-frequency: Contains the main clock frequency for the system
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controller chip.
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- reg : This property defines the address and size of the
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memory-mapped registers contained within the system controller
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chip. The address specified in the "reg" property should match
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the unit address of the system-controller node.
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- #address-cells : Address representation for system controller
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devices. This field represents the number of cells needed to
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represent the address of the memory-mapped registers of devices
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within the system controller chip.
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- #size-cells : Size representation for the memory-mapped
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registers within the system controller chip.
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- #interrupt-cells : Defines the width of cells used to represent
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interrupts.
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Optional properties:
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- model : The specific model of the system controller chip. Such
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as, "mv64360", "mv64460", or "mv64560".
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- compatible : A string identifying the compatibility identifiers
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of the system controller chip.
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The system-controller node contains child nodes for each system
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controller device that the platform uses. Nodes should not be created
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for devices which exist on the system controller chip but are not used
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Example Marvell Discovery mv64360 system-controller node:
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system-controller@f1000000 { /* Marvell Discovery mv64360 */
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#address-cells = <1>;
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#size-cells = <1>;
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model = "mv64360"; /* Default */
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compatible = "marvell,mv64360";
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clock-frequency = <133333333>;
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reg = <0xf1000000 0x10000>;
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virtual-reg = <0xf1000000>;
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ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
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0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
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0xa0000000 0xa0000000 0x4000000 /* User FLASH */
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0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
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0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
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[ child node definitions... ]
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}
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2) Child nodes of /system-controller
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a) Marvell Discovery MDIO bus
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The MDIO is a bus to which the PHY devices are connected. For each
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device that exists on this bus, a child node should be created. See
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the definition of the PHY node below for an example of how to define
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a PHY.
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Required properties:
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- #address-cells : Should be <1>
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- #size-cells : Should be <0>
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- device_type : Should be "mdio"
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- compatible : Should be "marvell,mv64360-mdio"
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Example:
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "mdio";
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compatible = "marvell,mv64360-mdio";
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ethernet-phy@0 {
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......
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};
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};
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b) Marvell Discovery ethernet controller
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The Discover ethernet controller is described with two levels
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of nodes. The first level describes an ethernet silicon block
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and the second level describes up to 3 ethernet nodes within
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that block. The reason for the multiple levels is that the
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registers for the node are interleaved within a single set
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of registers. The "ethernet-block" level describes the
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shared register set, and the "ethernet" nodes describe ethernet
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port-specific properties.
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Ethernet block node
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Required properties:
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- #address-cells : <1>
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- #size-cells : <0>
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- compatible : "marvell,mv64360-eth-block"
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- reg : Offset and length of the register set for this block
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Example Discovery Ethernet block node:
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ethernet-block@2000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "marvell,mv64360-eth-block";
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reg = <0x2000 0x2000>;
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ethernet@0 {
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.......
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};
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};
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Ethernet port node
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Required properties:
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- device_type : Should be "network".
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- compatible : Should be "marvell,mv64360-eth".
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- reg : Should be <0>, <1>, or <2>, according to which registers
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within the silicon block the device uses.
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- interrupts : <a> where a is the interrupt number for the port.
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- interrupt-parent : the phandle for the interrupt controller
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that services interrupts for this device.
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- phy : the phandle for the PHY connected to this ethernet
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controller.
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- local-mac-address : 6 bytes, MAC address
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Example Discovery Ethernet port node:
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ethernet@0 {
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device_type = "network";
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compatible = "marvell,mv64360-eth";
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reg = <0>;
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interrupts = <32>;
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interrupt-parent = <&PIC>;
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phy = <&PHY0>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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c) Marvell Discovery PHY nodes
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Required properties:
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- device_type : Should be "ethernet-phy"
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- interrupts : <a> where a is the interrupt number for this phy.
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- interrupt-parent : the phandle for the interrupt controller that
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services interrupts for this device.
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- reg : The ID number for the phy, usually a small integer
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Example Discovery PHY node:
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ethernet-phy@1 {
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device_type = "ethernet-phy";
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compatible = "broadcom,bcm5421";
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interrupts = <76>; /* GPP 12 */
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interrupt-parent = <&PIC>;
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reg = <1>;
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};
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d) Marvell Discovery SDMA nodes
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Represent DMA hardware associated with the MPSC (multiprotocol
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serial controllers).
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Required properties:
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- compatible : "marvell,mv64360-sdma"
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- reg : Offset and length of the register set for this device
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- interrupts : <a> where a is the interrupt number for the DMA
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device.
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- interrupt-parent : the phandle for the interrupt controller
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that services interrupts for this device.
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Example Discovery SDMA node:
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sdma@4000 {
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compatible = "marvell,mv64360-sdma";
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reg = <0x4000 0xc18>;
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virtual-reg = <0xf1004000>;
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interrupts = <36>;
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interrupt-parent = <&PIC>;
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};
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e) Marvell Discovery BRG nodes
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Represent baud rate generator hardware associated with the MPSC
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(multiprotocol serial controllers).
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Required properties:
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- compatible : "marvell,mv64360-brg"
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- reg : Offset and length of the register set for this device
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- clock-src : A value from 0 to 15 which selects the clock
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source for the baud rate generator. This value corresponds
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to the CLKS value in the BRGx configuration register. See
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the mv64x60 User's Manual.
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- clock-frequence : The frequency (in Hz) of the baud rate
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generator's input clock.
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- current-speed : The current speed setting (presumably by
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firmware) of the baud rate generator.
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Example Discovery BRG node:
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brg@b200 {
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compatible = "marvell,mv64360-brg";
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reg = <0xb200 0x8>;
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clock-src = <8>;
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clock-frequency = <133333333>;
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current-speed = <9600>;
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};
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f) Marvell Discovery CUNIT nodes
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Represent the Serial Communications Unit device hardware.
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Required properties:
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- reg : Offset and length of the register set for this device
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Example Discovery CUNIT node:
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cunit@f200 {
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reg = <0xf200 0x200>;
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};
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g) Marvell Discovery MPSCROUTING nodes
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Represent the Discovery's MPSC routing hardware
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Required properties:
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- reg : Offset and length of the register set for this device
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Example Discovery CUNIT node:
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mpscrouting@b500 {
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reg = <0xb400 0xc>;
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};
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h) Marvell Discovery MPSCINTR nodes
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Represent the Discovery's MPSC DMA interrupt hardware registers
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(SDMA cause and mask registers).
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Required properties:
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- reg : Offset and length of the register set for this device
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Example Discovery MPSCINTR node:
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mpsintr@b800 {
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reg = <0xb800 0x100>;
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};
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i) Marvell Discovery MPSC nodes
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Represent the Discovery's MPSC (Multiprotocol Serial Controller)
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serial port.
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Required properties:
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- device_type : "serial"
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- compatible : "marvell,mv64360-mpsc"
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- reg : Offset and length of the register set for this device
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- sdma : the phandle for the SDMA node used by this port
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- brg : the phandle for the BRG node used by this port
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- cunit : the phandle for the CUNIT node used by this port
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- mpscrouting : the phandle for the MPSCROUTING node used by this port
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- mpscintr : the phandle for the MPSCINTR node used by this port
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- cell-index : the hardware index of this cell in the MPSC core
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- max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
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register
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- interrupts : <a> where a is the interrupt number for the MPSC.
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- interrupt-parent : the phandle for the interrupt controller
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that services interrupts for this device.
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Example Discovery MPSCINTR node:
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mpsc@8000 {
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device_type = "serial";
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compatible = "marvell,mv64360-mpsc";
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reg = <0x8000 0x38>;
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virtual-reg = <0xf1008000>;
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sdma = <&SDMA0>;
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brg = <&BRG0>;
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cunit = <&CUNIT>;
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mpscrouting = <&MPSCROUTING>;
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mpscintr = <&MPSCINTR>;
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cell-index = <0>;
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max_idle = <40>;
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interrupts = <40>;
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interrupt-parent = <&PIC>;
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};
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j) Marvell Discovery Watch Dog Timer nodes
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Represent the Discovery's watchdog timer hardware
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Required properties:
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- compatible : "marvell,mv64360-wdt"
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- reg : Offset and length of the register set for this device
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Example Discovery Watch Dog Timer node:
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wdt@b410 {
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compatible = "marvell,mv64360-wdt";
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reg = <0xb410 0x8>;
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};
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k) Marvell Discovery I2C nodes
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Represent the Discovery's I2C hardware
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Required properties:
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- device_type : "i2c"
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- compatible : "marvell,mv64360-i2c"
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- reg : Offset and length of the register set for this device
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- interrupts : <a> where a is the interrupt number for the I2C.
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- interrupt-parent : the phandle for the interrupt controller
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that services interrupts for this device.
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Example Discovery I2C node:
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compatible = "marvell,mv64360-i2c";
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reg = <0xc000 0x20>;
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virtual-reg = <0xf100c000>;
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interrupts = <37>;
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interrupt-parent = <&PIC>;
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};
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l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
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Represent the Discovery's PIC hardware
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Required properties:
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- #interrupt-cells : <1>
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- #address-cells : <0>
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- compatible : "marvell,mv64360-pic"
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- reg : Offset and length of the register set for this device
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- interrupt-controller
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Example Discovery PIC node:
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pic {
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#interrupt-cells = <1>;
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#address-cells = <0>;
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compatible = "marvell,mv64360-pic";
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reg = <0x0 0x88>;
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interrupt-controller;
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};
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m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
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Represent the Discovery's MPP hardware
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Required properties:
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- compatible : "marvell,mv64360-mpp"
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- reg : Offset and length of the register set for this device
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Example Discovery MPP node:
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mpp@f000 {
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compatible = "marvell,mv64360-mpp";
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reg = <0xf000 0x10>;
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};
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n) Marvell Discovery GPP (General Purpose Pins) nodes
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Represent the Discovery's GPP hardware
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Required properties:
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- compatible : "marvell,mv64360-gpp"
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- reg : Offset and length of the register set for this device
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Example Discovery GPP node:
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gpp@f000 {
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compatible = "marvell,mv64360-gpp";
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reg = <0xf100 0x20>;
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};
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o) Marvell Discovery PCI host bridge node
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Represents the Discovery's PCI host bridge device. The properties
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for this node conform to Rev 2.1 of the PCI Bus Binding to IEEE
|
||
|
|
1275-1994. A typical value for the compatible property is
|
||
|
|
"marvell,mv64360-pci".
|
||
|
|
|
||
|
|
Example Discovery PCI host bridge node
|
||
|
|
pci@80000000 {
|
||
|
|
#address-cells = <3>;
|
||
|
|
#size-cells = <2>;
|
||
|
|
#interrupt-cells = <1>;
|
||
|
|
device_type = "pci";
|
||
|
|
compatible = "marvell,mv64360-pci";
|
||
|
|
reg = <0xcf8 0x8>;
|
||
|
|
ranges = <0x01000000 0x0 0x0
|
||
|
|
0x88000000 0x0 0x01000000
|
||
|
|
0x02000000 0x0 0x80000000
|
||
|
|
0x80000000 0x0 0x08000000>;
|
||
|
|
bus-range = <0 255>;
|
||
|
|
clock-frequency = <66000000>;
|
||
|
|
interrupt-parent = <&PIC>;
|
||
|
|
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||
|
|
interrupt-map = <
|
||
|
|
/* IDSEL 0x0a */
|
||
|
|
0x5000 0 0 1 &PIC 80
|
||
|
|
0x5000 0 0 2 &PIC 81
|
||
|
|
0x5000 0 0 3 &PIC 91
|
||
|
|
0x5000 0 0 4 &PIC 93
|
||
|
|
|
||
|
|
/* IDSEL 0x0b */
|
||
|
|
0x5800 0 0 1 &PIC 91
|
||
|
|
0x5800 0 0 2 &PIC 93
|
||
|
|
0x5800 0 0 3 &PIC 80
|
||
|
|
0x5800 0 0 4 &PIC 81
|
||
|
|
|
||
|
|
/* IDSEL 0x0c */
|
||
|
|
0x6000 0 0 1 &PIC 91
|
||
|
|
0x6000 0 0 2 &PIC 93
|
||
|
|
0x6000 0 0 3 &PIC 80
|
||
|
|
0x6000 0 0 4 &PIC 81
|
||
|
|
|
||
|
|
/* IDSEL 0x0d */
|
||
|
|
0x6800 0 0 1 &PIC 93
|
||
|
|
0x6800 0 0 2 &PIC 80
|
||
|
|
0x6800 0 0 3 &PIC 81
|
||
|
|
0x6800 0 0 4 &PIC 91
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
p) Marvell Discovery CPU Error nodes
|
||
|
|
|
||
|
|
Represent the Discovery's CPU error handler device.
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
- compatible : "marvell,mv64360-cpu-error"
|
||
|
|
- reg : Offset and length of the register set for this device
|
||
|
|
- interrupts : the interrupt number for this device
|
||
|
|
- interrupt-parent : the phandle for the interrupt controller
|
||
|
|
that services interrupts for this device.
|
||
|
|
|
||
|
|
Example Discovery CPU Error node:
|
||
|
|
cpu-error@0070 {
|
||
|
|
compatible = "marvell,mv64360-cpu-error";
|
||
|
|
reg = <0x70 0x10 0x128 0x28>;
|
||
|
|
interrupts = <3>;
|
||
|
|
interrupt-parent = <&PIC>;
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
q) Marvell Discovery SRAM Controller nodes
|
||
|
|
|
||
|
|
Represent the Discovery's SRAM controller device.
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
- compatible : "marvell,mv64360-sram-ctrl"
|
||
|
|
- reg : Offset and length of the register set for this device
|
||
|
|
- interrupts : the interrupt number for this device
|
||
|
|
- interrupt-parent : the phandle for the interrupt controller
|
||
|
|
that services interrupts for this device.
|
||
|
|
|
||
|
|
Example Discovery SRAM Controller node:
|
||
|
|
sram-ctrl@0380 {
|
||
|
|
compatible = "marvell,mv64360-sram-ctrl";
|
||
|
|
reg = <0x380 0x80>;
|
||
|
|
interrupts = <13>;
|
||
|
|
interrupt-parent = <&PIC>;
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
r) Marvell Discovery PCI Error Handler nodes
|
||
|
|
|
||
|
|
Represent the Discovery's PCI error handler device.
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
- compatible : "marvell,mv64360-pci-error"
|
||
|
|
- reg : Offset and length of the register set for this device
|
||
|
|
- interrupts : the interrupt number for this device
|
||
|
|
- interrupt-parent : the phandle for the interrupt controller
|
||
|
|
that services interrupts for this device.
|
||
|
|
|
||
|
|
Example Discovery PCI Error Handler node:
|
||
|
|
pci-error@1d40 {
|
||
|
|
compatible = "marvell,mv64360-pci-error";
|
||
|
|
reg = <0x1d40 0x40 0xc28 0x4>;
|
||
|
|
interrupts = <12>;
|
||
|
|
interrupt-parent = <&PIC>;
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
s) Marvell Discovery Memory Controller nodes
|
||
|
|
|
||
|
|
Represent the Discovery's memory controller device.
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
- compatible : "marvell,mv64360-mem-ctrl"
|
||
|
|
- reg : Offset and length of the register set for this device
|
||
|
|
- interrupts : the interrupt number for this device
|
||
|
|
- interrupt-parent : the phandle for the interrupt controller
|
||
|
|
that services interrupts for this device.
|
||
|
|
|
||
|
|
Example Discovery Memory Controller node:
|
||
|
|
mem-ctrl@1400 {
|
||
|
|
compatible = "marvell,mv64360-mem-ctrl";
|
||
|
|
reg = <0x1400 0x60>;
|
||
|
|
interrupts = <17>;
|
||
|
|
interrupt-parent = <&PIC>;
|
||
|
|
};
|
||
|
|
|
||
|
|
|