117 lines
1.7 KiB
ArmAsm
117 lines
1.7 KiB
ArmAsm
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/*
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* arch/sh/mm/stm-l2-helper.S
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*
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* Copyright (C) 2008 STMicroelectronics
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* Written by Richard P. Curnow
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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.text
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.little
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.macro L2SYNC l2syncreg, scratch
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mov #1, \scratch
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mov.l \scratch, @\l2syncreg
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1:
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mov.l @\l2syncreg, \scratch
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shlr \scratch
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bt 1b
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.endm
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/* The CHAIN_* macros are used to build a chain of branches,
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* interleaved (carefully) into the mainline code,
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* which can be used to prefetch all the lines into the
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* instruction cache before we start the real work.
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*/
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.macro CHAIN_HEAD
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sett
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bt 999f
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777:
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.endm
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/* There MUST be one of these per cache line's worth of code.
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* Otherwise the prefetch will be incomplete. */
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.macro CHAIN_MID
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bra 888f
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nop
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.balign 32
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999:
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bt 999f
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888:
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.endm
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.macro CHAIN_TAIL
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.balign 32
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999:
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bra 777b
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nop
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.endm
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.balign 32
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.global stm_l2_copy_back_to_write_through_helper
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stm_l2_copy_back_to_write_through_helper:
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/* args
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r4 = top of range
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r5 = L2CCR
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r6 = L2FE
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r7 = L2SYNC
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*/
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mov #0, r2
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sts.l pr, @-r15
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mov #0x10, r3
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shll16 r3
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shll8 r3 ! r3 = 1<<28
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! irq off
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stc sr, r0
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or r0, r3
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ldc r3, sr ! block on
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CHAIN_HEAD
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synco
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bsr do_l2_sync
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nop
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CHAIN_MID
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1:
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mov.l r2, @r6
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add #32, r2 ! assumes L2 line size is 32; will not change
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cmp/hs r4, r2
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bf 1b
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bsr do_l2_sync
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nop
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! cache now flushed
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mov.l @r5, r1
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mov #-3, r2 ! 0xfffffffd aka ~2 aka ~(1<<1)
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and r2, r1
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bsr do_l2_sync
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mov.l r1, @r5 ! clear L2CCR.CBE
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ldc r0, sr ! restore SR : block off
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CHAIN_MID
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lds.l @r15+, pr
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rts
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nop
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CHAIN_MID
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do_l2_sync:
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L2SYNC r7, r1
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rts
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nop
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CHAIN_TAIL
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