113 lines
2.9 KiB
C
113 lines
2.9 KiB
C
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/*
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* Copyright (c) 2005 Topspin Communications. All rights reserved.
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* Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef MTHCA_USER_H
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#define MTHCA_USER_H
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#include <linux/types.h>
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/*
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* Increment this value if any changes that break userspace ABI
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* compatibility are made.
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*/
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#define MTHCA_UVERBS_ABI_VERSION 1
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/*
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* Make sure that all structs defined in this file remain laid out so
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* that they pack the same way on 32-bit and 64-bit architectures (to
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* avoid incompatibility between 32-bit userspace and 64-bit kernels).
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* In particular do not use pointer types -- pass pointers in __u64
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* instead.
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*/
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struct mthca_alloc_ucontext_resp {
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__u32 qp_tab_size;
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__u32 uarc_size;
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};
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struct mthca_alloc_pd_resp {
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__u32 pdn;
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__u32 reserved;
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};
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struct mthca_reg_mr {
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/*
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* Mark the memory region with a DMA attribute that causes
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* in-flight DMA to be flushed when the region is written to:
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*/
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#define MTHCA_MR_DMASYNC 0x1
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__u32 mr_attrs;
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__u32 reserved;
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};
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struct mthca_create_cq {
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__u32 lkey;
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__u32 pdn;
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__u64 arm_db_page;
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__u64 set_db_page;
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__u32 arm_db_index;
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__u32 set_db_index;
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};
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struct mthca_create_cq_resp {
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__u32 cqn;
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__u32 reserved;
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};
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struct mthca_resize_cq {
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__u32 lkey;
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__u32 reserved;
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};
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struct mthca_create_srq {
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__u32 lkey;
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__u32 db_index;
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__u64 db_page;
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};
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struct mthca_create_srq_resp {
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__u32 srqn;
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__u32 reserved;
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};
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struct mthca_create_qp {
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__u32 lkey;
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__u32 reserved;
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__u64 sq_db_page;
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__u64 rq_db_page;
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__u32 sq_db_index;
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__u32 rq_db_index;
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};
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#endif /* MTHCA_USER_H */
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