90 lines
2.9 KiB
C
90 lines
2.9 KiB
C
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/*
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* HCD (Host Controller Driver) for USB.
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*
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* Copyright (c) 2009 STMicroelectronics Limited
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* Author: Francesco Virlinzi
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*
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* Bus Glue for STMicroelectronics STx710x devices.
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*
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* This file is licenced under the GPL.
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*/
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#ifndef __ST_USB_HCD__
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#define __ST_USB_HCD__
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/* The transaction opcode is programmed in this register */
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#define AHB2STBUS_STBUS_OPC_OFFSET 0x00 /* From PROTOCOL_BASE */
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#define AHB2STBUS_STBUS_OPC_4BIT 0x00
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#define AHB2STBUS_STBUS_OPC_8BIT 0x01
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#define AHB2STBUS_STBUS_OPC_16BIT 0x02
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#define AHB2STBUS_STBUS_OPC_32BIT 0x03
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#define AHB2STBUS_STBUS_OPC_64BIT 0x04
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/* The message length in number of packets is programmed in this register. */
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#define AHB2STBUS_MSGSIZE_OFFSET 0x04 /* From PROTOCOL_BASE */
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#define AHB2STBUS_MSGSIZE_DISABLE 0x0
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#define AHB2STBUS_MSGSIZE_2 0x1
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#define AHB2STBUS_MSGSIZE_4 0x2
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#define AHB2STBUS_MSGSIZE_8 0x3
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#define AHB2STBUS_MSGSIZE_16 0x4
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#define AHB2STBUS_MSGSIZE_32 0x5
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#define AHB2STBUS_MSGSIZE_64 0x6
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/* The chunk size in number of packets is programmed in this register */
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#define AHB2STBUS_CHUNKSIZE_OFFSET 0x08 /* From PROTOCOL_BASE */
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#define AHB2STBUS_CHUNKSIZE_DISABLE 0x0
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#define AHB2STBUS_CHUNKSIZE_2 0x1
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#define AHB2STBUS_CHUNKSIZE_4 0x2
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#define AHB2STBUS_CHUNKSIZE_8 0x3
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#define AHB2STBUS_CHUNKSIZE_16 0x4
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#define AHB2STBUS_CHUNKSIZE_32 0x5
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#define AHB2STBUS_CHUNKSIZE_64 0x6
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#define AHB2STBUS_TIMEOUT 0x0c
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#define AHB2STBUS_SW_RESET 0x10
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/* Wrapper Glue registers */
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#define AHB2STBUS_STRAP_OFFSET 0x14 /* From WRAPPER_GLUE_BASE */
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#define AHB2STBUS_STRAP_PLL 0x08 /* undocumented */
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#define AHB2STBUS_STRAP_8_BIT 0x00 /* ss_word_if */
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#define AHB2STBUS_STRAP_16_BIT 0x04 /* ss_word_if */
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/* Extensions to the standard USB register set */
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/* Define a bus wrapper IN/OUT threshold of 128 */
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#define AHB2STBUS_INSREG01_OFFSET (0x10 + 0x84) /* From EHCI_BASE */
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#define AHB2STBUS_INOUT_THRESHOLD 0x00800080
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#include <linux/clk.h>
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#include "../core/hcd.h"
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#define USB_CLKS_NR 3
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struct drv_usb_data {
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/*
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* USB-IP needs 2 clocks:
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* - a 48 MHz oscillator (to generate a final 480 MHz)
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* - a 100 MHz oscillator (for the NI)
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* - an oscillator for Phy
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* other clocks are generated internally using
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* direclty the external oscillator
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*/
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struct clk *clks[USB_CLKS_NR];
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void *ahb2stbus_wrapper_glue_base;
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void *ahb2stbus_protocol_base;
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struct platform_device *ehci_device;
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struct platform_device *ohci_device;
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struct stm_device_state *device_state;
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};
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#ifdef CONFIG_PM_RUNTIME
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int stm_ehci_hcd_register(struct platform_device *);
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int stm_ehci_hcd_unregister(struct platform_device *);
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int stm_ohci_hcd_register(struct platform_device *);
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int stm_ohci_hcd_unregister(struct platform_device *);
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#endif
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#endif
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