57 lines
1.6 KiB
C
57 lines
1.6 KiB
C
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/*
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* arch/arm/mach-orion5x/irq.c
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*
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* Core IRQ functions for Marvell Orion System On Chip
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*
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* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/gpio.h>
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#include <mach/bridge-regs.h>
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#include <plat/irq.h>
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#include "common.h"
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static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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{
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BUG_ON(irq < IRQ_ORION5X_GPIO_0_7 || irq > IRQ_ORION5X_GPIO_24_31);
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orion_gpio_irq_handler((irq - IRQ_ORION5X_GPIO_0_7) << 3);
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}
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void __init orion5x_init_irq(void)
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{
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int i;
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orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK);
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/*
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* Mask and clear GPIO IRQ interrupts
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*/
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writel(0x0, GPIO_LEVEL_MASK(0));
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writel(0x0, GPIO_EDGE_MASK(0));
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writel(0x0, GPIO_EDGE_CAUSE(0));
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/*
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* Register chained level handlers for GPIO IRQs by default.
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* User can use set_type() if he wants to use edge types handlers.
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*/
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for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) {
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set_irq_chip(i, &orion_gpio_irq_chip);
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set_irq_handler(i, handle_level_irq);
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irq_desc[i].status |= IRQ_LEVEL;
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set_irq_flags(i, IRQF_VALID);
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}
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set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
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set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
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set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
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set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler);
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}
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