kernel: update stmmac ethernet driver from latest linux-sh4-2.6.32.y - _stm24_0217
This commit is contained in:
@@ -22,13 +22,18 @@
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <linux/etherdevice.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
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#define STMMAC_VLAN_TAG_USED
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#include <linux/if_vlan.h>
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#endif
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#include "descs.h"
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#include "mmc.h"
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#undef CHIP_DEBUG_PRINT
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/* Turn-on extra printk debug for MAC core, dma and descriptors */
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@@ -48,7 +53,7 @@ struct stmmac_extra_stats {
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unsigned long tx_underflow ____cacheline_aligned;
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unsigned long tx_carrier;
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unsigned long tx_losscarrier;
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unsigned long tx_heartbeat;
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unsigned long vlan_tag;
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unsigned long tx_deferred;
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unsigned long tx_vlan;
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unsigned long tx_jabber;
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@@ -57,11 +62,12 @@ struct stmmac_extra_stats {
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unsigned long tx_ip_header_error;
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/* Receive errors */
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unsigned long rx_desc;
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unsigned long rx_partial;
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unsigned long rx_runt;
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unsigned long rx_toolong;
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unsigned long sa_filter_fail;
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unsigned long overflow_error;
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unsigned long ipc_csum_error;
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unsigned long rx_collision;
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unsigned long rx_crc;
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unsigned long dribbling_bit;
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unsigned long rx_length;
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unsigned long rx_mii;
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unsigned long rx_multicast;
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@@ -89,6 +95,16 @@ struct stmmac_extra_stats {
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unsigned long poll_n;
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unsigned long sched_timer_n;
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unsigned long normal_irq_n;
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unsigned long mmc_tx_irq_n;
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unsigned long mmc_rx_irq_n;
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unsigned long mmc_rx_csum_offload_irq_n;
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/* EEE */
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unsigned long irq_receive_pmt_irq_n;
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unsigned long irq_tx_path_in_lpi_mode_n;
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unsigned long irq_tx_path_exit_lpi_mode_n;
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unsigned long irq_rx_path_in_lpi_mode_n;
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unsigned long irq_rx_path_exit_lpi_mode_n;
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unsigned long phy_eee_wakeup_error_n;
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};
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#define HASH_TABLE_SIZE 64
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@@ -102,6 +118,36 @@ struct stmmac_extra_stats {
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#define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */
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/* DAM HW feature register fields */
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#define DMA_HW_FEAT_MIISEL 0x00000001 /* 10/100 Mbps Support */
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#define DMA_HW_FEAT_GMIISEL 0x00000002 /* 1000 Mbps Support */
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#define DMA_HW_FEAT_HDSEL 0x00000004 /* Half-Duplex Support */
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#define DMA_HW_FEAT_EXTHASHEN 0x00000008 /* Expanded DA Hash Filter */
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#define DMA_HW_FEAT_HASHSEL 0x00000010 /* HASH Filter */
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#define DMA_HW_FEAT_ADDMACADRSEL 0x00000020 /* Multiple MAC Addr Reg */
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#define DMA_HW_FEAT_PCSSEL 0x00000040 /* PCS registers */
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#define DMA_HW_FEAT_L3L4FLTREN 0x00000080 /* Layer 3 & Layer 4 Feature */
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#define DMA_HW_FEAT_SMASEL 0x00000100 /* SMA(MDIO) Interface */
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#define DMA_HW_FEAT_RWKSEL 0x00000200 /* PMT Remote Wakeup */
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#define DMA_HW_FEAT_MGKSEL 0x00000400 /* PMT Magic Packet */
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#define DMA_HW_FEAT_MMCSEL 0x00000800 /* RMON Module */
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#define DMA_HW_FEAT_TSVER1SEL 0x00001000 /* Only IEEE 1588-2002 Timestamp */
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#define DMA_HW_FEAT_TSVER2SEL 0x00002000 /* IEEE 1588-2008 Adv Timestamp */
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#define DMA_HW_FEAT_EEESEL 0x00004000 /* Energy Efficient Ethernet */
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#define DMA_HW_FEAT_AVSEL 0x00008000 /* AV Feature */
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#define DMA_HW_FEAT_TXCOESEL 0x00010000 /* Checksum Offload in Tx */
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#define DMA_HW_FEAT_RXTYP1COE 0x00020000 /* IP csum Offload(Type 1) in Rx */
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#define DMA_HW_FEAT_RXTYP2COE 0x00040000 /* IP csum Offload(Type 2) in Rx */
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#define DMA_HW_FEAT_RXFIFOSIZE 0x00080000 /* Rx FIFO > 2048 Bytes */
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#define DMA_HW_FEAT_RXCHCNT 0x00300000 /* No. of additional Rx Channels */
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#define DMA_HW_FEAT_TXCHCNT 0x00c00000 /* No. of additional Tx Channels */
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#define DMA_HW_FEAT_ENHDESSEL 0x01000000 /* Alternate (Enhanced Descriptor) */
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#define DMA_HW_FEAT_INTTSEN 0x02000000 /* Timestamping with Internal
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System Time */
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#define DMA_HW_FEAT_FLEXIPPSEN 0x04000000 /* Flexible PPS Output */
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#define DMA_HW_FEAT_SAVLANINS 0x08000000 /* Source Addr or VLAN Insertion */
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#define DMA_HW_FEAT_ACTPHYIF 0x70000000 /* Active/selected PHY interface */
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enum rx_frame_status { /* IPC status */
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good_frame = 0,
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discard_frame = 1,
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@@ -115,6 +161,48 @@ enum tx_dma_irq_status {
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handle_tx_rx = 3,
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};
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enum core_specific_irq_mask {
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core_mmc_tx_irq = 1,
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core_mmc_rx_irq = 2,
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core_mmc_rx_csum_offload_irq = 4,
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core_irq_receive_pmt_irq = 8,
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core_irq_tx_path_in_lpi_mode = 16,
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core_irq_tx_path_exit_lpi_mode = 32,
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core_irq_rx_path_in_lpi_mode = 64,
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core_irq_rx_path_exit_lpi_mode = 128,
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};
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/* DMA HW capabilities */
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struct dma_features {
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unsigned int mbps_10_100;
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unsigned int mbps_1000;
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unsigned int half_duplex;
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unsigned int hash_filter;
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unsigned int multi_addr;
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unsigned int pcs;
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unsigned int sma_mdio;
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unsigned int pmt_remote_wake_up;
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unsigned int pmt_magic_frame;
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unsigned int rmon;
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/* IEEE 1588-2002*/
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unsigned int time_stamp;
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/* IEEE 1588-2008*/
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unsigned int atime_stamp;
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/* 802.3az - Energy-Efficient Ethernet (EEE) */
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unsigned int eee;
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unsigned int av;
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/* TX and RX csum */
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unsigned int tx_coe;
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unsigned int rx_coe_type1;
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unsigned int rx_coe_type2;
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unsigned int rxfifo_over_2048;
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/* TX and RX number of channels */
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unsigned int number_rx_channel;
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unsigned int number_tx_channel;
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/* Alternate (enhanced) DESC mode*/
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unsigned int enh_desc;
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};
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/* GMAC TX FIFO is 8K, Rx FIFO is 16K */
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#define BUF_SIZE_16KiB 16384
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#define BUF_SIZE_8KiB 8192
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@@ -130,17 +218,6 @@ enum tx_dma_irq_status {
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#define MAC_ENABLE_TX 0x00000008 /* Transmitter Enable */
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#define MAC_RNABLE_RX 0x00000004 /* Receiver Enable */
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/* MAC Management Counters register */
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#define MMC_CONTROL 0x00000100 /* MMC Control */
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#define MMC_HIGH_INTR 0x00000104 /* MMC High Interrupt */
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#define MMC_LOW_INTR 0x00000108 /* MMC Low Interrupt */
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#define MMC_HIGH_INTR_MASK 0x0000010c /* MMC High Interrupt Mask */
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#define MMC_LOW_INTR_MASK 0x00000110 /* MMC Low Interrupt Mask */
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#define MMC_CONTROL_MAX_FRM_MASK 0x0003ff8 /* Maximum Frame Size */
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#define MMC_CONTROL_MAX_FRM_SHIFT 3
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#define MMC_CONTROL_MAX_FRAME 0x7FF
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struct stmmac_desc_ops {
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/* DMA RX descriptor ring initialization */
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void (*init_rx_desc) (struct dma_desc *p, unsigned int ring_size,
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@@ -198,6 +275,8 @@ struct stmmac_dma_ops {
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void (*stop_rx) (void __iomem *ioaddr);
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int (*dma_interrupt) (void __iomem *ioaddr,
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struct stmmac_extra_stats *x);
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/* If supported then get the optional core features */
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unsigned int (*get_hw_feature) (void __iomem *ioaddr);
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};
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struct stmmac_ops {
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@@ -208,7 +287,7 @@ struct stmmac_ops {
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/* Dump MAC registers */
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void (*dump_regs) (void __iomem *ioaddr);
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/* Handle extra events on specific interrupts hw dependent */
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void (*host_irq_status) (void __iomem *ioaddr);
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int (*host_irq_status) (void __iomem *ioaddr);
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/* Multicast filter setting */
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void (*set_filter) (struct net_device *dev);
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/* Flow control setting */
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@@ -221,6 +300,10 @@ struct stmmac_ops {
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unsigned int reg_n);
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void (*get_umac_addr) (void __iomem *ioaddr, unsigned char *addr,
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unsigned int reg_n);
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void (*set_eee_mode) (void __iomem *ioaddr, u32 lpi_ctrl_status);
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void (*reset_eee_mode) (void __iomem *ioaddr, u32 lpi_ctrl_status);
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void (*set_eee_timer) (void __iomem *ioaddr, int ls, int tw);
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void (*set_eee_pls) (void __iomem *ioaddr, int link, u32 lpi_ctrl_status);
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};
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struct mac_link {
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@@ -234,12 +317,25 @@ struct mii_regs {
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unsigned int data; /* MII Data */
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};
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struct stmmac_ring_mode_ops {
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unsigned int (*is_jumbo_frm) (int len, int ehn_desc);
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unsigned int (*jumbo_frm) (void *priv, struct sk_buff *skb, int csum);
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void (*refill_desc3) (int bfsize, struct dma_desc *p);
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void (*init_desc3) (int des3_as_data_buf, struct dma_desc *p);
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void (*init_dma_chain) (struct dma_desc *des, dma_addr_t phy_addr,
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unsigned int size);
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void (*clean_desc3) (struct dma_desc *p);
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int (*set_16kib_bfsize) (int mtu);
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};
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struct mac_device_info {
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const struct stmmac_ops *mac;
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const struct stmmac_desc_ops *desc;
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const struct stmmac_dma_ops *dma;
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const struct stmmac_ring_mode_ops *ring;
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struct mii_regs mii; /* MII register Addresses */
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struct mac_link link;
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unsigned int synopsys_uid;
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};
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struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr);
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@@ -249,4 +345,8 @@ extern void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6],
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unsigned int high, unsigned int low);
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extern void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,
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unsigned int high, unsigned int low);
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extern void stmmac_set_mac(void __iomem *ioaddr, bool enable);
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extern void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr);
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extern const struct stmmac_ring_mode_ops ring_mode_ops;
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