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add idl4k kernel firmware version 1.13.0.105

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This commit is contained in:
Jaroslav Kysela
2015-03-26 17:22:37 +01:00
parent 5194d2792e
commit e9070cdc77
31064 changed files with 12769984 additions and 0 deletions
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58
kernel/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h Normal file
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com>
* Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
* Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
*
* reference: /proc/cpuinfo,
* arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
* arch/mips/kernel/proc.c(show_cpuinfo),
* loongson2f user manual.
*/
#ifndef __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
#define __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
#define cpu_scache_line_size() 32
#define cpu_has_32fpr 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
#define cpu_has_4kex 1
#define cpu_has_64bits 1
#define cpu_has_cache_cdex_p 0
#define cpu_has_cache_cdex_s 0
#define cpu_has_counter 1
#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
#define cpu_has_divec 0
#define cpu_has_dsp 0
#define cpu_has_ejtag 0
#define cpu_has_fpu 1
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_inclusive_pcaches 1
#define cpu_has_llsc 1
#define cpu_has_mcheck 0
#define cpu_has_mdmx 0
#define cpu_has_mips16 0
#define cpu_has_mips32r1 0
#define cpu_has_mips32r2 0
#define cpu_has_mips3d 0
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_mipsmt 0
#define cpu_has_prefetch 0
#define cpu_has_smartmips 0
#define cpu_has_tlb 1
#define cpu_has_tx39_cache 0
#define cpu_has_userlocal 0
#define cpu_has_vce 0
#define cpu_has_vtag_icache 0
#define cpu_has_watch 1
#endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */

68
kernel/arch/mips/include/asm/mach-loongson/dma-coherence.h Normal file
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2006, 07 Ralf Baechle <ralf@linux-mips.org>
* Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
* Author: Fuxin Zhang, zhangfx@lemote.com
*
*/
#ifndef __ASM_MACH_LOONGSON_DMA_COHERENCE_H
#define __ASM_MACH_LOONGSON_DMA_COHERENCE_H
struct device;
static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
size_t size)
{
return virt_to_phys(addr) | 0x80000000;
}
static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
struct page *page)
{
return page_to_phys(page) | 0x80000000;
}
static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
dma_addr_t dma_addr)
{
return dma_addr & 0x7fffffff;
}
static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
size_t size, enum dma_data_direction direction)
{
}
static inline int plat_dma_supported(struct device *dev, u64 mask)
{
/*
* we fall back to GFP_DMA when the mask isn't all 1s,
* so we can't guarantee allocations that must be
* within a tighter range than GFP_DMA..
*/
if (mask < DMA_BIT_MASK(24))
return 0;
return 1;
}
static inline void plat_extra_sync_for_device(struct device *dev)
{
return;
}
static inline int plat_dma_mapping_error(struct device *dev,
dma_addr_t dma_addr)
{
return 0;
}
static inline int plat_device_is_coherent(struct device *dev)
{
return 0;
}
#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */

64
kernel/arch/mips/include/asm/mach-loongson/loongson.h Normal file
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/*
* Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
* Author: Wu Zhangjin <wuzj@lemote.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __ASM_MACH_LOONGSON_LOONGSON_H
#define __ASM_MACH_LOONGSON_LOONGSON_H
#include <linux/io.h>
#include <linux/init.h>
/* there is an internal bonito64-compatiable northbridge in loongson2e/2f */
#include <asm/mips-boards/bonito64.h>
/* loongson internal northbridge initialization */
extern void bonito_irq_init(void);
/* machine-specific reboot/halt operation */
extern void mach_prepare_reboot(void);
extern void mach_prepare_shutdown(void);
/* environment arguments from bootloader */
extern unsigned long bus_clock, cpu_clock_freq;
extern unsigned long memsize, highmemsize;
/* loongson-specific command line, env and memory initialization */
extern void __init prom_init_memory(void);
extern void __init prom_init_cmdline(void);
extern void __init prom_init_env(void);
/* irq operation functions */
extern void bonito_irqdispatch(void);
extern void __init bonito_irq_init(void);
extern void __init set_irq_trigger_mode(void);
extern void __init mach_init_irq(void);
extern void mach_irq_dispatch(unsigned int pending);
/* PCI Configuration Registers */
#define LOONGSON_PCI_ISR4C BONITO_PCI_REG(0x4c)
/* PCI_Hit*_Sel_* */
#define LOONGSON_PCI_HIT0_SEL_L BONITO(BONITO_REGBASE + 0x50)
#define LOONGSON_PCI_HIT0_SEL_H BONITO(BONITO_REGBASE + 0x54)
#define LOONGSON_PCI_HIT1_SEL_L BONITO(BONITO_REGBASE + 0x58)
#define LOONGSON_PCI_HIT1_SEL_H BONITO(BONITO_REGBASE + 0x5c)
#define LOONGSON_PCI_HIT2_SEL_L BONITO(BONITO_REGBASE + 0x60)
#define LOONGSON_PCI_HIT2_SEL_H BONITO(BONITO_REGBASE + 0x64)
/* PXArb Config & Status */
#define LOONGSON_PXARB_CFG BONITO(BONITO_REGBASE + 0x68)
#define LOONGSON_PXARB_STATUS BONITO(BONITO_REGBASE + 0x6c)
/* loongson2-specific perf counter IRQ */
#define LOONGSON2_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6)
#endif /* __ASM_MACH_LOONGSON_LOONGSON_H */

22
kernel/arch/mips/include/asm/mach-loongson/machine.h Normal file
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/*
* Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
* Author: Wu Zhangjin <wuzj@lemote.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __ASM_MACH_LOONGSON_MACHINE_H
#define __ASM_MACH_LOONGSON_MACHINE_H
#ifdef CONFIG_LEMOTE_FULOONG2E
#define LOONGSON_UART_BASE (BONITO_PCIIO_BASE + 0x3f8)
#define LOONGSON_MACHTYPE MACH_LEMOTE_FL2E
#endif
#endif /* __ASM_MACH_LOONGSON_MACHINE_H */

36
kernel/arch/mips/include/asm/mach-loongson/mc146818rtc.h Normal file
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1998, 2001, 03, 07 by Ralf Baechle (ralf@linux-mips.org)
*
* RTC routines for PC style attached Dallas chip.
*/
#ifndef __ASM_MACH_LOONGSON_MC146818RTC_H
#define __ASM_MACH_LOONGSON_MC146818RTC_H
#include <linux/io.h>
#define RTC_PORT(x) (0x70 + (x))
#define RTC_IRQ 8
static inline unsigned char CMOS_READ(unsigned long addr)
{
outb_p(addr, RTC_PORT(0));
return inb_p(RTC_PORT(1));
}
static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
{
outb_p(addr, RTC_PORT(0));
outb_p(data, RTC_PORT(1));
}
#define RTC_ALWAYS_BCD 0
#ifndef mc146818_decode_year
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
#endif
#endif /* __ASM_MACH_LOONGSON_MC146818RTC_H */

30
kernel/arch/mips/include/asm/mach-loongson/mem.h Normal file
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/*
* Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
* Author: Wu Zhangjin <wuzj@lemote.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __ASM_MACH_LOONGSON_MEM_H
#define __ASM_MACH_LOONGSON_MEM_H
/*
* On Lemote Loongson 2e
*
* the high memory space starts from 512M.
* the peripheral registers reside between 0x1000:0000 and 0x2000:0000.
*/
#ifdef CONFIG_LEMOTE_FULOONG2E
#define LOONGSON_HIGHMEM_START 0x20000000
#define LOONGSON_MMIO_MEM_START 0x10000000
#define LOONGSON_MMIO_MEM_END 0x20000000
#endif
#endif /* __ASM_MACH_LOONGSON_MEM_H */

37
kernel/arch/mips/include/asm/mach-loongson/pci.h Normal file
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/*
* Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org>
*
* This program is free software; you can redistribute it
* and/or modify it under the terms of the GNU General
* Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied
* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more
* details.
*
* You should have received a copy of the GNU General Public
* License along with this program; if not, write to the Free
* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
* 02139, USA.
*/
#ifndef __ASM_MACH_LOONGSON_PCI_H_
#define __ASM_MACH_LOONGSON_PCI_H_
extern struct pci_ops bonito64_pci_ops;
#ifdef CONFIG_LEMOTE_FULOONG2E
/* this pci memory space is mapped by pcimap in pci.c */
#define LOONGSON_PCI_MEM_START BONITO_PCILO1_BASE
#define LOONGSON_PCI_MEM_END (BONITO_PCILO1_BASE + 0x04000000 * 2)
/* this is an offset from mips_io_port_base */
#define LOONGSON_PCI_IO_START 0x00004000UL
#endif
#endif /* !__ASM_MACH_LOONGSON_PCI_H_ */

25
kernel/arch/mips/include/asm/mach-loongson/war.h Normal file
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
*/
#ifndef __ASM_MACH_LOONGSON_WAR_H
#define __ASM_MACH_LOONGSON_WAR_H
#define R4600_V1_INDEX_ICACHEOP_WAR 0
#define R4600_V1_HIT_CACHEOP_WAR 0
#define R4600_V2_HIT_CACHEOP_WAR 0
#define R5432_CP0_INTERRUPT_WAR 0
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#define MIPS4K_ICACHE_REFILL_WAR 0
#define MIPS_CACHE_SYNC_WAR 0
#define TX49XX_ICACHE_INDEX_INV_WAR 0
#define RM9000_CDEX_SMP_WAR 0
#define ICACHE_REFILLS_WORKAROUND_WAR 0
#define R10000_LLSC_WAR 0
#define MIPS34K_MISSED_ITLB_WAR 0
#endif /* __ASM_MACH_LEMOTE_WAR_H */