add idl4k kernel firmware version 1.13.0.105

This commit is contained in:
Jaroslav Kysela
2015-03-26 17:22:37 +01:00
parent 5194d2792e
commit e9070cdc77
31064 changed files with 12769984 additions and 0 deletions

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/*
* Analog Devices ADP5588 I/O Expander and QWERTY Keypad Controller
*
* Copyright 2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#ifndef _ADP5588_H
#define _ADP5588_H
#define DEV_ID 0x00 /* Device ID */
#define CFG 0x01 /* Configuration Register1 */
#define INT_STAT 0x02 /* Interrupt Status Register */
#define KEY_LCK_EC_STAT 0x03 /* Key Lock and Event Counter Register */
#define Key_EVENTA 0x04 /* Key Event Register A */
#define Key_EVENTB 0x05 /* Key Event Register B */
#define Key_EVENTC 0x06 /* Key Event Register C */
#define Key_EVENTD 0x07 /* Key Event Register D */
#define Key_EVENTE 0x08 /* Key Event Register E */
#define Key_EVENTF 0x09 /* Key Event Register F */
#define Key_EVENTG 0x0A /* Key Event Register G */
#define Key_EVENTH 0x0B /* Key Event Register H */
#define Key_EVENTI 0x0C /* Key Event Register I */
#define Key_EVENTJ 0x0D /* Key Event Register J */
#define KP_LCK_TMR 0x0E /* Keypad Lock1 to Lock2 Timer */
#define UNLOCK1 0x0F /* Unlock Key1 */
#define UNLOCK2 0x10 /* Unlock Key2 */
#define GPIO_INT_STAT1 0x11 /* GPIO Interrupt Status */
#define GPIO_INT_STAT2 0x12 /* GPIO Interrupt Status */
#define GPIO_INT_STAT3 0x13 /* GPIO Interrupt Status */
#define GPIO_DAT_STAT1 0x14 /* GPIO Data Status, Read twice to clear */
#define GPIO_DAT_STAT2 0x15 /* GPIO Data Status, Read twice to clear */
#define GPIO_DAT_STAT3 0x16 /* GPIO Data Status, Read twice to clear */
#define GPIO_DAT_OUT1 0x17 /* GPIO DATA OUT */
#define GPIO_DAT_OUT2 0x18 /* GPIO DATA OUT */
#define GPIO_DAT_OUT3 0x19 /* GPIO DATA OUT */
#define GPIO_INT_EN1 0x1A /* GPIO Interrupt Enable */
#define GPIO_INT_EN2 0x1B /* GPIO Interrupt Enable */
#define GPIO_INT_EN3 0x1C /* GPIO Interrupt Enable */
#define KP_GPIO1 0x1D /* Keypad or GPIO Selection */
#define KP_GPIO2 0x1E /* Keypad or GPIO Selection */
#define KP_GPIO3 0x1F /* Keypad or GPIO Selection */
#define GPI_EM1 0x20 /* GPI Event Mode 1 */
#define GPI_EM2 0x21 /* GPI Event Mode 2 */
#define GPI_EM3 0x22 /* GPI Event Mode 3 */
#define GPIO_DIR1 0x23 /* GPIO Data Direction */
#define GPIO_DIR2 0x24 /* GPIO Data Direction */
#define GPIO_DIR3 0x25 /* GPIO Data Direction */
#define GPIO_INT_LVL1 0x26 /* GPIO Edge/Level Detect */
#define GPIO_INT_LVL2 0x27 /* GPIO Edge/Level Detect */
#define GPIO_INT_LVL3 0x28 /* GPIO Edge/Level Detect */
#define Debounce_DIS1 0x29 /* Debounce Disable */
#define Debounce_DIS2 0x2A /* Debounce Disable */
#define Debounce_DIS3 0x2B /* Debounce Disable */
#define GPIO_PULL1 0x2C /* GPIO Pull Disable */
#define GPIO_PULL2 0x2D /* GPIO Pull Disable */
#define GPIO_PULL3 0x2E /* GPIO Pull Disable */
#define CMP_CFG_STAT 0x30 /* Comparator Configuration and Status Register */
#define CMP_CONFG_SENS1 0x31 /* Sensor1 Comparator Configuration Register */
#define CMP_CONFG_SENS2 0x32 /* L2 Light Sensor Reference Level, Output Falling for Sensor 1 */
#define CMP1_LVL2_TRIP 0x33 /* L2 Light Sensor Hysteresis (Active when Output Rising) for Sensor 1 */
#define CMP1_LVL2_HYS 0x34 /* L3 Light Sensor Reference Level, Output Falling For Sensor 1 */
#define CMP1_LVL3_TRIP 0x35 /* L3 Light Sensor Hysteresis (Active when Output Rising) For Sensor 1 */
#define CMP1_LVL3_HYS 0x36 /* Sensor 2 Comparator Configuration Register */
#define CMP2_LVL2_TRIP 0x37 /* L2 Light Sensor Reference Level, Output Falling for Sensor 2 */
#define CMP2_LVL2_HYS 0x38 /* L2 Light Sensor Hysteresis (Active when Output Rising) for Sensor 2 */
#define CMP2_LVL3_TRIP 0x39 /* L3 Light Sensor Reference Level, Output Falling For Sensor 2 */
#define CMP2_LVL3_HYS 0x3A /* L3 Light Sensor Hysteresis (Active when Output Rising) For Sensor 2 */
#define CMP1_ADC_DAT_R1 0x3B /* Comparator 1 ADC data Register1 */
#define CMP1_ADC_DAT_R2 0x3C /* Comparator 1 ADC data Register2 */
#define CMP2_ADC_DAT_R1 0x3D /* Comparator 2 ADC data Register1 */
#define CMP2_ADC_DAT_R2 0x3E /* Comparator 2 ADC data Register2 */
#define ADP5588_DEVICE_ID_MASK 0xF
/* Put one of these structures in i2c_board_info platform_data */
#define ADP5588_KEYMAPSIZE 80
struct adp5588_kpad_platform_data {
int rows; /* Number of rows */
int cols; /* Number of columns */
const unsigned short *keymap; /* Pointer to keymap */
unsigned short keymapsize; /* Keymap size */
unsigned repeat:1; /* Enable key repeat */
unsigned en_keylock:1; /* Enable Key Lock feature */
unsigned short unlock_key1; /* Unlock Key 1 */
unsigned short unlock_key2; /* Unlock Key 2 */
};
#endif

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#ifndef _LINUX_AT24_H
#define _LINUX_AT24_H
#include <linux/types.h>
#include <linux/memory.h>
/*
* As seen through Linux I2C, differences between the most common types of I2C
* memory include:
* - How much memory is available (usually specified in bit)?
* - What write page size does it support?
* - Special flags (16 bit addresses, read_only, world readable...)?
*
* If you set up a custom eeprom type, please double-check the parameters.
* Especially page_size needs extra care, as you risk data loss if your value
* is bigger than what the chip actually supports!
*/
struct at24_platform_data {
u32 byte_len; /* size (sum of all addr) */
u16 page_size; /* for writes */
u8 flags;
#define AT24_FLAG_ADDR16 0x80 /* address pointer is 16 bit */
#define AT24_FLAG_READONLY 0x40 /* sysfs-entry will be read-only */
#define AT24_FLAG_IRUGO 0x20 /* sysfs-entry will be world-readable */
#define AT24_FLAG_TAKE8ADDR 0x10 /* take always 8 addresses (24c00) */
void (*setup)(struct memory_accessor *, void *context);
void *context;
};
#endif /* _LINUX_AT24_H */

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/*
* dm355evm_msp.h - support MSP430 microcontroller on DM355EVM board
*/
#ifndef __LINUX_I2C_DM355EVM_MSP
#define __LINUX_I2C_DM355EVM_MSP
/*
* Written against Spectrum's writeup for the A4 firmware revision,
* and tweaked to match source and rev D2 schematics by removing CPLD
* and NOR flash hooks (which were last appropriate in rev B boards).
*
* Note that the firmware supports a flavor of write posting ... to be
* sure a write completes, issue another read or write.
*/
/* utilities to access "registers" emulated by msp430 firmware */
extern int dm355evm_msp_write(u8 value, u8 reg);
extern int dm355evm_msp_read(u8 reg);
/* command/control registers */
#define DM355EVM_MSP_COMMAND 0x00
# define MSP_COMMAND_NULL 0
# define MSP_COMMAND_RESET_COLD 1
# define MSP_COMMAND_RESET_WARM 2
# define MSP_COMMAND_RESET_WARM_I 3
# define MSP_COMMAND_POWEROFF 4
# define MSP_COMMAND_IR_REINIT 5
#define DM355EVM_MSP_STATUS 0x01
# define MSP_STATUS_BAD_OFFSET BIT(0)
# define MSP_STATUS_BAD_COMMAND BIT(1)
# define MSP_STATUS_POWER_ERROR BIT(2)
# define MSP_STATUS_RXBUF_OVERRUN BIT(3)
#define DM355EVM_MSP_RESET 0x02 /* 0 bits == in reset */
# define MSP_RESET_DC5 BIT(0)
# define MSP_RESET_TVP5154 BIT(2)
# define MSP_RESET_IMAGER BIT(3)
# define MSP_RESET_ETHERNET BIT(4)
# define MSP_RESET_SYS BIT(5)
# define MSP_RESET_AIC33 BIT(7)
/* GPIO registers ... bit patterns mostly match the source MSP ports */
#define DM355EVM_MSP_LED 0x03 /* active low (MSP P4) */
#define DM355EVM_MSP_SWITCH1 0x04 /* (MSP P5, masked) */
# define MSP_SWITCH1_SW6_1 BIT(0)
# define MSP_SWITCH1_SW6_2 BIT(1)
# define MSP_SWITCH1_SW6_3 BIT(2)
# define MSP_SWITCH1_SW6_4 BIT(3)
# define MSP_SWITCH1_J1 BIT(4) /* NTSC/PAL */
# define MSP_SWITCH1_MSP_INT BIT(5) /* active low */
#define DM355EVM_MSP_SWITCH2 0x05 /* (MSP P6, masked) */
# define MSP_SWITCH2_SW10 BIT(3)
# define MSP_SWITCH2_SW11 BIT(4)
# define MSP_SWITCH2_SW12 BIT(5)
# define MSP_SWITCH2_SW13 BIT(6)
# define MSP_SWITCH2_SW14 BIT(7)
#define DM355EVM_MSP_SDMMC 0x06 /* (MSP P2, masked) */
# define MSP_SDMMC_0_WP BIT(1)
# define MSP_SDMMC_0_CD BIT(2) /* active low */
# define MSP_SDMMC_1_WP BIT(3)
# define MSP_SDMMC_1_CD BIT(4) /* active low */
#define DM355EVM_MSP_FIRMREV 0x07 /* not a GPIO (out of order) */
#define DM355EVM_MSP_VIDEO_IN 0x08 /* (MSP P3, masked) */
# define MSP_VIDEO_IMAGER BIT(7) /* low == tvp5146 */
/* power supply registers are currently omitted */
/* RTC registers */
#define DM355EVM_MSP_RTC_0 0x12 /* LSB */
#define DM355EVM_MSP_RTC_1 0x13
#define DM355EVM_MSP_RTC_2 0x14
#define DM355EVM_MSP_RTC_3 0x15 /* MSB */
/* input event queue registers; code == ((HIGH << 8) | LOW) */
#define DM355EVM_MSP_INPUT_COUNT 0x16 /* decrement by reading LOW */
#define DM355EVM_MSP_INPUT_HIGH 0x17
#define DM355EVM_MSP_INPUT_LOW 0x18
#endif /* __LINUX_I2C_DM355EVM_MSP */

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/*
* lm8323.h - Configuration for LM8323 keypad driver.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation (version 2 of the License only).
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __LINUX_LM8323_H
#define __LINUX_LM8323_H
#include <linux/types.h>
/*
* Largest keycode that the chip can send, plus one,
* so keys can be mapped directly at the index of the
* LM8323 keycode instead of subtracting one.
*/
#define LM8323_KEYMAP_SIZE (0x7f + 1)
#define LM8323_NUM_PWMS 3
struct lm8323_platform_data {
int debounce_time; /* Time to watch for key bouncing, in ms. */
int active_time; /* Idle time until sleep, in ms. */
int size_x;
int size_y;
bool repeat;
const unsigned short *keymap;
const char *pwm_names[LM8323_NUM_PWMS];
const char *name; /* Device name. */
};
#endif /* __LINUX_LM8323_H */

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#ifndef __LINUX_I2C_MAX732X_H
#define __LINUX_I2C_MAX732X_H
/* platform data for the MAX732x 8/16-bit I/O expander driver */
struct max732x_platform_data {
/* number of the first GPIO */
unsigned gpio_base;
void *context; /* param to setup/teardown */
int (*setup)(struct i2c_client *client,
unsigned gpio, unsigned ngpio,
void *context);
int (*teardown)(struct i2c_client *client,
unsigned gpio, unsigned ngpio,
void *context);
};
#endif /* __LINUX_I2C_MAX732X_H */

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/*
* mcs5000_ts.h
*
* Copyright (C) 2009 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __LINUX_MCS5000_TS_H
#define __LINUX_MCS5000_TS_H
/* platform data for the MELFAS MCS-5000 touchscreen driver */
struct mcs5000_ts_platform_data {
void (*cfg_pin)(void);
int x_size;
int y_size;
};
#endif /* __LINUX_MCS5000_TS_H */

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/* platform data for the PCA9539 16-bit I/O expander driver */
struct pca953x_platform_data {
/* number of the first GPIO */
unsigned gpio_base;
/* initial polarity inversion setting */
uint16_t invert;
void *context; /* param to setup/teardown */
int (*setup)(struct i2c_client *client,
unsigned gpio, unsigned ngpio,
void *context);
int (*teardown)(struct i2c_client *client,
unsigned gpio, unsigned ngpio,
void *context);
char **names;
};

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#ifndef __LINUX_PCF857X_H
#define __LINUX_PCF857X_H
/**
* struct pcf857x_platform_data - data to set up pcf857x driver
* @gpio_base: number of the chip's first GPIO
* @n_latch: optional bit-inverse of initial register value; if
* you leave this initialized to zero the driver will act
* like the chip was just reset
* @setup: optional callback issued once the GPIOs are valid
* @teardown: optional callback issued before the GPIOs are invalidated
* @context: optional parameter passed to setup() and teardown()
*
* In addition to the I2C_BOARD_INFO() state appropriate to each chip,
* the i2c_board_info used with the pcf875x driver must provide its
* platform_data (pointer to one of these structures) with at least
* the gpio_base value initialized.
*
* The @setup callback may be used with the kind of board-specific glue
* which hands the (now-valid) GPIOs to other drivers, or which puts
* devices in their initial states using these GPIOs.
*
* These GPIO chips are only "quasi-bidirectional"; read the chip specs
* to understand the behavior. They don't have separate registers to
* record which pins are used for input or output, record which output
* values are driven, or provide access to input values. That must be
* inferred by reading the chip's value and knowing the last value written
* to it. If you leave n_latch initialized to zero, that last written
* value is presumed to be all ones (as if the chip were just reset).
*/
struct pcf857x_platform_data {
unsigned gpio_base;
unsigned n_latch;
int (*setup)(struct i2c_client *client,
int gpio, unsigned ngpio,
void *context);
int (*teardown)(struct i2c_client *client,
int gpio, unsigned ngpio,
void *context);
void *context;
};
#endif /* __LINUX_PCF857X_H */

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#ifndef __LINUX_I2C_S6000_H
#define __LINUX_I2C_S6000_H
struct s6_i2c_platform_data {
const char *clock; /* the clock to use */
int bus_num; /* the bus number to register */
};
#endif

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/* linux/i2c/tps65010.h
*
* Functions to access TPS65010 power management device.
*
* Copyright (C) 2004 Dirk Behme <dirk.behme@de.bosch.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __LINUX_I2C_TPS65010_H
#define __LINUX_I2C_TPS65010_H
/*
* ----------------------------------------------------------------------------
* Registers, all 8 bits
* ----------------------------------------------------------------------------
*/
#define TPS_CHGSTATUS 0x01
# define TPS_CHG_USB (1 << 7)
# define TPS_CHG_AC (1 << 6)
# define TPS_CHG_THERM (1 << 5)
# define TPS_CHG_TERM (1 << 4)
# define TPS_CHG_TAPER_TMO (1 << 3)
# define TPS_CHG_CHG_TMO (1 << 2)
# define TPS_CHG_PRECHG_TMO (1 << 1)
# define TPS_CHG_TEMP_ERR (1 << 0)
#define TPS_REGSTATUS 0x02
# define TPS_REG_ONOFF (1 << 7)
# define TPS_REG_COVER (1 << 6)
# define TPS_REG_UVLO (1 << 5)
# define TPS_REG_NO_CHG (1 << 4) /* tps65013 */
# define TPS_REG_PG_LD02 (1 << 3)
# define TPS_REG_PG_LD01 (1 << 2)
# define TPS_REG_PG_MAIN (1 << 1)
# define TPS_REG_PG_CORE (1 << 0)
#define TPS_MASK1 0x03
#define TPS_MASK2 0x04
#define TPS_ACKINT1 0x05
#define TPS_ACKINT2 0x06
#define TPS_CHGCONFIG 0x07
# define TPS_CHARGE_POR (1 << 7) /* 65010/65012 */
# define TPS65013_AUA (1 << 7) /* 65011/65013 */
# define TPS_CHARGE_RESET (1 << 6)
# define TPS_CHARGE_FAST (1 << 5)
# define TPS_CHARGE_CURRENT (3 << 3)
# define TPS_VBUS_500MA (1 << 2)
# define TPS_VBUS_CHARGING (1 << 1)
# define TPS_CHARGE_ENABLE (1 << 0)
#define TPS_LED1_ON 0x08
#define TPS_LED1_PER 0x09
#define TPS_LED2_ON 0x0a
#define TPS_LED2_PER 0x0b
#define TPS_VDCDC1 0x0c
# define TPS_ENABLE_LP (1 << 3)
#define TPS_VDCDC2 0x0d
#define TPS_VREGS1 0x0e
# define TPS_LDO2_ENABLE (1 << 7)
# define TPS_LDO2_OFF (1 << 6)
# define TPS_VLDO2_3_0V (3 << 4)
# define TPS_VLDO2_2_75V (2 << 4)
# define TPS_VLDO2_2_5V (1 << 4)
# define TPS_VLDO2_1_8V (0 << 4)
# define TPS_LDO1_ENABLE (1 << 3)
# define TPS_LDO1_OFF (1 << 2)
# define TPS_VLDO1_3_0V (3 << 0)
# define TPS_VLDO1_2_75V (2 << 0)
# define TPS_VLDO1_2_5V (1 << 0)
# define TPS_VLDO1_ADJ (0 << 0)
#define TPS_MASK3 0x0f
#define TPS_DEFGPIO 0x10
/*
* ----------------------------------------------------------------------------
* Macros used by exported functions
* ----------------------------------------------------------------------------
*/
#define LED1 1
#define LED2 2
#define OFF 0
#define ON 1
#define BLINK 2
#define GPIO1 1
#define GPIO2 2
#define GPIO3 3
#define GPIO4 4
#define LOW 0
#define HIGH 1
/*
* ----------------------------------------------------------------------------
* Exported functions
* ----------------------------------------------------------------------------
*/
/* Draw from VBUS:
* 0 mA -- DON'T DRAW (might supply power instead)
* 100 mA -- usb unit load (slowest charge rate)
* 500 mA -- usb high power (fast battery charge)
*/
extern int tps65010_set_vbus_draw(unsigned mA);
/* tps65010_set_gpio_out_value parameter:
* gpio: GPIO1, GPIO2, GPIO3 or GPIO4
* value: LOW or HIGH
*/
extern int tps65010_set_gpio_out_value(unsigned gpio, unsigned value);
/* tps65010_set_led parameter:
* led: LED1 or LED2
* mode: ON, OFF or BLINK
*/
extern int tps65010_set_led(unsigned led, unsigned mode);
/* tps65010_set_vib parameter:
* value: ON or OFF
*/
extern int tps65010_set_vib(unsigned value);
/* tps65010_set_low_pwr parameter:
* mode: ON or OFF
*/
extern int tps65010_set_low_pwr(unsigned mode);
/* tps65010_config_vregs1 parameter:
* value to be written to VREGS1 register
* Note: The complete register is written, set all bits you need
*/
extern int tps65010_config_vregs1(unsigned value);
/* tps65013_set_low_pwr parameter:
* mode: ON or OFF
*/
extern int tps65013_set_low_pwr(unsigned mode);
struct i2c_client;
/**
* struct tps65010_board - packages GPIO and LED lines
* @base: the GPIO number to assign to GPIO-1
* @outmask: bit (N-1) is set to allow GPIO-N to be used as an
* (open drain) output
* @setup: optional callback issued once the GPIOs are valid
* @teardown: optional callback issued before the GPIOs are invalidated
* @context: optional parameter passed to setup() and teardown()
*
* Board data may be used to package the GPIO (and LED) lines for use
* in by the generic GPIO and LED frameworks. The first four GPIOs
* starting at gpio_base are GPIO1..GPIO4. The next two are LED1/nPG
* and LED2 (with hardware blinking capability, not currently exposed).
*
* The @setup callback may be used with the kind of board-specific glue
* which hands the (now-valid) GPIOs to other drivers, or which puts
* devices in their initial states using these GPIOs.
*/
struct tps65010_board {
int base;
unsigned outmask;
int (*setup)(struct i2c_client *client, void *context);
int (*teardown)(struct i2c_client *client, void *context);
void *context;
};
#endif /* __LINUX_I2C_TPS65010_H */

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#ifndef __LINUX_I2C_TSC2007_H
#define __LINUX_I2C_TSC2007_H
/* linux/i2c/tsc2007.h */
struct tsc2007_platform_data {
u16 model; /* 2007. */
u16 x_plate_ohms;
int (*get_pendown_state)(void);
void (*clear_penirq)(void); /* If needed, clear 2nd level
interrupt source */
int (*init_platform_hw)(void);
void (*exit_platform_hw)(void);
};
#endif

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/*
* twl4030.h - header for TWL4030 PM and audio CODEC device
*
* Copyright (C) 2005-2006 Texas Instruments, Inc.
*
* Based on tlv320aic23.c:
* Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef __TWL4030_H_
#define __TWL4030_H_
#include <linux/types.h>
#include <linux/input/matrix_keypad.h>
/*
* Using the twl4030 core we address registers using a pair
* { module id, relative register offset }
* which that core then maps to the relevant
* { i2c slave, absolute register address }
*
* The module IDs are meaningful only to the twl4030 core code,
* which uses them as array indices to look up the first register
* address each module uses within a given i2c slave.
*/
/* Slave 0 (i2c address 0x48) */
#define TWL4030_MODULE_USB 0x00
/* Slave 1 (i2c address 0x49) */
#define TWL4030_MODULE_AUDIO_VOICE 0x01
#define TWL4030_MODULE_GPIO 0x02
#define TWL4030_MODULE_INTBR 0x03
#define TWL4030_MODULE_PIH 0x04
#define TWL4030_MODULE_TEST 0x05
/* Slave 2 (i2c address 0x4a) */
#define TWL4030_MODULE_KEYPAD 0x06
#define TWL4030_MODULE_MADC 0x07
#define TWL4030_MODULE_INTERRUPTS 0x08
#define TWL4030_MODULE_LED 0x09
#define TWL4030_MODULE_MAIN_CHARGE 0x0A
#define TWL4030_MODULE_PRECHARGE 0x0B
#define TWL4030_MODULE_PWM0 0x0C
#define TWL4030_MODULE_PWM1 0x0D
#define TWL4030_MODULE_PWMA 0x0E
#define TWL4030_MODULE_PWMB 0x0F
/* Slave 3 (i2c address 0x4b) */
#define TWL4030_MODULE_BACKUP 0x10
#define TWL4030_MODULE_INT 0x11
#define TWL4030_MODULE_PM_MASTER 0x12
#define TWL4030_MODULE_PM_RECEIVER 0x13
#define TWL4030_MODULE_RTC 0x14
#define TWL4030_MODULE_SECURED_REG 0x15
/*
* Read and write single 8-bit registers
*/
int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg);
int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);
/*
* Read and write several 8-bit registers at once.
*
* IMPORTANT: For twl4030_i2c_write(), allocate num_bytes + 1
* for the value, and populate your data starting at offset 1.
*/
int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
/*----------------------------------------------------------------------*/
/*
* NOTE: at up to 1024 registers, this is a big chip.
*
* Avoid putting register declarations in this file, instead of into
* a driver-private file, unless some of the registers in a block
* need to be shared with other drivers. One example is blocks that
* have Secondary IRQ Handler (SIH) registers.
*/
#define TWL4030_SIH_CTRL_EXCLEN_MASK BIT(0)
#define TWL4030_SIH_CTRL_PENDDIS_MASK BIT(1)
#define TWL4030_SIH_CTRL_COR_MASK BIT(2)
/*----------------------------------------------------------------------*/
/*
* GPIO Block Register offsets (use TWL4030_MODULE_GPIO)
*/
#define REG_GPIODATAIN1 0x0
#define REG_GPIODATAIN2 0x1
#define REG_GPIODATAIN3 0x2
#define REG_GPIODATADIR1 0x3
#define REG_GPIODATADIR2 0x4
#define REG_GPIODATADIR3 0x5
#define REG_GPIODATAOUT1 0x6
#define REG_GPIODATAOUT2 0x7
#define REG_GPIODATAOUT3 0x8
#define REG_CLEARGPIODATAOUT1 0x9
#define REG_CLEARGPIODATAOUT2 0xA
#define REG_CLEARGPIODATAOUT3 0xB
#define REG_SETGPIODATAOUT1 0xC
#define REG_SETGPIODATAOUT2 0xD
#define REG_SETGPIODATAOUT3 0xE
#define REG_GPIO_DEBEN1 0xF
#define REG_GPIO_DEBEN2 0x10
#define REG_GPIO_DEBEN3 0x11
#define REG_GPIO_CTRL 0x12
#define REG_GPIOPUPDCTR1 0x13
#define REG_GPIOPUPDCTR2 0x14
#define REG_GPIOPUPDCTR3 0x15
#define REG_GPIOPUPDCTR4 0x16
#define REG_GPIOPUPDCTR5 0x17
#define REG_GPIO_ISR1A 0x19
#define REG_GPIO_ISR2A 0x1A
#define REG_GPIO_ISR3A 0x1B
#define REG_GPIO_IMR1A 0x1C
#define REG_GPIO_IMR2A 0x1D
#define REG_GPIO_IMR3A 0x1E
#define REG_GPIO_ISR1B 0x1F
#define REG_GPIO_ISR2B 0x20
#define REG_GPIO_ISR3B 0x21
#define REG_GPIO_IMR1B 0x22
#define REG_GPIO_IMR2B 0x23
#define REG_GPIO_IMR3B 0x24
#define REG_GPIO_EDR1 0x28
#define REG_GPIO_EDR2 0x29
#define REG_GPIO_EDR3 0x2A
#define REG_GPIO_EDR4 0x2B
#define REG_GPIO_EDR5 0x2C
#define REG_GPIO_SIH_CTRL 0x2D
/* Up to 18 signals are available as GPIOs, when their
* pins are not assigned to another use (such as ULPI/USB).
*/
#define TWL4030_GPIO_MAX 18
/*----------------------------------------------------------------------*/
/*
* Keypad register offsets (use TWL4030_MODULE_KEYPAD)
* ... SIH/interrupt only
*/
#define TWL4030_KEYPAD_KEYP_ISR1 0x11
#define TWL4030_KEYPAD_KEYP_IMR1 0x12
#define TWL4030_KEYPAD_KEYP_ISR2 0x13
#define TWL4030_KEYPAD_KEYP_IMR2 0x14
#define TWL4030_KEYPAD_KEYP_SIR 0x15 /* test register */
#define TWL4030_KEYPAD_KEYP_EDR 0x16
#define TWL4030_KEYPAD_KEYP_SIH_CTRL 0x17
/*----------------------------------------------------------------------*/
/*
* Multichannel ADC register offsets (use TWL4030_MODULE_MADC)
* ... SIH/interrupt only
*/
#define TWL4030_MADC_ISR1 0x61
#define TWL4030_MADC_IMR1 0x62
#define TWL4030_MADC_ISR2 0x63
#define TWL4030_MADC_IMR2 0x64
#define TWL4030_MADC_SIR 0x65 /* test register */
#define TWL4030_MADC_EDR 0x66
#define TWL4030_MADC_SIH_CTRL 0x67
/*----------------------------------------------------------------------*/
/*
* Battery charger register offsets (use TWL4030_MODULE_INTERRUPTS)
*/
#define TWL4030_INTERRUPTS_BCIISR1A 0x0
#define TWL4030_INTERRUPTS_BCIISR2A 0x1
#define TWL4030_INTERRUPTS_BCIIMR1A 0x2
#define TWL4030_INTERRUPTS_BCIIMR2A 0x3
#define TWL4030_INTERRUPTS_BCIISR1B 0x4
#define TWL4030_INTERRUPTS_BCIISR2B 0x5
#define TWL4030_INTERRUPTS_BCIIMR1B 0x6
#define TWL4030_INTERRUPTS_BCIIMR2B 0x7
#define TWL4030_INTERRUPTS_BCISIR1 0x8 /* test register */
#define TWL4030_INTERRUPTS_BCISIR2 0x9 /* test register */
#define TWL4030_INTERRUPTS_BCIEDR1 0xa
#define TWL4030_INTERRUPTS_BCIEDR2 0xb
#define TWL4030_INTERRUPTS_BCIEDR3 0xc
#define TWL4030_INTERRUPTS_BCISIHCTRL 0xd
/*----------------------------------------------------------------------*/
/*
* Power Interrupt block register offsets (use TWL4030_MODULE_INT)
*/
#define TWL4030_INT_PWR_ISR1 0x0
#define TWL4030_INT_PWR_IMR1 0x1
#define TWL4030_INT_PWR_ISR2 0x2
#define TWL4030_INT_PWR_IMR2 0x3
#define TWL4030_INT_PWR_SIR 0x4 /* test register */
#define TWL4030_INT_PWR_EDR1 0x5
#define TWL4030_INT_PWR_EDR2 0x6
#define TWL4030_INT_PWR_SIH_CTRL 0x7
/*----------------------------------------------------------------------*/
/* Power bus message definitions */
/* The TWL4030/5030 splits its power-management resources (the various
* regulators, clock and reset lines) into 3 processor groups - P1, P2 and
* P3. These groups can then be configured to transition between sleep, wait-on
* and active states by sending messages to the power bus. See Section 5.4.2
* Power Resources of TWL4030 TRM
*/
/* Processor groups */
#define DEV_GRP_NULL 0x0
#define DEV_GRP_P1 0x1 /* P1: all OMAP devices */
#define DEV_GRP_P2 0x2 /* P2: all Modem devices */
#define DEV_GRP_P3 0x4 /* P3: all peripheral devices */
/* Resource groups */
#define RES_GRP_RES 0x0 /* Reserved */
#define RES_GRP_PP 0x1 /* Power providers */
#define RES_GRP_RC 0x2 /* Reset and control */
#define RES_GRP_PP_RC 0x3
#define RES_GRP_PR 0x4 /* Power references */
#define RES_GRP_PP_PR 0x5
#define RES_GRP_RC_PR 0x6
#define RES_GRP_ALL 0x7 /* All resource groups */
#define RES_TYPE2_R0 0x0
#define RES_TYPE_ALL 0x7
#define RES_STATE_WRST 0xF
#define RES_STATE_ACTIVE 0xE
#define RES_STATE_SLEEP 0x8
#define RES_STATE_OFF 0x0
/* Power resources */
/* Power providers */
#define RES_VAUX1 1
#define RES_VAUX2 2
#define RES_VAUX3 3
#define RES_VAUX4 4
#define RES_VMMC1 5
#define RES_VMMC2 6
#define RES_VPLL1 7
#define RES_VPLL2 8
#define RES_VSIM 9
#define RES_VDAC 10
#define RES_VINTANA1 11
#define RES_VINTANA2 12
#define RES_VINTDIG 13
#define RES_VIO 14
#define RES_VDD1 15
#define RES_VDD2 16
#define RES_VUSB_1V5 17
#define RES_VUSB_1V8 18
#define RES_VUSB_3V1 19
#define RES_VUSBCP 20
#define RES_REGEN 21
/* Reset and control */
#define RES_NRES_PWRON 22
#define RES_CLKEN 23
#define RES_SYSEN 24
#define RES_HFCLKOUT 25
#define RES_32KCLKOUT 26
#define RES_RESET 27
/* Power Reference */
#define RES_Main_Ref 28
#define TOTAL_RESOURCES 28
/*
* Power Bus Message Format ... these can be sent individually by Linux,
* but are usually part of downloaded scripts that are run when various
* power events are triggered.
*
* Broadcast Message (16 Bits):
* DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4]
* RES_STATE[3:0]
*
* Singular Message (16 Bits):
* DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0]
*/
#define MSG_BROADCAST(devgrp, grp, type, type2, state) \
( (devgrp) << 13 | 1 << 12 | (grp) << 9 | (type2) << 7 \
| (type) << 4 | (state))
#define MSG_SINGULAR(devgrp, id, state) \
((devgrp) << 13 | 0 << 12 | (id) << 4 | (state))
/*----------------------------------------------------------------------*/
struct twl4030_bci_platform_data {
int *battery_tmp_tbl;
unsigned int tblsize;
};
/* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */
struct twl4030_gpio_platform_data {
int gpio_base;
unsigned irq_base, irq_end;
/* package the two LED signals as output-only GPIOs? */
bool use_leds;
/* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */
u8 mmc_cd;
/* if BIT(N) is set, or VMMC(n+1) is linked, debounce GPIO-N */
u32 debounce;
/* For gpio-N, bit (1 << N) in "pullups" is set if that pullup
* should be enabled. Else, if that bit is set in "pulldowns",
* that pulldown is enabled. Don't waste power by letting any
* digital inputs float...
*/
u32 pullups;
u32 pulldowns;
int (*setup)(struct device *dev,
unsigned gpio, unsigned ngpio);
int (*teardown)(struct device *dev,
unsigned gpio, unsigned ngpio);
};
struct twl4030_madc_platform_data {
int irq_line;
};
/* Boards have uniqe mappings of {row, col} --> keycode.
* Column and row are 8 bits each, but range only from 0..7.
* a PERSISTENT_KEY is "always on" and never reported.
*/
#define PERSISTENT_KEY(r, c) KEY((r), (c), KEY_RESERVED)
struct twl4030_keypad_data {
const struct matrix_keymap_data *keymap_data;
unsigned rows;
unsigned cols;
bool rep;
};
enum twl4030_usb_mode {
T2_USB_MODE_ULPI = 1,
T2_USB_MODE_CEA2011_3PIN = 2,
};
struct twl4030_usb_data {
enum twl4030_usb_mode usb_mode;
};
struct twl4030_ins {
u16 pmb_message;
u8 delay;
};
struct twl4030_script {
struct twl4030_ins *script;
unsigned size;
u8 flags;
#define TWL4030_WRST_SCRIPT (1<<0)
#define TWL4030_WAKEUP12_SCRIPT (1<<1)
#define TWL4030_WAKEUP3_SCRIPT (1<<2)
#define TWL4030_SLEEP_SCRIPT (1<<3)
};
struct twl4030_resconfig {
u8 resource;
u8 devgroup; /* Processor group that Power resource belongs to */
u8 type; /* Power resource addressed, 6 / broadcast message */
u8 type2; /* Power resource addressed, 3 / broadcast message */
};
struct twl4030_power_data {
struct twl4030_script **scripts;
unsigned num;
struct twl4030_resconfig *resource_config;
};
extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
struct twl4030_platform_data {
unsigned irq_base, irq_end;
struct twl4030_bci_platform_data *bci;
struct twl4030_gpio_platform_data *gpio;
struct twl4030_madc_platform_data *madc;
struct twl4030_keypad_data *keypad;
struct twl4030_usb_data *usb;
struct twl4030_power_data *power;
/* LDO regulators */
struct regulator_init_data *vdac;
struct regulator_init_data *vpll1;
struct regulator_init_data *vpll2;
struct regulator_init_data *vmmc1;
struct regulator_init_data *vmmc2;
struct regulator_init_data *vsim;
struct regulator_init_data *vaux1;
struct regulator_init_data *vaux2;
struct regulator_init_data *vaux3;
struct regulator_init_data *vaux4;
/* REVISIT more to come ... _nothing_ should be hard-wired */
};
/*----------------------------------------------------------------------*/
int twl4030_sih_setup(int module);
/* Offsets to Power Registers */
#define TWL4030_VDAC_DEV_GRP 0x3B
#define TWL4030_VDAC_DEDICATED 0x3E
#define TWL4030_VAUX1_DEV_GRP 0x17
#define TWL4030_VAUX1_DEDICATED 0x1A
#define TWL4030_VAUX2_DEV_GRP 0x1B
#define TWL4030_VAUX2_DEDICATED 0x1E
#define TWL4030_VAUX3_DEV_GRP 0x1F
#define TWL4030_VAUX3_DEDICATED 0x22
#if defined(CONFIG_TWL4030_BCI_BATTERY) || \
defined(CONFIG_TWL4030_BCI_BATTERY_MODULE)
extern int twl4030charger_usb_en(int enable);
#else
static inline int twl4030charger_usb_en(int enable) { return 0; }
#endif
/*----------------------------------------------------------------------*/
/* Linux-specific regulator identifiers ... for now, we only support
* the LDOs, and leave the three buck converters alone. VDD1 and VDD2
* need to tie into hardware based voltage scaling (cpufreq etc), while
* VIO is generally fixed.
*/
/* EXTERNAL dc-to-dc buck converters */
#define TWL4030_REG_VDD1 0
#define TWL4030_REG_VDD2 1
#define TWL4030_REG_VIO 2
/* EXTERNAL LDOs */
#define TWL4030_REG_VDAC 3
#define TWL4030_REG_VPLL1 4
#define TWL4030_REG_VPLL2 5 /* not on all chips */
#define TWL4030_REG_VMMC1 6
#define TWL4030_REG_VMMC2 7 /* not on all chips */
#define TWL4030_REG_VSIM 8 /* not on all chips */
#define TWL4030_REG_VAUX1 9 /* not on all chips */
#define TWL4030_REG_VAUX2_4030 10 /* (twl4030-specific) */
#define TWL4030_REG_VAUX2 11 /* (twl5030 and newer) */
#define TWL4030_REG_VAUX3 12 /* not on all chips */
#define TWL4030_REG_VAUX4 13 /* not on all chips */
/* INTERNAL LDOs */
#define TWL4030_REG_VINTANA1 14
#define TWL4030_REG_VINTANA2 15
#define TWL4030_REG_VINTDIG 16
#define TWL4030_REG_VUSB1V5 17
#define TWL4030_REG_VUSB1V8 18
#define TWL4030_REG_VUSB3V1 19
#endif /* End of __TWL4030_H */