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add idl4k kernel firmware version 1.13.0.105

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This commit is contained in:
Jaroslav Kysela
2015-03-26 17:22:37 +01:00
parent 5194d2792e
commit e9070cdc77
31064 changed files with 12769984 additions and 0 deletions
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108
kernel/include/linux/stm/clk.h Normal file
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/*
* STMicroelectronics clock framework
*
* Copyright (C) 2009, STMicroelectronics
* Copyright (C) 2010, STMicroelectronics
* Author: Francesco M. Virlinzi <francesco.virlinzi@st.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef __ASM_STM_CLK_H__
#define __ASM_STM_CLK_H__
#include <linux/kref.h>
#include <linux/list.h>
#include <linux/seq_file.h>
#include <linux/clk.h>
#include <linux/spinlock.h>
struct clk;
struct clk_ops {
int (*init)(struct clk *clk);
int (*enable)(struct clk *clk);
int (*disable)(struct clk *clk);
int (*set_rate)(struct clk *clk, unsigned long rate);
int (*set_parent)(struct clk *clk, struct clk *parent);
int (*recalc)(struct clk *clk);
long (*round_rate)(struct clk *clk, unsigned long rate);
int (*observe)(struct clk *clk, unsigned long *div);
unsigned long (*get_measure)(struct clk *clk);
};
struct clk {
struct list_head node;
const char *name;
int id;
struct clk *parent;
struct clk_ops *ops;
void *private_data;
struct kref kref;
unsigned long usage_counter;
unsigned long rate;
unsigned long flags;
struct list_head children;
struct list_head children_node;
};
#define CLK_ALWAYS_ENABLED (1 << 0)
/* drivers/stm/clks/clock-... */
/* SoC specific clock initialisation */
int plat_clk_init(void);
int plat_clk_alias_init(void);
/* drivers/stm/clk.c */
/* Additions to the standard clk_... functions in include/linux/clk.h */
int clk_register(struct clk *);
void clk_unregister(struct clk *);
int clk_for_each(int (*fn)(struct clk *clk, void *data), void *data);
int clk_for_each_child(struct clk *clk,
int (*fn)(struct clk *clk, void *data), void *data);
static inline void recalculate_root_clocks(void)
{}
static inline void clk_enable_init_clocks(void)
{}
/**
* clk_observe - route the clock to an external pin (if possible)
* @clk: clock source
* @div: divider
*
* To help with debugging clock related code, it is sometimes possible
* to route the clock directly to an external pin where it can be
* observed, typically with an oscilloscope.
*
* To allow high frequency clocks to be observed it is sometimes
* possible to divide the clock by a fixed amount before it is sent
* to an external pin. This factor is specified by @div, which is also
* used to return the actual divider used, which may not be the requested
* factor.
*/
int clk_observe(struct clk *clk, unsigned long *div);
/**
* clk_get_measure - evaluate the clock rate in hardware (if possible)
* @clk: clock source
*
* Measure the frequency of the specified clock and return it.
*/
unsigned long clk_get_measure(struct clk *clk);
#endif /* __ASM_STM_CLOCK_H */

108
kernel/include/linux/stm/coprocessor.h Normal file
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/*
* Copyright (C) 2003-2004 Giuseppe Cavallaro (peppe.cavallaro@st.com)
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#include <linux/ioctl.h>
#include <linux/platform_device.h>
#include <asm/addrspace.h>
#define MEGA (1024 * 1024)
typedef unsigned long kaddr_t;
/* IOCTL parameters */
typedef struct {
char name[16]; /* coprocessor name */
u_int flags; /* control flags */
/* Coprocessor region: */
kaddr_t ram_start; /* Host effective address */
u_int ram_size; /* region size (in bytes) */
kaddr_t cp_ram_start; /* coprocessor effective address */
} cop_properties_t;
#define ST_IOCTL_BASE 'l'
#define STCOP_GRANT _IOR(ST_IOCTL_BASE, 0, u_int)
#define STCOP_RESET _IOR(ST_IOCTL_BASE, 1, u_int)
#define STCOP_START STCOP_GRANT
#define STCOP_PEEK _IOR(ST_IOCTL_BASE, 2, void*)
#define STCOP_POKE _IOW(ST_IOCTL_BASE, 3, void*)
#define STCOP_GET_PROPERTIES _IOR(ST_IOCTL_BASE, 4, cop_properties_t*)
#define STCOP_SET_PROPERTIES _IOW(ST_IOCTL_BASE, 5, cop_properties_t*)
#define NO_DATA 0xdeadbeef
#define UNDEFINED_DATA NO_DATA
/* ---------------------------------------------------------------------------
* Generic macros
* ------------------------------------------------------------------------ */
#define xstring(x) string(x)
#define string(x) #x
#define plname(x) x
#define make_pname(x,y) x ## y
#define MEGA (1024 * 1024)
#define COPROCESSOR_MAJOR 63
#define FILE_2_COP(c,f) (&(c)[MINOR((f)->f_dentry->d_inode->i_rdev)])
#define OUT_PORT 2 /* Mailbox host --> cop. port */
#define IN_PORT 3 /* Mailbox cop. --> host port */
#define poke_l(v,a) *((u_int *)(a)) = (v)
#define peek_l(a) *((u_int *)(a))
#define COPR_ADDR(cop, off) ( (cop)->ram_offset + (off))
#define HOST_ADDR(cop, off) ( (cop)->vma_address + (off))
#ifdef CONFIG_COPROCESSOR_DEBUG
#define DPRINTK(args...) printk(args)
#else
#define DPRINTK(args...)
#endif
#define __debug(a, b) _debug(a, b)
/* ---------------------------------------------------------------------------
* Local types
* ------------------------------------------------------------------------ */
#define COPROC_SPACE_ALLOCATE 0x0001 /* coprocessor RAM has been defined */
#define COPROC_IN_USE 0x0002 /* copr. device has been opened */
#define COPROC_RUNNING 0x0004 /* coproc. is running (ioctl GRANT) */
typedef struct {
u_int control; /* see flags above (driver control) */
/*
* The base address of coprocessor region, both sides: host (ST40)
* and slave (ST231, LX,...) are build based on offset and start addr.
*/
u_long ram_offset; /* Coprocessor RAM offset (in bytes)*/
u_int ram_size; /* Coprocessor RAM size (in bytes) */
u_long vma_address; /* The remap phisycal memory */
#ifdef CONFIG_COPROCESSOR_DEBUG
u_int h2c_port; /* comm. port: host --> coproc. */
u_int c2h_port; /* comm. port: host <-- coproc. */
#endif
u_int irq; /* interrup used... if any */
u_long mbox_wait; /* CPU signature (waiting for boot) */
u_long mbox_entryp; /* where to put the entry point... */
u_long mbox_enable; /* ... to trigger the CPU start */
struct platform_device pdev;
struct device *dev;
} coproc_t;
struct coproc_board_info {
char *name;
int max_coprs;
};
extern int coproc_cpu_open(coproc_t *);
extern int coproc_cpu_init(coproc_t *);
extern int coproc_cpu_grant(coproc_t *, unsigned long);
extern int coproc_cpu_release(coproc_t *);
extern int coproc_cpu_reset(coproc_t *);
extern int coproc_check_area(u_long, u_long, int, coproc_t *);
extern void coproc_proc_other_info(coproc_t *, struct seq_file *);

112
kernel/include/linux/stm/device.h Normal file
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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Stuart Menefy <stuart.menefy@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_DEVICE_H
#define __LINUX_STM_DEVICE_H
#include <linux/device.h>
#include <linux/stm/sysconf.h>
#include <linux/stm/pad.h>
struct stm_device_state;
struct stm_device_sysconf {
int regtype;
int regnum;
int lsb;
int msb;
const char *name;
};
enum stm_device_power_state {
stm_device_power_off,
stm_device_power_on
};
struct stm_device_config {
int sysconfs_num;
struct stm_device_sysconf *sysconfs;
struct stm_pad_config *pad_config;
int (*init)(struct stm_device_state *state);
int (*exit)(struct stm_device_state *state);
void (*power)(struct stm_device_state *state,
enum stm_device_power_state power_state);
};
#define STM_DEVICE_SYS_CFG(_regnum, _lsb, _msb, _name) \
{ \
.regtype = SYS_CFG, \
.regnum = _regnum, \
.lsb = _lsb, \
.msb = _msb, \
.name = _name, \
}
#define STM_DEVICE_SYS_STA(_regnum, _lsb, _msb, _name) \
{ \
.regtype = SYS_STA, \
.regnum = _regnum, \
.lsb = _lsb, \
.msb = _msb, \
.name = _name, \
}
#define STM_DEVICE_SYS_CFG_BANK(_bank, _regnum, _lsb, _msb, _name) \
{ \
.regtype = SYS_CFG_BANK##_bank, \
.regnum = _regnum, \
.lsb = _lsb, \
.msb = _msb, \
.name = _name, \
}
#define STM_DEVICE_SYS_STA_BANK(_bank, _regnum, _lsb, _msb, _name) \
{ \
.regtype = SYS_STA_BANK##_bank, \
.regnum = _regnum, \
.lsb = _lsb, \
.msb = _msb, \
.name = _name, \
}
/* We have to do this indirection to allow the first argument to
* STM_DEVICE_SYSCONF to be a macro, as used by 5197 for example. */
#define ___STM_DEVICE_SYSCONF(_regtype, _regnum, _lsb, _msb, _name) \
{ \
.regtype = _regtype, \
.regnum = _regnum, \
.lsb = _lsb, \
.msb = _msb, \
.name = _name, \
}
#define STM_DEVICE_SYSCONF(_reg, _lsb, _msb, _name) \
___STM_DEVICE_SYSCONF(_reg, _lsb, _msb, _name)
struct stm_device_state *stm_device_init(struct stm_device_config *config,
struct device *dev);
void stm_device_exit(struct stm_device_state *state);
void stm_device_sysconf_write(struct stm_device_state *state,
const char* name, unsigned long long value);
unsigned long long stm_device_sysconf_read(struct stm_device_state *state,
const char* name);
struct stm_device_state *devm_stm_device_init(struct device *dev,
struct stm_device_config *config);
void devm_stm_device_exit(struct device *dev,
struct stm_device_state *state);
void stm_device_power(struct stm_device_state *state,
enum stm_device_power_state);
struct stm_pad_state* stm_device_get_pad_state(struct stm_device_state *state);
struct stm_device_config* stm_device_get_config(struct stm_device_state *state);
#endif

36
kernel/include/linux/stm/emi.h Normal file
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/*
* Copyright (C) 2007 STMicroelectronics Limited
* Author: Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#ifndef __LINUX_STM_EMI_H
#define __LINUX_STM_EMI_H
#define EMI_BANKS 5
struct emi_timing_data {
int rd_cycle_time;
int rd_oee_start;
int rd_oee_end;
int rd_latchpoint;
int busreleasetime;
int wr_cycle_time;
int wr_oee_start;
int wr_oee_end;
int wait_active_low;
};
unsigned long emi_bank_base(int bank);
void emi_bank_configure(int bank, unsigned long data[4]);
void emi_config_pcmode(int bank, int pc_mode);
void emi_config_pata(int bank, int pc_mode);
void emi_config_nand(int bank, struct emi_timing_data *timing_data);
void emi_config_pci(void);
#endif

204
kernel/include/linux/stm/fli7510.h Normal file
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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_FLI7510_H
#define __LINUX_STM_FLI7510_H
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/stm/platform.h>
/* Returns: 1 if being executed on the "HOST" ST40,
* 0 if executed on the "RT" ST40 */
#define FLI7510_ST40HOST_CORE ((ctrl_inl(CCN_PRR) & (1 << 7)) != 0)
/* Sysconfig groups & registers */
#define PRB_PU_CFG_1 0
#define PRB_PU_CFG_2 1
#define TRS_PU_CFG_0 2 /* 7510 spec */
#define TRS_SPARE_REGS_0 2 /* 75[234] spec */
#define TRS_PU_CFG_1 3 /* 7510 spec */
#define TRS_SPARE_REGS_1 3 /* 75[234] spec */
#define VDEC_PU_CFG_0 4
#define VDEC_PU_CFG_1 5
#define VOUT_PU_CFG_1 6 /* 7510 spec */
#define VOUT_SPARE_REGS 6 /* 75[234] spec */
#define CKG_DDR 7
#define PCIE_SPARE_REGS 8
#define CFG_RESET_CTL PRB_PU_CFG_1, (0x00 / 4)
#define CFG_BOOT_CTL PRB_PU_CFG_1, (0x04 / 4)
#define CFG_SYS1 PRB_PU_CFG_1, (0x08 / 4)
#define CFG_MPX_CTL PRB_PU_CFG_1, (0x0c / 4)
#define CFG_PWR_DWN_CTL PRB_PU_CFG_1, (0x10 / 4)
#define CFG_SYS2 PRB_PU_CFG_1, (0x14 / 4)
#define CFG_MODE_PIN_STATUS PRB_PU_CFG_1, (0x18 / 4)
#define CFG_PCI_ROPC_STATUS PRB_PU_CFG_1, (0x1c / 4)
#define CFG_ST40_HOST_BOOT_ADDR PRB_PU_CFG_2, (0x00 / 4)
#define CFG_ST40_CTL_BOOT_ADDR PRB_PU_CFG_2, (0x04 / 4)
#define CFG_SYS10 PRB_PU_CFG_2, (0x08 / 4)
#define CFG_RNG_BIST_CTL PRB_PU_CFG_2, (0x0c / 4)
#define CFG_SYS12 PRB_PU_CFG_2, (0x10 / 4)
#define CFG_SYS13 PRB_PU_CFG_2, (0x14 / 4)
#define CFG_SYS14 PRB_PU_CFG_2, (0x18 / 4)
#define CFG_EMI_ROPC_STATUS PRB_PU_CFG_2, (0x1c / 4)
#define CFG_COMMS_CONFIG_1 TRS_SPARE_REGS_0, (0x00 / 4)
#define CFG_TRS_CONFIG TRS_SPARE_REGS_0, (0x04 / 4)
#define CFG_COMMS_CONFIG_2 TRS_SPARE_REGS_0, (0x08 / 4)
#define CFG_USB_SOFT_JTAG TRS_SPARE_REGS_0, (0x0c / 4)
#define CFG_TRS_SPARE_REG5_NOTUSED_0 TRS_SPARE_REGS_0, (0x10 / 4)
#define CFG_TRS_CONFIG_2 TRS_SPARE_REGS_0, (0x14 / 4)
#define CFG_COMMS_TRS_STATUS TRS_SPARE_REGS_0, (0x18 / 4)
#define CFG_EXTRA_ID1_LSB TRS_SPARE_REGS_0, (0x1c / 4)
#define CFG_SPARE_1 TRS_SPARE_REGS_1, (0x00 / 4)
#define CFG_SPARE_2 TRS_SPARE_REGS_1, (0x04 / 4)
#define CFG_SPARE_3 TRS_SPARE_REGS_1, (0x08 / 4)
#define CFG_TRS_SPARE_REG4_NOTUSED TRS_SPARE_REGS_1, (0x0c / 4)
#define CFG_TRS_SPARE_REG5_NOTUSED_1 TRS_SPARE_REGS_1, (0x10 / 4)
#define CFG_TRS_SPARE_REG6_NOTUSED TRS_SPARE_REGS_1, (0x14 / 4)
#define CFG_DEVICE_ID TRS_SPARE_REGS_1, (0x18 / 4)
#define CFG_EXTRA_ID1_MSB TRS_SPARE_REGS_1, (0x1c / 4)
#define CFG_TOP_SPARE_REG1 VDEC_PU_CFG_0, (0x00 / 4)
#define CFG_TOP_SPARE_REG2 VDEC_PU_CFG_0, (0x04 / 4)
#define CFG_TOP_SPARE_REG3 VDEC_PU_CFG_0, (0x08 / 4)
#define CFG_ST231_DRA2_DEBUG VDEC_PU_CFG_0, (0x0c / 4)
#define CFG_ST231_AUD1_DEBUG VDEC_PU_CFG_0, (0x10 / 4)
#define CFG_ST231_AUD2_DEBUG VDEC_PU_CFG_0, (0x14 / 4)
#define CFG_REG7_0 VDEC_PU_CFG_0, (0x18 / 4)
#define CFG_INTERRUPT VDEC_PU_CFG_0, (0x1c / 4)
#define CFG_ST231_DRA2_PERIPH_REG1 VDEC_PU_CFG_1, (0x00 / 4)
#define CFG_ST231_DRA2_BOOT_REG2 VDEC_PU_CFG_1, (0x04 / 4)
#define CFG_ST231_AUD1_PERIPH_REG3 VDEC_PU_CFG_1, (0x08 / 4)
#define CFG_ST231_AUD1_BOOT_REG4 VDEC_PU_CFG_1, (0x0c / 4)
#define CFG_ST231_AUD2_PERIPH_REG5 VDEC_PU_CFG_1, (0x10 / 4)
#define CFG_ST231_AUD2_BOOT_REG6 VDEC_PU_CFG_1, (0x14 / 4)
#define CFG_REG7_1 VDEC_PU_CFG_1, (0x18 / 4)
#define CFG_INTERRUPT_REG8 VDEC_PU_CFG_1, (0x1c / 4)
#define CFG_REG1_VOUT_PIO_ALT_SEL VOUT_SPARE_REGS, (0x00 / 4)
#define CFG_REG2_VOUT_PIO_ALT_SEL VOUT_SPARE_REGS, (0x04 / 4)
#define CFG_VOUT_SPARE_REG3 VOUT_SPARE_REGS, (0x08 / 4)
#define CFG_REG4_DAC_CTRL VOUT_SPARE_REGS, (0x0c / 4)
#define CFG_REG5_VOUT_DEBUG_PAD_CTL VOUT_SPARE_REGS, (0x10 / 4)
#define CFG_REG6_TVOUT_DEBUG_CTL VOUT_SPARE_REGS, (0x14 / 4)
#define CFG_REG7_UNUSED VOUT_SPARE_REGS, (0x18 / 4)
#define CKG_DDR_CTL_PLL_DDR_FREQ CKG_DDR, (0x04 / 4)
#define CKG_DDR_STATUS_PLL_DDR CKG_DDR, (0x0c / 4)
#define CFG_REG1_PCIE_CORE_MIPHY_INIT PCIE_SPARE_REGS, (0x00 / 4)
#define CFG_REG2_SPARE_OUTPUT_REG PCIE_SPARE_REGS, (0x04 / 4)
#define CFG_REG3_MIPHY_INIT PCIE_SPARE_REGS, (0x08 / 4)
#define CFG_REG4_PCIE_CORE_LINK_CTRL PCIE_SPARE_REGS, (0x0c / 4)
#define CFG_REG5_PCIE_SPARE_OUTPUT_REG PCIE_SPARE_REGS, (0x10 / 4)
#define CFG_REG6_PCIE_CORE_MIPHY_PCS_CTRL PCIE_SPARE_REGS, (0x14 / 4)
#define CFG_REG7_PCIE_CORE_PCS_MIPHY_STATUS PCIE_SPARE_REGS, (0x18 / 4)
#define CFG_REG8_PCIE_SYS_ERR_INTERRUPT PCIE_SPARE_REGS, (0x1c / 4)
void fli7510_early_device_init(void);
struct fli7510_asc_config {
int hw_flow_control;
int is_console;
};
void fli7510_configure_asc(int asc, struct fli7510_asc_config *config);
struct fli7510_ssc_spi_config {
void (*chipselect)(struct spi_device *spi, int is_on);
};
/* SSC configure functions return I2C/SPI bus number */
int fli7510_configure_ssc_i2c(int ssc);
int fli7510_configure_ssc_spi(int ssc, struct fli7510_ssc_spi_config *config);
/* IR input only */
void fli7510_configure_lirc(void);
struct fli7510_pwm_config {
int out0_enabled:1;
int out1_enabled:1;
int out2_enabled:1;
int out3_enabled:1;
};
void fli7510_configure_pwm(struct fli7510_pwm_config *config);
struct fli7510_ethernet_config {
enum {
fli7510_ethernet_mode_mii,
fli7510_ethernet_mode_gmii,
fli7510_ethernet_mode_rmii,
fli7510_ethernet_mode_reverse_mii,
} mode;
int ext_clk;
int phy_bus;
int phy_addr;
struct stmmac_mdio_bus_data *mdio_bus_data;
};
void fli7510_configure_ethernet(struct fli7510_ethernet_config *config);
struct fli7510_usb_config {
enum {
fli7510_usb_ovrcur_disabled,
fli7510_usb_ovrcur_active_high,
fli7510_usb_ovrcur_active_low,
} ovrcur_mode;
};
void fli7510_configure_usb(int port, struct fli7510_usb_config *config);
void fli7510_configure_mmc(void);
struct fli7510_audio_config {
enum {
fli7510_pcm_player_0_output_disabled,
fli7510_pcm_player_0_output_2_channels,
fli7510_pcm_player_0_output_4_channels,
fli7510_pcm_player_0_output_6_channels,
fli7510_pcm_player_0_output_8_channels,
} pcm_player_0_output_mode; /* a.k.a. I2SA_OUT, a.k.a. MAIN */
int pcm_player_1_output_enabled; /* a.k.a. I2SC_OUT, a.k.a. SEC */
int spdif_player_output_enabled;
};
void fli7510_configure_audio(struct fli7510_audio_config *config);
void fli7510_configure_pci(struct stm_plat_pci_config *pci_config);
int fli7510_pcibios_map_platform_irq(struct stm_plat_pci_config *pci_config,
u8 pin);
void fli7510_configure_nand(struct stm_nand_config *config);
void fli7510_configure_spifsm(struct stm_plat_spifsm_data *data);
struct fli7540_pcie_config {
unsigned reset_gpio;
void (*reset)(void);
};
/* The 7540 has PCI express rather than PCI */
void fli7540_configure_pcie(struct fli7540_pcie_config *config);
#endif

92
kernel/include/linux/stm/gpio.h Normal file
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/*
* Copyright (C) 2008 STMicroelectronics Limited
* Author: Pawel Moll <pawel.moll@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#ifndef __LINUX_STM_GPIO_H
#define __LINUX_STM_GPIO_H
#include <linux/io.h>
#include <linux/platform_device.h>
#include <asm-generic/gpio.h>
/* Value indicating wrong GPIO number (gpio numbers are sadly unsigned...) */
#define STM_GPIO_INVALID (~0)
/* STM SoCs organise GPIO lines into ports, 8 lines (pins) in each */
#define STM_GPIO_PINS_PER_PORT 8
/* The following macros help to get a gpio-space number
* basing on the port/pin pair and vice-versa (assuming
* that passed gpio number is really an internal one...) */
#define stm_gpio(port, pin) ((port) * STM_GPIO_PINS_PER_PORT + (pin))
#define stm_gpio_port(gpio) ((gpio) / STM_GPIO_PINS_PER_PORT)
#define stm_gpio_pin(gpio) ((gpio) % STM_GPIO_PINS_PER_PORT)
/* Here are the generic GPIO access functions, optimised for internal
* PIOs and using the gpiolib calls for the rest */
#define STM_GPIO_REG_SET_POUT 0x04
#define STM_GPIO_REG_CLR_POUT 0x08
#define STM_GPIO_REG_PIN 0x10
extern int stm_gpio_num; /* Number of available internal PIOs */
extern void __iomem **stm_gpio_bases; /* PIO blocks base addresses array */
static inline int gpio_get_value(unsigned gpio)
{
if (likely(gpio < stm_gpio_num))
return (readl(stm_gpio_bases[stm_gpio_port(gpio)] +
STM_GPIO_REG_PIN)
& (1 << stm_gpio_pin(gpio))) != 0;
else
return __gpio_get_value(gpio);
}
static inline void gpio_set_value(unsigned gpio, int value)
{
if (likely(gpio < stm_gpio_num))
writel(1 << stm_gpio_pin(gpio),
stm_gpio_bases[stm_gpio_port(gpio)] +
(value ? STM_GPIO_REG_SET_POUT :
STM_GPIO_REG_CLR_POUT));
else
__gpio_set_value(gpio, value);
}
static inline int gpio_cansleep(unsigned gpio)
{
if (likely(gpio < stm_gpio_num))
return 0;
else
return __gpio_cansleep(gpio);
}
#define gpio_to_irq(gpio) __gpio_to_irq(gpio)
/* The gpiolib doesn't provides irq support so the following
* functions are valid for internal PIOs only */
int irq_to_gpio(unsigned irq);
/* STM specific API */
/* Early initialisation */
void stm_gpio_early_init(struct platform_device pdevs[], int num, int irq_base);
/* Pin direction control */
#define STM_GPIO_DIRECTION_BIDIR 0x1
#define STM_GPIO_DIRECTION_OUT 0x2
#define STM_GPIO_DIRECTION_IN 0x4
#define STM_GPIO_DIRECTION_ALT_OUT 0x6
#define STM_GPIO_DIRECTION_ALT_BIDIR 0x7
int stm_gpio_direction(unsigned int gpio, unsigned int direction);
#endif

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/*
* Copyright (C) 2007-09 STMicroelectronics Limited
* Author: Angelo Castello <angelo.castello@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
/*
* start code detect (SCD) support
*/
struct lirc_scd_s {
unsigned int code; /* code symbols to be detect. */
unsigned int alt_code; /* alternative SCD to be detected */
unsigned int nomtime; /* nominal symbol time in us */
unsigned int noiserecov; /* noise recovery configuration */
};
#define LIRC_SCD_CONFIGURE _IOW('i', 0x00000021, struct lirc_scd_s)
#define LIRC_SCD_ENABLE _IO('i', 0x00000022)
#define LIRC_SCD_DISABLE _IO('i', 0x00000023)
#define LIRC_SCD_STATUS _IOR('i', 0x00000024, unsigned long)
#define LIRC_SCD_GET_VALUE _IOR('i', 0x00000025, struct lirc_scd_s)

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kernel/include/linux/stm/miphy.h Normal file
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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_MIPHY_H
#define __LINUX_STM_MIPHY_H
enum miphy_if_type { TAP_IF, UPORT_IF, DUMMY_IF };
enum miphy_mode { UNUSED_MODE, SATA_MODE, PCIE_MODE };
struct stm_miphy;
/*
* MiPHY API for SATA and PCIe
*/
struct stm_miphy *stm_miphy_claim(int port, enum miphy_mode mode,
struct device *dev);
void stm_miphy_release(struct stm_miphy *miphy);
void stm_miphy_force_interface(int port, enum miphy_if_type interface);
int stm_miphy_start(struct stm_miphy *miphy);
int stm_miphy_sata_status(struct stm_miphy *miphy);
void stm_miphy_assert_deserializer(struct stm_miphy *miphy, int assert);
void stm_miphy_freeze(struct stm_miphy *miphy);
void stm_miphy_thaw(struct stm_miphy *miphy);
#endif

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kernel/include/linux/stm/nand.h Normal file
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/*
* Copyright (C) 2008 STMicroelectronics Limited
* Author: Angus Clark <angus.clark@st.com
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#ifndef __LINUX_STM_NAND_H
#define __LINUX_STM_NAND_H
/* Timing Paramters for NAND Controller. See ADCS #7864584: "NAND Flash support
* upgrades for FMI Functional Secification".
*/
struct stm_nand_timing_data {
/* Times specified in ns. (Will be rounded up to nearest multiple of
EMI clock period.) */
int sig_setup;
int sig_hold;
int CE_deassert;
int WE_to_RBn;
int wr_on;
int wr_off;
int rd_on;
int rd_off;
int chip_delay; /* delay in us */
};
struct stm_nand_bank_data {
int csn;
int nr_partitions;
struct mtd_partition *partitions;
unsigned int options;
struct stm_nand_timing_data *timing_data;
unsigned int emi_withinbankoffset;
};
#endif /* __LINUX_STM_NAND_H */

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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_PAD_H
#define __LINUX_STM_PAD_H
#include <linux/stm/sysconf.h>
/* The stm_pad_gpio_value structure describes PIOs that are to be claimed in
* order to achieve I/O configuration required by a driver.
*
* "function" means the so-called "alternative PIO function",
* usually described in SOCs datasheets. It just describes
* which one of possible signals is to be multiplexed to
* the actual pin. It is then used by SOC-specific "gpio_config"
* callback provided when stm_pad_init() is called (see below).
*
* Function number meaning is absolutely up to the BSP author.
* There is just a polite suggestion that 0 could mean "normal"
* PIO functionality (as in: input/output, set high/low level).
* Other numbers may be related to datasheet definitions (usually
* 1 and more).
*
* "ignored" direction means that the PIO will not be claimed at,
* so setting it can be used to "remove" a PIO from configuration
* in runtime. */
enum stm_pad_gpio_direction {
stm_pad_gpio_direction_unknown,
stm_pad_gpio_direction_in,
stm_pad_gpio_direction_out,
stm_pad_gpio_direction_bidir,
stm_pad_gpio_direction_custom,
stm_pad_gpio_direction_ignored
};
struct stm_pad_gpio {
unsigned gpio;
enum stm_pad_gpio_direction direction;
int out_value;
int function;
const char *name;
void *priv;
};
#define STM_PAD_PIO_IN(_port, _pin, _function) \
{ \
.gpio = stm_gpio(_port, _pin), \
.direction = stm_pad_gpio_direction_in, \
.function = _function, \
}
#define STM_PAD_PIO_IN_NAMED(_port, _pin, _function, _name) \
{ \
.gpio = stm_gpio(_port, _pin), \
.direction = stm_pad_gpio_direction_in, \
.function = _function, \
.name = _name, \
}
#define STM_PAD_PIO_OUT(_port, _pin, _function) \
{ \
.gpio = stm_gpio(_port, _pin), \
.direction = stm_pad_gpio_direction_out, \
.out_value = -1, \
.function = _function, \
}
#define STM_PAD_PIO_OUT_NAMED(_port, _pin, _function, _name) \
{ \
.gpio = stm_gpio(_port, _pin), \
.direction = stm_pad_gpio_direction_out, \
.out_value = -1, \
.function = _function, \
.name = _name, \
}
#define STM_PAD_PIO_BIDIR(_port, _pin, _function) \
{ \
.gpio = stm_gpio(_port, _pin), \
.direction = stm_pad_gpio_direction_bidir, \
.out_value = -1, \
.function = _function, \
}
#define STM_PAD_PIO_BIDIR_NAMED(_port, _pin, _function, _name) \
{ \
.gpio = stm_gpio(_port, _pin), \
.direction = stm_pad_gpio_direction_bidir, \
.out_value = -1, \
.function = _function, \
.name = _name, \
}
#define STM_PAD_PIO_STUB_NAMED(_port, _pin, _name) \
{ \
.gpio = stm_gpio(_port, _pin), \
.direction = stm_pad_gpio_direction_unknown, \
.name = _name, \
}
/* The bits that give us the most grief are "sysconf" values, and
* they are the most likely the SOC-specific settings that must
* be set while configuring the chip to some function, as required
* by a driver.
*
* Notice that you are not supposed to define GPIO muxing (the
* "alternative functions" mentioned above) related bits here.
* They should be configured automagically via SOC-specific
* muxing funtions (see stm_pad_init() below) */
struct stm_pad_sysconf {
int regtype;
int regnum;
int lsb;
int msb;
int value;
};
#define STM_PAD_SYS_CFG(_regnum, _lsb, _msb, _value) \
{ \
.regtype = SYS_CFG, \
.regnum = _regnum, \
.lsb = _lsb, \
.msb = _msb, \
.value = _value, \
}
#define STM_PAD_SYS_CFG_BANK(_bank, _regnum, _lsb, _msb, _value) \
{ \
.regtype = SYS_CFG_BANK##_bank, \
.regnum = _regnum, \
.lsb = _lsb, \
.msb = _msb, \
.value = _value, \
}
/* We have to do this indirection to allow the first argument to
* STM_PAD_SYSCONF to be a macro, as used by 5197 for example. */
#define ___STM_PAD_SYSCONF(_regtype, _regnum, _lsb, _msb, _value) \
{ \
.regtype = _regtype, \
.regnum = _regnum, \
.lsb = _lsb, \
.msb = _msb, \
.value = _value, \
}
#define STM_PAD_SYSCONF(_reg, _lsb, _msb, _value) \
___STM_PAD_SYSCONF(_reg, _lsb, _msb, _value)
/* Pad state structure pointer is returned by the claim functions */
struct stm_pad_state;
/* All above bits and pieces are gathered together in the below
* structure, known as "pad configuration".
*
* It contains lists of GPIOs used and sysconfig bits to be
* configured on demand of a driver.
*
* In special cases one may wish to use custom claim function,
* which is executed as the _last_ in order when claiming
* and must return 0 or other value in case of error. */
struct stm_pad_config {
int gpios_num;
struct stm_pad_gpio *gpios;
int sysconfs_num;
struct stm_pad_sysconf *sysconfs;
int (*custom_claim)(struct stm_pad_state *state, void *priv);
void (*custom_release)(struct stm_pad_state *state, void *priv);
void *custom_priv;
};
/* Pad manager initialization
*
* The gpio_config function should be provided by the SOC BSP
* and configure given GPIO to requested direction & alternative function.
*
* gpios_num is a overall number of PIO lines provided by the SOC,
* gpio_function_in and gpio_function_out are the numbers that should be passed
* to the gpio_config function in order to select generic PIO functionality, for
* input and output directions respectively.
*
* See also above (stm_pad_gpio_value definition). */
int stm_pad_init(int gpios_num, int gpio_function_in, int gpio_function_out,
int (*gpio_config)(unsigned gpio,
enum stm_pad_gpio_direction direction,
int function, void *priv));
/* Driver interface */
struct stm_pad_state *stm_pad_claim(struct stm_pad_config *config,
const char *owner);
void stm_pad_release(struct stm_pad_state *state);
struct stm_pad_state *devm_stm_pad_claim(struct device *dev,
struct stm_pad_config *config, const char *owner);
void devm_stm_pad_release(struct device *dev, struct stm_pad_state *state);
/* Functions below are private methods, for the GPIO driver use only! */
int stm_pad_claim_gpio(unsigned gpio);
void stm_pad_configure_gpio(unsigned gpio, unsigned direction);
void stm_pad_release_gpio(unsigned gpio);
const char *stm_pad_get_gpio_owner(unsigned gpio);
/* GPIO interface */
/* "name" is the GPIO name as defined in "struct stm_pad_gpio".
* Returns gpio number or STM_GPIO_INVALID in case of error */
unsigned stm_pad_gpio_request_input(struct stm_pad_state *state,
const char *name);
unsigned stm_pad_gpio_request_output(struct stm_pad_state *state,
const char *name, int value);
void stm_pad_gpio_free(struct stm_pad_state *state, unsigned gpio);
/* GPIO definition helpers
*
* If a GPIO on the list in pad configuration is defined with a name,
* it is possible to perform some operations on it in easy way... */
int stm_pad_set_gpio(struct stm_pad_config *config, const char *name,
unsigned gpio);
#define stm_pad_set_pio(config, name, port, pin) \
stm_pad_set_gpio(config, name, stm_gpio(port, pin))
int stm_pad_set_direction_function(struct stm_pad_config *config,
const char *name, enum stm_pad_gpio_direction direction,
int out_value, int function);
#define stm_pad_set_pio_in(config, name, function) \
stm_pad_set_direction_function(config, name, \
stm_pad_gpio_direction_in, -1, function)
#define stm_pad_set_pio_out(config, name, function) \
stm_pad_set_direction_function(config, name, \
stm_pad_gpio_direction_out, -1, function)
#define stm_pad_set_pio_bidir(config, name, function) \
stm_pad_set_direction_function(config, name, \
stm_pad_gpio_direction_bidir, -1, function)
#define stm_pad_set_pio_ignored(config, name) \
stm_pad_set_direction_function(config, name, \
stm_pad_gpio_direction_ignored, -1, -1)
int stm_pad_set_priv(struct stm_pad_config *config, const char *name,
void *priv);
/* Dynamic pad configuration allocation
*
* In some cases it's easier to create a pad configuration in runtime,
* rather then to prepare 2^16 different static blobs (or to alter
* 90% of pre-defined one). The API below helps in this... */
struct stm_pad_config *stm_pad_config_alloc(int gpio_values_num,
int sysconf_values_num);
int stm_pad_config_add_sysconf(struct stm_pad_config *config,
int regtype, int regnum, int lsb, int msb, int value);
#define stm_pad_config_add_sys_cfg(config, regnum, lsb, msb, value) \
stm_pad_config_add_sysconf(config, SYS_CFG, regnum, lsb, msb, value)
int stm_pad_config_add_gpio_named(struct stm_pad_config *config,
unsigned gpio, enum stm_pad_gpio_direction direction,
int out_value, int function, const char *name);
#define stm_pad_config_add_pio(config, port, pin, \
direction, out_value, function) \
stm_pad_config_add_gpio_named(config, stm_gpio(port, pin), \
direction, out_value, function, NULL)
#define stm_pad_config_add_pio_named(config, port, pin, \
direction, out_value, function, name) \
stm_pad_config_add_gpio_named(config, stm_gpio(port, pin), \
direction, out_value, function, name)
#define stm_pad_config_add_pio_in(config, port, pin, function) \
stm_pad_config_add_pio(config, port, pin, \
stm_pad_gpio_direction_in, -1, function)
#define stm_pad_config_add_pio_in_named(config, port, pin, function, name) \
stm_pad_config_add_pio_named(config, port, pin, \
stm_pad_gpio_direction_in, -1, function, name)
#define stm_pad_config_add_pio_out(config, port, pin, function) \
stm_pad_config_add_pio(config, port, pin, \
stm_pad_gpio_direction_out, -1, function)
#define stm_pad_config_add_pio_out_named(config, port, pin, \
function, name) \
stm_pad_config_add_pio_named(config, port, pin, \
stm_pad_gpio_direction_out, -1, function, name)
#define stm_pad_config_add_pio_bidir(config, port, pin, function) \
stm_pad_config_add_pio(config, port, pin, \
stm_pad_gpio_direction_bidir, -1, function)
#define stm_pad_config_add_pio_bidir_named(config, port, pin, \
function, name) \
stm_pad_config_add_pio_named(config, port, pin, \
stm_pad_gpio_direction_bidir, -1, function, name)
#endif

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kernel/include/linux/stm/pci-glue.h Normal file
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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: David Mckay <david.mckay@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Arch specific glue to join up the main stm pci driver in drivers/stm/
* to the specific PCI arch code.
*
*/
#ifndef __LINUX_STM_PCI_GLUE_H
#define __LINUX_STM_PCI_GLUE_H
#include <linux/pci.h>
/*
* This function takes the information filled in by the arch independant code
* and hooks it up to the arch specific stuff. The arch independant code lives
* in drivers/stm/pcie.c or drivers/stm/pci.c
*
* If this function needs to allocate memory it should use devm_kzalloc()
*/
enum stm_pci_type {STM_PCI_EMISS, STM_PCI_EXPRESS};
int __devinit stm_pci_register_controller(struct platform_device *pdev,
struct pci_ops *config_ops,
enum stm_pci_type type);
/*
* Given a pci bus, return the corresponding platform device that created it
* in the first place. Must be called with a bus that has as it's root
* controller an interface registered via above mechanism
*/
struct platform_device *stm_pci_bus_to_platform(struct pci_bus *bus);
/* Returns what type of bus this bus is ultimately connected to */
enum stm_pci_type stm_pci_controller_type(struct pci_bus *bus);
/* For a given pci express device, return the legacy interrupt number ie INTA.
* Must be called on a device that has it's root bus registered via the above
* function. Will return -EINVAL if called on a non-express bus which doesn't
* have the concept of a legacy interrupt
*/
int stm_pci_legacy_irq(struct pci_dev *dev);
#ifdef CONFIG_STM_PCI_EMISS
/* IO functions for the EMISS PCI controller. Unfortunately
* you have to actually run code to do an IO transaction,
* rather than just dereference it, this complicates it
* considerably
*/
u8 pci_emiss_inb(unsigned long port);
u16 pci_emiss_inw(unsigned long port);
u32 pci_emiss_inl(unsigned long port);
u8 pci_emiss_inb_p(unsigned long port);
u16 pci_emiss_inw_p(unsigned long port);
u32 pci_emiss_inl_p(unsigned long port);
void pci_emiss_insb(unsigned long port, void *dst, unsigned long count);
void pci_emiss_insw(unsigned long port, void *dst, unsigned long count);
void pci_emiss_insl(unsigned long port, void *dst, unsigned long count);
void pci_emiss_outb(u8 val, unsigned long port);
void pci_emiss_outw(u16 val, unsigned long port);
void pci_emiss_outl(u32 val, unsigned long port);
void pci_emiss_outb_p(u8 val, unsigned long port);
void pci_emiss_outw_p(u16 val, unsigned long port);
void pci_emiss_outl_p(u32 val, unsigned long port);
void pci_emiss_outsb(unsigned long port, const void *src,
unsigned long count);
void pci_emiss_outsw(unsigned long port, const void *src,
unsigned long count);
void pci_emiss_outsl(unsigned long port, const void *src,
unsigned long count);
#endif
#ifdef CONFIG_SUPERH
/*
* Defines macros to plug in the EMISS IO functions into the
* SH4 machine vector
*
* We have to hook all the in/out functions as they cannot be memory
* mapped with the emiss PCI IP
*
* Also, for PCI we use the generic iomap implementation, and so do
* not need the ioport_map function, instead using the generic cookie
* based implementation.
*
*/
#ifdef CONFIG_STM_PCI_EMISS
#define STM_PCI_IO_MACHINE_VEC \
.mv_inb = pci_emiss_inb, \
.mv_inw = pci_emiss_inw, \
.mv_inl = pci_emiss_inl, \
.mv_outb = pci_emiss_outb, \
.mv_outw = pci_emiss_outw, \
.mv_outl = pci_emiss_outl, \
.mv_inb_p = pci_emiss_inb_p, \
.mv_inw_p = pci_emiss_inw, \
.mv_inl_p = pci_emiss_inl, \
.mv_outb_p = pci_emiss_outb_p, \
.mv_outw_p = pci_emiss_outw, \
.mv_outl_p = pci_emiss_outl, \
.mv_insb = pci_emiss_insb, \
.mv_insw = pci_emiss_insw, \
.mv_insl = pci_emiss_insl, \
.mv_outsb = pci_emiss_outsb, \
.mv_outsw = pci_emiss_outsw, \
.mv_outsl = pci_emiss_outsl,
#else
#define STM_PCI_IO_MACHINE_VEC
#endif /* CONFIG_STM_PCI_EMISS */
#endif /* CONFIG_SUPERH */
#endif /* __LINUX_STM_PCI_GLUE_H */

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/*
* include/linux/stm/pio.h
*
* Copyright (c) 2004 STMicroelectronics Limited
* Author: Stuart Menefy <stuart.menefy@st.com>
*
* ST40 General Purpose IO pins support.
*
* This layer enables other device drivers to configure PIO
* pins, get and set their values, and register an interrupt
* routine for when input pins change state.
*/
#ifndef __LINUX_STM_PIO_H
#define __LINUX_STM_PIO_H
#include <linux/kernel.h>
/* Pin configuration constants */
/* Note that behaviour for modes 0, 6 and 7 differ between the ST40STB1
* datasheet (implementation restrictions appendix), and the ST40
* architectural defintions.
*/
#define STPIO_NONPIO 0 /* Non-PIO function (ST40 defn) */
#define STPIO_BIDIR_Z1 0 /* Input weak pull-up (arch defn) */
#define STPIO_BIDIR 1 /* Bidirectonal open-drain */
#define STPIO_OUT 2 /* Output push-pull */
#define STPIO_IN 4 /* Input Hi-Z */
#define STPIO_ALT_OUT 6 /* Alt output push-pull (arch defn) */
#define STPIO_ALT_BIDIR 7 /* Alt bidir open drain (arch defn) */
struct stpio_pin;
/* Request and release exclusive use of a PIO pin */
#define stpio_request_pin(portno, pinno, name, direction) \
__stpio_request_pin(portno, pinno, name, direction, 0, 0)
#define stpio_request_set_pin(portno, pinno, name, direction, value) \
__stpio_request_pin(portno, pinno, name, direction, 1, value)
struct stpio_pin *__stpio_request_pin(unsigned int portno,
unsigned int pinno, const char *name, int direction,
int __set_value, unsigned int value);
void stpio_free_pin(struct stpio_pin *pin);
/* Change the mode of an existing pin */
void stpio_configure_pin(struct stpio_pin *pin, int direction);
/* Get, set value */
void stpio_set_pin(struct stpio_pin* pin, unsigned int value);
unsigned int stpio_get_pin(struct stpio_pin* pin);
/* Interrupt on external value change */
int stpio_flagged_request_irq(struct stpio_pin *pin, int comp,
void (*handler)(struct stpio_pin *pin, void *dev),
void *dev, unsigned long irqflags);
static inline int __deprecated stpio_request_irq(struct stpio_pin *pin,
int comp,
void (*handler)(struct stpio_pin *pin, void *dev),
void *dev)
{
return stpio_flagged_request_irq(pin, comp, handler, dev, 0);
}
void stpio_free_irq(struct stpio_pin* pin);
void stpio_enable_irq(struct stpio_pin* pin, int mode);
void stpio_disable_irq(struct stpio_pin* pin);
void stpio_disable_irq_nosync(struct stpio_pin* pin);
void stpio_set_irq_type(struct stpio_pin* pin, int triggertype);
#ifdef CONFIG_PM
int stpio_set_wakeup(struct stpio_pin *pin, int enabled);
#else
#define stpio_set_wakeup(pin, enabled) do {} while(0)
#endif
#endif /* __LINUX_STM_PIO_H */

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kernel/include/linux/stm/platform.h Normal file
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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_PLATFORM_H
#define __LINUX_STM_PLATFORM_H
#include <linux/gpio.h>
#include <linux/lirc.h>
#include <linux/device.h>
#include <linux/gpio.h>
#include <linux/spi/spi.h>
#include <linux/stm/pad.h>
#include <linux/stm/nand.h>
#include <linux/stmmac.h>
#include <linux/mmc/sdhci.h>
#include <linux/sdhci-pltfm.h>
#include <linux/stm/miphy.h>
/*** Platform definition helpers ***/
#define STM_PLAT_RESOURCE_MEM(_start, _size) \
{ \
.start = (_start), \
.end = (_start) + (_size) - 1, \
.flags = IORESOURCE_MEM, \
}
#define STM_PLAT_RESOURCE_MEM_NAMED(_name, _start, _size) \
{ \
.start = (_start), \
.end = (_start) + (_size) - 1, \
.name = (_name), \
.flags = IORESOURCE_MEM, \
}
#if defined(CONFIG_CPU_SUBTYPE_ST40)
#define STM_PLAT_RESOURCE_IRQ(_st40, _st200) \
{ \
.start = (_st40), \
.end = (_st40), \
.flags = IORESOURCE_IRQ, \
}
#define STM_PLAT_RESOURCE_IRQ_NAMED(_name, _st40, _st200) \
{ \
.start = (_st40), \
.end = (_st40), \
.name = (_name), \
.flags = IORESOURCE_IRQ, \
}
#else
#error Unknown architecture
#endif
#define STM_PLAT_RESOURCE_DMA(_req_line) \
{ \
.start = (_req_line), \
.end = (_req_line), \
.flags = IORESOURCE_DMA, \
}
#define STM_PLAT_RESOURCE_DMA_NAMED(_name, _req_line) \
{ \
.start = (_req_line), \
.end = (_req_line), \
.name = (_name), \
.flags = IORESOURCE_DMA, \
}
/*** ASC platform data ***/
struct stm_plat_asc_data {
int hw_flow_control:1;
int txfifo_bug:1;
struct stm_pad_config *pad_config;
};
extern int stm_asc_console_device;
extern unsigned int stm_asc_configured_devices_num;
extern struct platform_device *stm_asc_configured_devices[];
/*** LPC platform data ***/
struct stm_plat_rtc_lpc {
unsigned int no_hw_req:1; /* iomem in sys/serv 5197 */
unsigned int need_wdt_reset:1; /* W/A on 7141 */
unsigned char irq_edge_level;
char *clk_id;
};
/*** SSC platform data ***/
struct stm_plat_ssc_data {
struct stm_pad_config *pad_config;
void (*spi_chipselect)(struct spi_device *, int);
};
/*** LiRC platform data ***/
struct stm_plat_lirc_data {
unsigned int irbclock; /* IRB block clock
* (set to 0 for auto) */
unsigned int irbclkdiv; /* IRB block clock divison
* (set to 0 for auto) */
unsigned int irbperiodmult; /* manual setting period multiplier */
unsigned int irbperioddiv; /* manual setting period divisor */
unsigned int irbontimemult; /* manual setting pulse period
* multiplier */
unsigned int irbontimediv; /* manual setting pulse period
* divisor */
unsigned int irbrxmaxperiod; /* maximum rx period in uS */
unsigned int irbversion; /* IRB version type (1,2 or 3) */
unsigned int sysclkdiv; /* factor to divide system bus
clock by */
unsigned int rxpolarity; /* flag to set gpio rx polarity
* (usually set to 1) */
unsigned int subcarrwidth; /* Subcarrier width in percent - this
* is used to make the subcarrier
* waveform square after passing
* through the 555-based threshold
* detector on ST boards */
struct stm_pad_config *pads; /* pads to be claimed */
unsigned int rxuhfmode:1; /* RX UHF mode enabled */
unsigned int txenabled:1; /* TX operation is possible */
};
/*** PWM platform data ***/
/* Private data for the PWM driver */
struct stm_plat_pwm_data {
int channel_enabled[2];
struct stm_pad_config *channel_pad_config[2];
};
/*** Temperature sensor data ***/
struct plat_stm_temp_data {
struct {
int group, num, lsb, msb;
} dcorrect, overflow, data;
struct stm_device_config *device_config;
int calibrated:1;
int calibration_value;
void (*custom_set_dcorrect)(void *priv);
unsigned long (*custom_get_data)(void *priv);
void *custom_priv;
};
/*** USB platform data ***/
#define STM_PLAT_USB_FLAGS_STRAP_8BIT (1<<0)
#define STM_PLAT_USB_FLAGS_STRAP_16BIT (2<<0)
#define STM_PLAT_USB_FLAGS_STRAP_PLL (1<<2)
#define STM_PLAT_USB_FLAGS_OPC_MSGSIZE_CHUNKSIZE (1<<3)
#define STM_PLAT_USB_FLAGS_STBUS_CONFIG_THRESHOLD128 (1<<4)
#define STM_PLAT_USB_FLAGS_STBUS_CONFIG_THRESHOLD256 (2<<4)
struct stm_plat_usb_data {
unsigned long flags;
struct stm_device_config *device_config;
};
/*** TAP platform data ***/
struct tap_sysconf_field {
u8 group, num;
u8 lsb, msb;
enum {POL_NORMAL, POL_INVERTED} pol;
};
struct stm_tap_sysconf {
struct tap_sysconf_field tms;
struct tap_sysconf_field tck;
struct tap_sysconf_field tdi;
struct tap_sysconf_field tdo;
struct tap_sysconf_field tap_en;
struct tap_sysconf_field trstn;
int tap_en_pol;
int trstn_pol;
};
struct stm_plat_tap_data {
int miphy_first, miphy_count;
enum miphy_mode *miphy_modes;
struct stm_tap_sysconf *tap_sysconf;
};
/*** PCIE-MP platform data ***/
struct stm_plat_pcie_mp_data {
int miphy_first, miphy_count;
enum miphy_mode *miphy_modes;
void (*mp_select)(int port);
};
/*** MiPHY dummy platform data ***/
struct stm_plat_miphy_dummy_data {
int miphy_first, miphy_count;
enum miphy_mode *miphy_modes;
};
/*** SATA platform data ***/
struct stm_plat_sata_data {
unsigned long phy_init;
unsigned long pc_glue_logic_init;
unsigned int only_32bit;
unsigned int oob_wa;
struct stm_device_config *device_config;
void (*host_restart)(int port);
int port_num;
int miphy_num;
};
/*** PIO platform data ***/
struct stm_plat_pio_irqmux_data {
int port_first;
int ports_num;
};
/*** Sysconf block platform data ***/
#define PLAT_SYSCONF_GROUP(_id, _offset) \
{ \
.group = _id, \
.offset = _offset, \
.name = #_id \
}
struct stm_plat_sysconf_group {
int group;
unsigned long offset;
const char *name;
const char *(*reg_name)(int num);
};
struct stm_plat_sysconf_data {
int groups_num;
struct stm_plat_sysconf_group *groups;
};
/*** NAND flash platform data ***/
struct stm_plat_nand_flex_data {
unsigned int nr_banks;
struct stm_nand_bank_data *banks;
unsigned int flex_rbn_connected:1;
};
struct stm_plat_nand_emi_data {
unsigned int nr_banks;
struct stm_nand_bank_data *banks;
int emi_rbn_gpio;
};
struct stm_nand_config {
enum {
stm_nand_emi,
stm_nand_flex,
stm_nand_afm
} driver;
int nr_banks;
struct stm_nand_bank_data *banks;
union {
int emi_gpio;
int flex_connected;
} rbn;
};
/*** STM SPI FSM Serial Flash data ***/
struct stm_plat_spifsm_data {
char *name;
struct mtd_partition *parts;
unsigned int nr_parts;
unsigned int max_freq;
};
/*** FDMA platform data ***/
struct stm_plat_fdma_slim_regs {
unsigned long id;
unsigned long ver;
unsigned long en;
unsigned long clk_gate;
};
struct stm_plat_fdma_periph_regs {
unsigned long sync_reg;
unsigned long cmd_sta;
unsigned long cmd_set;
unsigned long cmd_clr;
unsigned long cmd_mask;
unsigned long int_sta;
unsigned long int_set;
unsigned long int_clr;
unsigned long int_mask;
};
struct stm_plat_fdma_ram {
unsigned long offset;
unsigned long size;
};
struct stm_plat_fdma_hw {
struct stm_plat_fdma_slim_regs slim_regs;
struct stm_plat_fdma_ram dmem;
struct stm_plat_fdma_periph_regs periph_regs;
struct stm_plat_fdma_ram imem;
};
struct stm_plat_fdma_fw_regs {
unsigned long rev_id;
unsigned long cmd_statn;
unsigned long req_ctln;
unsigned long ptrn;
unsigned long cntn;
unsigned long saddrn;
unsigned long daddrn;
};
struct stm_plat_fdma_data {
struct stm_plat_fdma_hw *hw;
struct stm_plat_fdma_fw_regs *fw;
};
/*** PCI platform data ***/
#define PCI_PIN_ALTERNATIVE -3 /* Use alternative PIO rather than default */
#define PCI_PIN_DEFAULT -2 /* Use whatever the default is for that pin */
#define PCI_PIN_UNUSED -1 /* Pin not in use */
/* In the board setup, you can pass in the external interrupt numbers instead
* if you have wired up your board that way. It has the advantage that the PIO
* pins freed up can then be used for something else. */
struct stm_plat_pci_config {
/* PCI_PIN_DEFAULT/PCI_PIN_UNUSED. Other IRQ can be passed in */
int pci_irq[4];
/* As above for SERR */
int serr_irq;
/* Lowest address line connected to an idsel - slot 0 */
char idsel_lo;
/* Highest address line connected to an idsel - slot n */
char idsel_hi;
/* Set to PCI_PIN_DEFAULT if the corresponding req/gnt lines are
* in use */
char req_gnt[4];
/* PCI clock in Hz. If zero default to 33MHz */
unsigned long pci_clk;
/* If you supply a pci_reset() function, that will be used to reset
* the PCI bus. Otherwise it is assumed that the reset is done via
* PIO, the number is specified here. Specify -EINVAL if no PIO reset
* is required either, for example if the PCI reset is done as part
* of power on reset. */
unsigned pci_reset_gpio;
void (*pci_reset)(void);
/* You may define a PCI clock name. If NULL it will fall
* back to "pci" */
const char *clk_name;
/* Various PCI tuning parameters. Set by SOC layer. You don't have
* to specify these as the defaults are usually fine. However, if
* you need to change them, you can set ad_override_default and
* plug in your own values. */
unsigned ad_threshold:4;
unsigned ad_chunks_in_msg:5;
unsigned ad_pcks_in_chunk:5;
unsigned ad_trigger_mode:1;
unsigned ad_posted:1;
unsigned ad_max_opcode:4;
unsigned ad_read_ahead:1;
/* Set to override default values for your board */
unsigned ad_override_default:1;
/* Some SOCs have req0 pin connected to req3 signal to work around
* some problems with NAND. These bits will be set by the chip layer,
* the board layer should NOT touch this.
*/
unsigned req0_to_req3:1;
};
/* How these are done vary considerable from SOC to SOC. Sometimes
* they are wired up to sysconfig bits, other times they are simply
* memory mapped registers.
*/
struct stm_plat_pcie_ops {
void (*init)(void *handle);
void (*enable_ltssm)(void *handle);
void (*disable_ltssm)(void *handle);
};
/* PCIe platform data */
struct stm_plat_pcie_config {
/* Which PIO the PERST# signal is on.
* If it is not connected, and you rely on the autonomous reset,
* then specifiy -EINVAL here
*/
unsigned reset_gpio;
/* If you have a really wierd way of wanging PERST# (unlikely),
* then do it here. Given PCI express is defined in such a way
* that autonomous reset should work it is OK to not connect it at
* all.
*/
void (*reset)(void);
/* Magic number to shove into the amba bus bridge. The AHB driver will
* be commoned up at some point in the future so this will change
*/
unsigned long ahb_val;
/* Which miphy this pcie is using */
int miphy_num;
/* Magic handle to pass through to the ops */
void *ops_handle;
struct stm_plat_pcie_ops *ops;
};
/*** ILC platform data ***/
struct stm_plat_ilc3_data {
unsigned short inputs_num;
unsigned short outputs_num;
unsigned short first_irq;
/*
* The ILC supports the wakeup capability but on some chip when enabled
* the system is unstable during the resume from suspend, so disable
* it.
*/
int disable_wakeup:1;
};
/*** To claim Ethernet PAD resources from thr platform ***/
static inline int stmmac_claim_resource(struct platform_device *pdev)
{
int ret = 0;
struct plat_stmmacenet_data *plat_dat = pdev->dev.platform_data;
if (!(devm_stm_pad_claim(&pdev->dev,
(struct stm_pad_config *) plat_dat->custom_cfg,
dev_name(&pdev->dev)))) {
pr_err("%s: failed to request pads!\n", __func__);
ret = -ENODEV;
}
return ret;
}
/* Mali specific */
struct stm_mali_resource {
resource_size_t start;
resource_size_t end;
const char *name;
};
struct stm_mali_config {
/* Memory allocated by Linux kernel and
Memory regions managed by mali driver */
int num_mem_resources;
struct stm_mali_resource *mem;
/* Access to other regions of memory to directly render */
int num_ext_resources;
struct stm_mali_resource *ext_mem;
};
#endif /* __LINUX_STM_PLATFORM_H */

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/*
* -------------------------------------------------------------------------
* <linux_root>/include/linux/stm/pm_notify.h
* -------------------------------------------------------------------------
* STMicroelectronics
* -------------------------------------------------------------------------
* Copyright (C) 2010 STMicroelectronics
* Author: Francesco M. Virlinzi <francesco.virlinzi@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License V.2 ONLY. See linux/COPYING for more information.
*
* ------------------------------------------------------------------------- */
#ifndef __STM_LINUX_NOTIFY__
#define __STM_LINUX_NOTIFY__
enum stm_pm_type {
STM_PM_SUSPEND,
STM_PM_MEMSUSPEND,
STM_PM_HIBERNATION,
};
enum stm_pm_notify_return {
STM_PM_RET_OK,
STM_PM_RET_ERROR,
STM_PM_RET_AGAIN,
};
struct stm_pm_notify {
enum stm_pm_notify_return (*pre_enter)
(enum stm_pm_type type);
enum stm_pm_notify_return (*post_enter)
(enum stm_pm_type type, int wkirq);
};
enum stm_pm_notify_return
stm_pm_prepare_enter(enum stm_pm_type type);
enum stm_pm_notify_return
stm_pm_post_enter(enum stm_pm_type type, int wkirq);
int stm_register_pm_notify(struct stm_pm_notify *notify);
#endif

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/*
* -------------------------------------------------------------------------
* pms.h
* -------------------------------------------------------------------------
* (C) STMicroelectronics 2009
* Author: Francesco M. Virlinzi <francesco.virlinzi@st.com>
* -------------------------------------------------------------------------
* May be copied or modified under the terms of the GNU General Public
* License v.2 ONLY. See linux/COPYING for more information.
*
* -------------------------------------------------------------------------
*/
#ifndef __pms_h__
#define __pms_h__
#include <linux/compiler.h>
struct pms_state;
struct pms_object;
struct clk;
struct device;
struct pms_state *pms_create_state(char *name);
struct pms_state *pms_state_get(const char *name);
int pms_destry_state(struct pms_state *state);
int pms_set_current_states(char *buf);
static inline int pms_set_current_state(char *name){
return pms_set_current_states(name);
}
char *pms_get_current_state(void);
struct pms_object *pms_register_cpu(int cpu_id);
struct pms_object *pms_register_clock(struct clk *clk);
struct pms_object *pms_register_device(struct device *device);
struct pms_object *pms_register_clock_n(char *name);
struct pms_object *pms_register_device_n(char *name);
static inline struct pms_object __deprecated
*pms_register_clock_by_name(char *name)
{
return pms_register_clock_n(name);
}
static inline struct pms_object __deprecated
*pms_register_device_by_path(char *name)
{
return pms_register_device_n(name);
}
int pms_unregister_cpu(int cpu_id);
int pms_unregister_clock(struct clk *clk);
int pms_unregister_device(struct device *dev);
int pms_set_constraint(struct pms_state *state, struct pms_object *obj,
unsigned long value);
int pms_check_valid(struct pms_state *a, struct pms_state *b);
int pms_set_wakeup(struct pms_object *obj, int enable);
int pms_get_wakeup(struct pms_object *obj);
enum pms_standby_e {
PMS_GLOBAL_STANDBY = 0x0,
PMS_GLOBAL_MEMSTANDBY,
PMS_GLOBAL_HIBERNATION,
PMS_GLOBAL_MEMHIBERNATION
};
int pms_global_standby(enum pms_standby_e state);
/*
* PMS Api based on LPC feature
*/
int pms_set_wakeup_timers(unsigned long long second);
static inline int pms_disable_wakeup_timers(void)
{
return pms_set_wakeup_timers(0);
}
static inline int pms_change_wakeup_timers(unsigned long long second)
{
pms_set_wakeup_timers(0);
return pms_set_wakeup_timers(second);
}
#endif

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/*
* -------------------------------------------------------------------------
* Copyright (C) 2010 STMicroelectronics
* Author: Francesco M. Virlinzi <francesco.virlinzi@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License V.2 ONLY. See linux/COPYING for more information.
*
* ------------------------------------------------------------------------- */
#ifndef __STM_POKE_TABLE_H__
#define __STM_POKE_TABLE_H__
/* Opcode values */
#define OP_END_POKES 0
#define OP_POKE8 1
#define OP_POKE16 2
#define OP_POKE32 3
#define OP_OR8 4
#define OP_OR16 5
#define OP_OR32 6
#define OP_UPDATE8 7
#define OP_UPDATE16 8
#define OP_UPDATE32 9
#define OP_POKE_UPDATE32 10
#define OP_WHILE_NE8 11
#define OP_WHILE_NE16 12
#define OP_WHILE_NE32 13
#define OP_IF_EQ32 14
#define OP_IF_GT32 15
#define OP_ELSE 16
#define OP_DELAY 17
#define OP_IF_DEVID_GE 18
#define OP_IF_DEVID_LE 19
#ifdef __ASSEMBLER__
/* Poke table commands */
#define POKE8(A, VAL) .long OP_POKE8, A, VAL
#define POKE16(A, VAL) .long OP_POKE16, A, VAL
#define POKE32(A, VAL) .long OP_POKE32, A, VAL
#define OR8(A, VAL) .long OP_OR8, A, VAL
#define OR16(A, VAL) .long OP_OR16, A, VAL
#define OR32(A, VAL) .long OP_OR32, A, VAL
#define UPDATE8(A, AND, OR) .long OP_UPDATE8, A, AND, OR
#define UPDATE16(A, AND, OR) .long OP_UPDATE16, A, AND, OR
#define UPDATE32(A, AND, OR) .long OP_UPDATE32, A, AND, OR
#define POKE_UPDATE32(A1, A2, AND, SHIFT, OR) .long OP_POKE_UPDATE32,\
A1, A2, AND, SHIFT, OR
#define WHILE_NE8(A, AND, VAL) \
.long OP_WHILE_NE8, A, AND, VAL; .if (VAL > 0xFF); \
ASM_ERROR("Value VAL in WHILE_NE8 should fit in 8 bits"); .endif
#define WHILE_NE16(A, AND, VAL) .long OP_WHILE_NE16,\
A, AND, VAL; .if (VAL > 0xFFFF);\
ASM_ERROR("Value VAL in WHILE_NE16 should fit in 16 bits");\
.endif
#define WHILE_NE32(A, AND, VAL) .long OP_WHILE_NE32,\
A, AND, VAL
#define IF_EQ32(NESTLEVEL, A, AND, VAL) \
.long OP_IF_EQ32, A, AND, VAL, (NESTLEVEL ## f - .)
#define IF_GT32(NESTLEVEL, A, AND, VAL) \
.long OP_IF_GT32, A, AND, VAL, (NESTLEVEL ## f - .)
/* An explicit ELSE will skip the OP_ELSE embedded in the ENDIF
* to make things faster
*/
#define ELSE(NESTLEVEL) \
.long OP_ELSE; NESTLEVEL: ; .long (NESTLEVEL ## f - .)
/* ENDIF includes an OP_ELSE so that we end up at the correct position
* regardless of whether there is an explcit ELSE in the IF construct
*/
#define ENDIF(NESTLEVEL) \
.long OP_ELSE; NESTLEVEL: ; .long 0
#define DELAY(ITERATIONS) \
.long OP_DELAY, ITERATIONS
/* The 2nd argument to the poke loop code (in R5 for ST40, or $r0.17 for ST200)
* must be the device ID to compare against for these operations to work - the
* poke loop code does not try to retrieve the device ID itself.
*/
#define IF_DEVID_GE(NESTLEVEL, VAL) \
.long OP_IF_DEVID_GE, VAL, (NESTLEVEL ## f - .)
#define IF_DEVID_LE(NESTLEVEL, VAL) \
.long OP_IF_DEVID_LE, VAL, (NESTLEVEL ## f - .)
/* The end marker needs two extra entries which get read by the code, but are
never used.
*/
#define END_MARKER \
.long OP_END_POKES
#else
/* Poke table commands */
#define POKE8(A, VAL) OP_POKE8, A, VAL
#define POKE16(A, VAL) OP_POKE16, A, VAL
#define POKE32(A, VAL) OP_POKE32, A, VAL
#define OR8(A, VAL) OP_OR8, A, VAL
#define OR16(A, VAL) OP_OR16, A, VAL
#define OR32(A, VAL) OP_OR32, A, VAL
#define UPDATE8(A, AND, OR) OP_UPDATE8, A, AND, OR
#define UPDATE16(A, AND, OR) OP_UPDATE16, A, AND, OR
#define UPDATE32(A, AND, OR) OP_UPDATE32, A, AND, OR
#define POKE_UPDATE32(A1, A2, AND, SHIFT, OR) \
OP_POKE_UPDATE32, A1, A2, AND, SHIFT, OR
#define WHILE_NE8(A, AND, VAL) OP_WHILE_NE8, A, AND, VAL
#define WHILE_NE16(A, AND, VAL) OP_WHILE_NE16, A, AND, VAL
#define WHILE_NE32(A, AND, VAL) OP_WHILE_NE32, A, AND, VAL
#define IF_EQ32(NESTLEVEL, A, AND, VAL)
#define IF_GT32(NESTLEVEL, A, AND, VAL)
#define ELSE(NESTLEVEL)
#define ENDIF(NESTLEVEL)
#define DELAY(ITERATIONS) OP_DELAY, ITERATIONS
#define IF_DEVID_GE(NESTLEVEL, VAL)
#define IF_DEVID_LE(NESTLEVEL, VAL)
#define END_MARKER OP_END_POKES
#endif
#endif

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/*
* --------------------------------------------------------------------------
*
* ssc.h
* define and struct for STMicroelectronics SSC device
*
* --------------------------------------------------------------------------
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
* --------------------------------------------------------------------------
*/
#ifndef STM_SSC_H
#define STM_SSC_H 1
/* SSC Baud Rate generator */
#define SSC_BRG 0x0
/* SSC Transmitter Buffer */
#define SSC_TBUF 0x4
/* SSC Receive Buffer */
#define SSC_RBUF 0x8
/*SSC Control */
#define SSC_CTL 0xC
#define SSC_CTL_DATA_WIDTH_9 0x8
#define SSC_CTL_BM 0xf
#define SSC_CTL_HB 0x10
#define SSC_CTL_PH 0x20
#define SSC_CTL_PO 0x40
#define SSC_CTL_SR 0x80
#define SSC_CTL_MS 0x100
#define SSC_CTL_EN 0x200
#define SSC_CTL_LPB 0x400
#define SSC_CTL_EN_TX_FIFO 0x800
#define SSC_CTL_EN_RX_FIFO 0x1000
#define SSC_CTL_EN_CLST_RX 0x2000
/* SSC Interrupt Enable */
#define SSC_IEN 0x10
#define SSC_IEN_RIEN 0x1
#define SSC_IEN_TIEN 0x2
#define SSC_IEN_TEEN 0x4
#define SSC_IEN_REEN 0x8
#define SSC_IEN_PEEN 0x10
#define SSC_IEN_AASEN 0x40
#define SSC_IEN_STOPEN 0x80
#define SSC_IEN_ARBLEN 0x100
#define SSC_IEN_NACKEN 0x400
#define SSC_IEN_REPSTRTEN 0x800
#define SSC_IEN_TX_FIFO_HALF 0x1000
#define SSC_IEN_RX_FIFO_HALF_FULL 0x4000
/* SSC Status */
#define SSC_STA 0x14
#define SSC_STA_RIR 0x1
#define SSC_STA_TIR 0x2
#define SSC_STA_TE 0x4
#define SSC_STA_RE 0x8
#define SSC_STA_PE 0x10
#define SSC_STA_CLST 0x20
#define SSC_STA_AAS 0x40
#define SSC_STA_STOP 0x80
#define SSC_STA_ARBL 0x100
#define SSC_STA_BUSY 0x200
#define SSC_STA_NACK 0x400
#define SSC_STA_REPSTRT 0x800
#define SSC_STA_TX_FIFO_HALF 0x1000
#define SSC_STA_TX_FIFO_FULL 0x2000
#define SSC_STA_RX_FIFO_HALF 0x4000
/*SSC I2C Control */
#define SSC_I2C 0x18
#define SSC_I2C_I2CM 0x1
#define SSC_I2C_STRTG 0x2
#define SSC_I2C_STOPG 0x4
#define SSC_I2C_ACKG 0x8
#define SSC_I2C_AD10 0x10
#define SSC_I2C_TXENB 0x20
#define SSC_I2C_REPSTRTG 0x800
#define SSC_I2C_I2CFSMODE 0x1000
/* SSC Slave Address */
#define SSC_SLAD 0x1C
/* SSC I2C bus repeated start hold time */
#define SSC_REP_START_HOLD 0x20
/* SSC I2C bus start hold time */
#define SSC_START_HOLD 0x24
/* SSC I2C bus repeated start setup time */
#define SSC_REP_START_SETUP 0x28
/* SSC I2C bus repeated stop setup time */
#define SSC_DATA_SETUP 0x2C
/* SSC I2C bus stop setup time */
#define SSC_STOP_SETUP 0x30
/* SSC I2C bus free time */
#define SSC_BUS_FREE 0x34
/* SSC Tx FIFO Status */
#define SSC_TX_FSTAT 0x38
#define SSC_TX_FSTAT_STATUS 0x07
/* SSC Rx FIFO Status */
#define SSC_RX_FSTAT 0x3C
#define SSC_RX_FSTAT_STATUS 0x07
/* SSC Prescaler value value for clock */
#define SSC_PRE_SCALER_BRG 0x40
/* SSC Clear bit operation */
#define SSC_CLR 0x80
#define SSC_CLR_SSCAAS 0x40
#define SSC_CLR_SSCSTOP 0x80
#define SSC_CLR_SSCARBL 0x100
#define SSC_CLR_NACK 0x400
#define SSC_CLR_REPSTRT 0x800
/* SSC Noise suppression Width */
#define SSC_NOISE_SUPP_WIDTH 0x100
/* SSC Clock Prescaler */
#define SSC_PRSCALER 0x104
#define SSC_PRSC_VALUE 0x0f
/* SSC Noise suppression Width dataout */
#define SSC_NOISE_SUPP_WIDTH_DATAOUT 0x108
/* SSC Prescaler for delay in dataout */
#define SSC_PRSCALER_DATAOUT 0x10c
#define SSC_TXFIFO_SIZE 0x8
#define SSC_RXFIFO_SIZE 0x8
/* Use the following macros to access SSC I/O memory */
#define ssc_store32(ssc, offset, value) iowrite32(value, ssc->base+offset)
#define ssc_store16(ssc, offset, value) iowrite16(value, ssc->base+offset)
#define ssc_store8(ssc, offset, value) iowrite8(value, ssc->base+offset)
#define ssc_load32(ssc, offset) ioread32(ssc->base+offset)
#define ssc_load16(ssc, offset) ioread16(ssc->base+offset)
#define ssc_load8(ssc, offset) XSioread8(ssc->base+offset)
#endif /* STM_SSC_H */

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/*
* Copyright (C) 2005,7 STMicroelectronics Limited
* Authors: Mark Glaisher <Mark.Glaisher@st.com>
* Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#ifndef STM_DMA_H
#define STM_DMA_H
#include <asm/dma.h>
#include <asm/io.h>
#include <asm/string.h>
#include <linux/module.h>
/*DMA Modes */
#define MODE_FREERUNNING 0x01 /* FDMA, GPDMA */
#define MODE_PACED 0x02 /* FDMA */
#define MODE_SRC_SCATTER 0x04
#define MODE_DST_SCATTER 0x05
/* DMA dimensions */
#define DIM_SRC_SHIFT 0
#define DIM_DST_SHIFT 2
#define DIM_SRC(x) (((x) >> DIM_SRC_SHIFT) & 3)
#define DIM_DST(x) (((x) >> DIM_DST_SHIFT) & 3)
enum stm_dma_dimensions {
DIM_0_x_0 = (0 << DIM_SRC_SHIFT) | (0 << DIM_DST_SHIFT),
DIM_0_x_1 = (0 << DIM_SRC_SHIFT) | (1 << DIM_DST_SHIFT),
DIM_0_x_2 = (0 << DIM_SRC_SHIFT) | (2 << DIM_DST_SHIFT),
DIM_1_x_0 = (1 << DIM_SRC_SHIFT) | (0 << DIM_DST_SHIFT),
DIM_1_x_1 = (1 << DIM_SRC_SHIFT) | (1 << DIM_DST_SHIFT),
DIM_1_x_2 = (1 << DIM_SRC_SHIFT) | (2 << DIM_DST_SHIFT),
DIM_2_x_0 = (2 << DIM_SRC_SHIFT) | (0 << DIM_DST_SHIFT),
DIM_2_x_1 = (2 << DIM_SRC_SHIFT) | (1 << DIM_DST_SHIFT),
DIM_2_x_2 = (2 << DIM_SRC_SHIFT) | (2 << DIM_DST_SHIFT),
};
enum stm_dma_flags {
STM_DMA_INTER_NODE_PAUSE=0x800,
STM_DMA_NODE_COMP_INT=0x1000,
STM_DMA_CB_CONTEXT_ISR=0x2000,
STM_DMA_CB_CONTEXT_TASKLET=0x4000,
STM_DMA_CHANNEL_PAUSE_FLUSH=0x20000,
STM_DMA_CHANNEL_PAUSE_NOFLUSH=0x40000,
STM_DMA_NOBLOCK_MODE=0x80000,
STM_DMA_BLOCK_MODE=0x100000,
STM_DMA_LIST_CIRC=0x200000,
STM_DMA_LIST_OPEN=0x400000,
};
#define DMA_CHANNEL_STATUS_IDLE 0
#define DMA_CHANNEL_STATUS_RUNNING 2
#define DMA_CHANNEL_STATUS_PAUSED 3
/* Parameters to request_dma_bycap() */
#define STM_DMAC_ID "fdma_dmac"
#define STM_DMA_CAP_HIGH_BW "STM_DMA_HIGH_BANDWIDTH"
#define STM_DMA_CAP_LOW_BW "STM_DMA_LOW_BANDWIDTH"
#define STM_DMA_CAP_ETH_BUF "STM_DMA_ETH_BUFFER"
/* dma_extend() operations */
#define STM_DMA_OP_FLUSH 1
#define STM_DMA_OP_PAUSE 2
#define STM_DMA_OP_UNPAUSE 3
#define STM_DMA_OP_STOP 4
#define STM_DMA_OP_COMPILE 5
#define STM_DMA_OP_STATUS 6
#define STM_DMA_OP_REQ_CONFIG 7
#define STM_DMA_OP_REQ_FREE 8
/* Generic DMA request line configuration */
/* Read/Write */
#define REQ_CONFIG_READ 0
#define REQ_CONFIG_WRITE 1
/* Opcodes */
#define REQ_CONFIG_OPCODE_1 0x00
#define REQ_CONFIG_OPCODE_2 0x01
#define REQ_CONFIG_OPCODE_4 0x02
#define REQ_CONFIG_OPCODE_8 0x03
#define REQ_CONFIG_OPCODE_16 0x04
#define REQ_CONFIG_OPCODE_32 0x05
struct stm_dma_req_config
{
unsigned char req_line; /* Request line index number */
unsigned char rw; /* Access type: Read or Write */
unsigned char opcode; /* Size of word access */
unsigned char count; /* Number of transfers per request */
unsigned char increment; /* Whether to increment */
unsigned char hold_off; /* Holdoff value between req signal samples (in clock cycles)*/
unsigned char initiator; /* Which STBus initiatator to use */
};
struct stm_dma_req;
/* Generic STM DMA params */
struct stm_dma_params;
struct params_ops {
int (*free_params)(struct stm_dma_params* params);
};
struct stm_dma_params {
/* Transfer mode eg MODE_DST_SCATTER */
unsigned long mode;
/* a pointer to a callback function of type void foo(void*)
* which will be called on completion of the entire
* transaction or after each transfer suceeds if
* NODE_PAUSE_ISR is specifed */
void (*comp_cb)(unsigned long);
unsigned long comp_cb_parm;
/* a pointer to a callback function of type void foo(void*)
* which will be called upon failure of a transfer or
* transaction*/
void (*err_cb)(unsigned long);
unsigned long err_cb_parm;
/*Source location line stride for use in 0/1/2 x 2D modes*/
unsigned long sstride;
/*Source location line stride for use in 2D x 0/1/2 modes*/
unsigned long dstride;
/* Line length for any 2D modes */
unsigned long line_len;
/*source addr - given in phys*/
unsigned long sar;
/*dest addr - given in phys*/
unsigned long dar;
unsigned long node_bytes;
struct scatterlist * srcsg;
struct scatterlist * dstsg;
int sglen;
int err_cb_isr :1;
int comp_cb_isr :1;
int node_pause :1;
int node_interrupt :1;
int circular_llu :1;
unsigned long dim;
/* Parameters for paced transfers */
struct stm_dma_req *req;
/* Pointer to compiled parameters
* this includes the *template* llu node and
* its assoc'd memory */
void* priv;
/* Next pointer for linked list of params */
struct stm_dma_params *next;
/* Pointer to DMAC specific operators on the parameters.
* Filled in by dma_compile_list(). */
struct params_ops *params_ops;
void* params_ops_priv;
/* This is only used in the call to dma_compile_list(), so
* shouldn't really be here, but it saves us packing and unpacking
* the parameters into another struct. */
gfp_t context;
};
static inline void dma_params_init(struct stm_dma_params * p,
unsigned long mode,
unsigned long list_type)
{
memset(p,0,sizeof(struct stm_dma_params));
p->mode = mode;
p->circular_llu = (STM_DMA_LIST_CIRC ==list_type ?1:0);
};
static inline int dma_get_status(unsigned int vchan)
{
return dma_extend(vchan, STM_DMA_OP_STATUS, NULL);
}
/* Flush implies pause - I mean pause+flush */
static inline int dma_flush_channel(unsigned int vchan)
{
return dma_extend(vchan, STM_DMA_OP_FLUSH, NULL);
}
static inline int dma_pause_channel(unsigned int vchan)
{
return dma_extend(vchan, STM_DMA_OP_PAUSE, NULL);
}
static inline void dma_unpause_channel(unsigned int vchan)
{
dma_extend(vchan, STM_DMA_OP_UNPAUSE, NULL);
}
static inline int dma_stop_channel(unsigned int vchan)
{
return dma_extend(vchan, STM_DMA_OP_STOP, NULL);
}
static inline int dma_params_free(struct stm_dma_params *params)
{
return params->params_ops->free_params(params);
}
static inline int dma_compile_list(unsigned int vchan,
struct stm_dma_params *params,
gfp_t gfp_mask)
{
params->context = gfp_mask;
return dma_extend(vchan, STM_DMA_OP_COMPILE, params);
}
static inline int dma_xfer_list(unsigned int vchan, struct stm_dma_params *p)
{
/*TODO :- this is a bit 'orrible -
* should really extend arch/sh/drivers/dma/dma-api.c
* to include a 'set_dma_channel'*/
dma_configure_channel(vchan, (unsigned long)p);
return dma_xfer(vchan, 0, 0, 0, 0);
}
static inline struct stm_dma_req *dma_req_config(unsigned int vchan,
unsigned int req_line,
struct stm_dma_req_config* req_config)
{
req_config->req_line = req_line;
return (struct stm_dma_req *)
dma_extend(vchan, STM_DMA_OP_REQ_CONFIG, req_config);
}
static inline void dma_req_free(unsigned int vchan, struct stm_dma_req *req)
{
dma_extend(vchan, STM_DMA_OP_REQ_FREE, req);
}
static inline void dma_params_sg( struct stm_dma_params *p,
struct scatterlist * sg,
int nents)
{
if(MODE_SRC_SCATTER==p->mode)
p->srcsg=sg;
else if (MODE_DST_SCATTER==p->mode)
p->dstsg = sg;
else
BUG();
p->sglen = nents;
}
static inline void dma_params_link( struct stm_dma_params * parent,
struct stm_dma_params * child)
{
parent->next=child;
}
static inline void dma_params_req( struct stm_dma_params *p,
struct stm_dma_req *req)
{
p->req = req;
}
static inline void dma_params_addrs( struct stm_dma_params *p,
unsigned long src,
unsigned long dst,
unsigned long bytes)
{
p->sar = src;
p->dar = dst;
p->node_bytes = bytes;
}
static inline void dma_params_interrupts(struct stm_dma_params *p,
unsigned long isrflag)
{
if(isrflag & STM_DMA_INTER_NODE_PAUSE)
p->node_pause=1;
if(isrflag & STM_DMA_NODE_COMP_INT )
p->node_interrupt=1;
}
static inline void dma_params_comp_cb( struct stm_dma_params *p,
void (*fn)(unsigned long param),
unsigned long param,
int isr_context)
{
p->comp_cb = fn;
p->comp_cb_parm = param;
p->comp_cb_isr = (isr_context == STM_DMA_CB_CONTEXT_ISR ?1:0);
}
static inline void dma_params_err_cb( struct stm_dma_params *p,
void (*fn)(unsigned long param),
unsigned long param,
int isr_context)
{
p->err_cb = fn;
p->err_cb_parm = param;
p->err_cb_isr = (isr_context == STM_DMA_CB_CONTEXT_ISR ?1:0);
}
static inline void dma_params_dim( struct stm_dma_params *p,
unsigned long line_len,
unsigned long sstride,
unsigned long dstride,
unsigned long dim)
{
p->line_len = line_len;
p->sstride = sstride;
p->dstride = dstride;
p->dim =dim;
}
static inline void dma_params_DIM_0_x_0(struct stm_dma_params *p)
{
dma_params_dim(p, 0,0,0, DIM_0_x_0);
}
static inline void dma_params_DIM_0_x_1(struct stm_dma_params *p)
{
dma_params_dim(p, 0,0,0, DIM_0_x_1);
}
static inline void dma_params_DIM_0_x_2(struct stm_dma_params *p,
unsigned long line_len,
unsigned long dstride)
{
dma_params_dim(p, line_len, 0, dstride, DIM_0_x_2);
}
static inline void dma_params_DIM_1_x_0(struct stm_dma_params *p)
{
dma_params_dim(p, 0,0,0, DIM_1_x_0);
}
static inline void dma_params_DIM_1_x_1(struct stm_dma_params *p)
{
dma_params_dim(p, 0,0,0, DIM_1_x_1);
}
static inline void dma_params_DIM_1_x_2(struct stm_dma_params *p,
unsigned long line_len,
unsigned long dstride)
{
dma_params_dim(p, line_len, line_len, dstride, DIM_1_x_2);
}
static inline void dma_params_DIM_2_x_0(struct stm_dma_params *p,
unsigned long line_len,
unsigned long sstride)
{
dma_params_dim(p, line_len, sstride, 0, DIM_2_x_0);
}
static inline void dma_params_DIM_2_x_1(struct stm_dma_params *p,
unsigned long line_len,
unsigned long sstride)
{
dma_params_dim(p, line_len, sstride, line_len, DIM_2_x_1);
}
#endif

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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_STX5197_H
#define __LINUX_STM_STX5197_H
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/stm/platform.h>
/* Sysconfig groups & registers */
#define HS_CFG 0
#define HD_CFG 1
#define CFG_CTRL_A HS_CFG, (0x00 / 4)
#define CFG_CTRL_B HS_CFG, (0x04 / 4)
#define CFG_CTRL_C HD_CFG, (0x00 / 4)
#define CFG_CTRL_D HD_CFG, (0x04 / 4)
#define CFG_CTRL_E HD_CFG, (0x08 / 4)
#define CFG_CTRL_F HD_CFG, (0x0c / 4)
#define CFG_CTRL_G HD_CFG, (0x10 / 4)
#define CFG_CTRL_H HD_CFG, (0x14 / 4)
#define CFG_CTRL_I HD_CFG, (0x18 / 4)
#define CFG_CTRL_J HD_CFG, (0x1c / 4)
#define CFG_CTRL_K HD_CFG, (0x40 / 4)
#define CFG_CTRL_L HD_CFG, (0x44 / 4)
#define CFG_CTRL_M HD_CFG, (0x48 / 4)
#define CFG_CTRL_N HD_CFG, (0x4c / 4)
#define CFG_CTRL_O HD_CFG, (0x50 / 4)
#define CFG_CTRL_P HD_CFG, (0x54 / 4)
#define CFG_CTRL_Q HD_CFG, (0x58 / 4)
#define CFG_CTRL_R HD_CFG, (0x5c / 4)
#define CFG_MONITOR_A HS_CFG, (0x08 / 4)
#define CFG_MONITOR_B HS_CFG, (0x0c / 4)
#define CFG_MONITOR_C HD_CFG, (0x20 / 4)
#define CFG_MONITOR_D HD_CFG, (0x24 / 4)
#define CFG_MONITOR_E HD_CFG, (0x28 / 4)
#define CFG_MONITOR_F HD_CFG, (0x2c / 4)
#define CFG_MONITOR_G HD_CFG, (0x30 / 4)
#define CFG_MONITOR_H HD_CFG, (0x34 / 4)
#define CFG_MONITOR_I HD_CFG, (0x38 / 4)
#define CFG_MONITOR_J HD_CFG, (0x3c / 4)
#define CFG_MONITOR_K HD_CFG, (0x60 / 4)
#define CFG_MONITOR_L HD_CFG, (0x64 / 4)
#define CFG_MONITOR_M HD_CFG, (0x68 / 4)
#define CFG_MONITOR_N HD_CFG, (0x6c / 4)
#define CFG_MONITOR_O HD_CFG, (0x70 / 4)
#define CFG_MONITOR_P HD_CFG, (0x74 / 4)
#define CFG_MONITOR_Q HD_CFG, (0x78 / 4)
#define CFG_MONITOR_R HD_CFG, (0x7c / 4)
void stx5197_early_device_init(void);
struct stx5197_asc_config {
int hw_flow_control;
int is_console;
};
void stx5197_configure_asc(int asc, struct stx5197_asc_config *config);
struct stx5197_ssc_i2c_config {
union {
enum {
/* SCL = PIO1.6, SDA = PIO1.7 */
stx5197_ssc0_i2c_pio1,
/* SCL = SPI_CLK, SDA = SPI_DATAIN */
stx5197_ssc0_i2c_spi,
} ssc0;
enum {
/* internal bus */
stx5197_ssc1_i2c_qpsk,
/* SCL = QAM_SCLT, SDA = QAM_SDAT */
stx5197_ssc1_i2c_qam,
} ssc1;
enum {
/* SCL = PIO3.3, SDA = PIO3.2 */
stx5197_ssc2_i2c_pio3,
} ssc2;
} routing;
};
/* SSC configure functions return I2C/SPI bus number */
int stx5197_configure_ssc_i2c(int ssc, struct stx5197_ssc_i2c_config *config);
int stx5197_configure_ssc_spi(int ssc);
struct stx5197_lirc_config {
enum {
stx5197_lirc_rx_disabled,
stx5197_lirc_rx_mode_ir,
stx5197_lirc_rx_mode_uhf
} rx_mode;
int tx_enabled;
};
void stx5197_configure_lirc(struct stx5197_lirc_config *config);
struct stx5197_pwm_config {
int out0_enabled;
};
void stx5197_configure_pwm(struct stx5197_pwm_config *config);
struct stx5197_ethernet_config {
enum {
stx5197_ethernet_mode_mii,
stx5197_ethernet_mode_rmii,
} mode;
int ext_clk;
int phy_bus;
int phy_addr;
struct stmmac_mdio_bus_data *mdio_bus_data;
};
void stx5197_configure_ethernet(struct stx5197_ethernet_config *config);
void stx5197_configure_usb(void);
#endif

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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_STX5206_H
#define __LINUX_STM_STX5206_H
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/stm/platform.h>
/* Sysconfig groups */
#define SYS_DEV 0
#define SYS_STA 1
#define SYS_CFG 2
void stx5206_early_device_init(void);
struct stx5206_asc_config {
int hw_flow_control;
int is_console;
};
void stx5206_configure_asc(int asc, struct stx5206_asc_config *config);
struct stx5206_ssc_spi_config {
void (*chipselect)(struct spi_device *spi, int is_on);
};
/* SSC configure functions return I2C/SPI bus number */
int stx5206_configure_ssc_i2c(int ssc);
int stx5206_configure_ssc_spi(int ssc, struct stx5206_ssc_spi_config *config);
struct stx5206_lirc_config {
enum {
stx5206_lirc_rx_disabled,
stx5206_lirc_rx_mode_ir,
stx5206_lirc_rx_mode_uhf
} rx_mode;
int tx_enabled;
int tx_od_enabled;
};
void stx5206_configure_lirc(struct stx5206_lirc_config *config);
struct stx5206_pwm_config {
int out_enabled;
};
void stx5206_configure_pwm(struct stx5206_pwm_config *config);
struct stx5206_ethernet_config {
enum {
stx5206_ethernet_mode_mii,
stx5206_ethernet_mode_rmii,
stx5206_ethernet_mode_reverse_mii
} mode;
int ext_clk;
int phy_bus;
int phy_addr;
struct stmmac_mdio_bus_data *mdio_bus_data;
};
void stx5206_configure_ethernet(struct stx5206_ethernet_config *config);
void stx5206_configure_usb(void);
struct stx5206_pata_config {
int emi_bank;
int pc_mode;
unsigned int irq;
};
void stx5206_configure_pata(struct stx5206_pata_config *config);
void stx5206_configure_nand(struct stm_nand_config *config);
void stx5206_configure_spifsm(struct stm_plat_spifsm_data *spifsm_data);
void stx5206_configure_pci(struct stm_plat_pci_config *pci_config);
int stx5206_pcibios_map_platform_irq(struct stm_plat_pci_config *pci_config,
u8 pin);
void stx5206_configure_mmc(void);
#endif

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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_STX7100_H
#define __LINUX_STM_STX7100_H
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/stm/platform.h>
/* Sysconfig groups */
#define SYS_DEV 0
#define SYS_STA 1
#define SYS_CFG 2
void stx7100_early_device_init(void);
struct stx7100_asc_config {
int hw_flow_control;
int is_console;
};
void stx7100_configure_asc(int asc, struct stx7100_asc_config *config);
struct stx7100_ssc_spi_config {
void (*chipselect)(struct spi_device *spi, int is_on);
};
/* SSC configure functions return I2C/SPI bus number */
int stx7100_configure_ssc_i2c(int ssc);
int stx7100_configure_ssc_spi(int ssc, struct stx7100_ssc_spi_config *config);
struct stx7100_lirc_config {
enum {
stx7100_lirc_rx_disabled,
stx7100_lirc_rx_mode_ir,
stx7100_lirc_rx_mode_uhf
} rx_mode;
int tx_enabled;
int tx_od_enabled;
};
void stx7100_configure_lirc(struct stx7100_lirc_config *config);
struct stx7100_pwm_config {
int out0_enabled;
int out1_enabled;
};
void stx7100_configure_pwm(struct stx7100_pwm_config *config);
struct stx7100_ethernet_config {
enum {
stx7100_ethernet_mode_mii,
stx7100_ethernet_mode_rmii,
} mode;
int ext_clk;
int phy_bus;
int phy_addr;
struct stmmac_mdio_bus_data *mdio_bus_data;
};
void stx7100_configure_ethernet(struct stx7100_ethernet_config *config);
void stx7100_configure_usb(void);
void stx7100_configure_sata(void);
struct stx7100_pata_config {
int emi_bank;
int pc_mode;
unsigned int irq;
};
void stx7100_configure_pata(struct stx7100_pata_config *config);
#endif

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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_STX7105_H
#define __LINUX_STM_STX7105_H
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/stm/platform.h>
/* Sysconfig groups */
#define SYS_DEV 0
#define SYS_STA 1
#define SYS_CFG 2
void stx7105_early_device_init(void);
struct stx7105_asc_config {
union {
enum { stx7105_asc0_pio0 } asc0;
enum { stx7105_asc1_pio1 } asc1;
enum { stx7105_asc2_pio4, stx7105_asc2_pio12 } asc2;
enum { stx7105_asc3_pio5 } asc3;
} routing;
int hw_flow_control;
int is_console;
};
void stx7105_configure_asc(int asc, struct stx7105_asc_config *config);
/* In I2C mode SCL = SCLK, SDA = MTSR,
* in SPI mode SCK = SCLK, MOSI = MTSR, MISO = MRST */
struct stx7105_ssc_config {
union {
struct {
enum {
stx7105_ssc0_sclk_pio2_2,
} sclk;
enum {
stx7105_ssc0_mtsr_pio2_3,
} mtsr;
enum {
stx7105_ssc0_mrst_pio2_4,
} mrst;
} ssc0;
struct {
enum {
stx7105_ssc1_sclk_pio2_5,
} sclk;
enum {
stx7105_ssc1_mtsr_pio2_6,
} mtsr;
enum {
stx7105_ssc1_mrst_pio2_7,
} mrst;
} ssc1;
struct {
enum {
stx7105_ssc2_sclk_pio2_4, /* 7106 only! */
stx7105_ssc2_sclk_pio3_4,
stx7105_ssc2_sclk_pio12_0,
stx7105_ssc2_sclk_pio13_4,
} sclk;
enum {
stx7105_ssc2_mtsr_pio2_0,
stx7105_ssc2_mtsr_pio3_5,
stx7105_ssc2_mtsr_pio12_1,
stx7105_ssc2_mtsr_pio13_5,
} mtsr;
enum {
stx7105_ssc2_mrst_pio2_0,
stx7105_ssc2_mrst_pio3_5,
stx7105_ssc2_mrst_pio12_1,
stx7105_ssc2_mrst_pio13_5,
} mrst;
} ssc2;
struct {
enum {
stx7105_ssc3_sclk_pio2_7, /* 7106 only! */
stx7105_ssc3_sclk_pio3_6,
stx7105_ssc3_sclk_pio13_2,
stx7105_ssc3_sclk_pio13_6,
} sclk;
enum {
stx7105_ssc3_mtsr_pio2_1,
stx7105_ssc3_mtsr_pio3_7,
stx7105_ssc3_mtsr_pio13_3,
stx7105_ssc3_mtsr_pio13_7,
} mtsr;
enum {
stx7105_ssc3_mrst_pio2_1,
stx7105_ssc3_mrst_pio3_7,
stx7105_ssc3_mrst_pio13_3,
stx7105_ssc3_mrst_pio13_7,
} mrst;
} ssc3;
} routing;
void (*spi_chipselect)(struct spi_device *spi, int is_on);
};
/* SSC configure functions return I2C/SPI bus number */
int stx7105_configure_ssc_i2c(int ssc, struct stx7105_ssc_config *config);
int stx7105_configure_ssc_spi(int ssc, struct stx7105_ssc_config *config);
struct stx7105_lirc_config {
enum {
stx7105_lirc_rx_disabled,
stx7105_lirc_rx_mode_ir,
stx7105_lirc_rx_mode_uhf
} rx_mode;
int tx_enabled;
int tx_od_enabled;
};
void stx7105_configure_lirc(struct stx7105_lirc_config *config);
struct stx7105_pwm_config {
enum {
stx7105_pwm_out0_disabled,
stx7105_pwm_out0_pio4_4,
stx7105_pwm_out0_pio13_0
} out0;
enum {
stx7105_pwm_out1_disabled,
stx7105_pwm_out1_pio4_5,
stx7105_pwm_out1_pio13_1,
} out1;
};
void stx7105_configure_pwm(struct stx7105_pwm_config *config);
struct stx7105_ethernet_config {
enum {
stx7105_ethernet_mode_mii,
stx7105_ethernet_mode_gmii,
stx7105_ethernet_mode_rgmii,
stx7105_ethernet_mode_sgmii,
stx7105_ethernet_mode_rmii,
stx7105_ethernet_mode_reverse_mii,
} mode;
union {
struct {
enum {
stx7105_ethernet_mii1_mdio_pio3_4,
stx7105_ethernet_mii1_mdio_pio11_0
} mdio;
enum {
stx7105_ethernet_mii1_mdc_pio3_5,
stx7105_ethernet_mii1_mdc_pio11_1
} mdc;
} mii1;
} routing;
int mdint_workaround:1;
int ext_clk:1;
int phy_bus;
int phy_addr;
struct stmmac_mdio_bus_data *mdio_bus_data;
};
void stx7105_configure_ethernet(int port,
struct stx7105_ethernet_config *config);
struct stx7105_usb_config {
enum {
stx7105_usb_ovrcur_disabled,
stx7105_usb_ovrcur_active_high,
stx7105_usb_ovrcur_active_low,
} ovrcur_mode;
int pwr_enabled;
union {
struct {
enum {
stx7105_usb0_ovrcur_pio4_4,
stx7105_usb0_ovrcur_pio12_5,
stx7105_usb0_ovrcur_pio14_4, /* 7106 only! */
} ovrcur;
enum {
stx7105_usb0_pwr_pio4_5,
stx7105_usb0_pwr_pio12_6,
stx7105_usb0_pwr_pio14_5, /* 7106 only! */
} pwr;
} usb0;
struct {
enum {
stx7105_usb1_ovrcur_pio4_6,
stx7105_usb1_ovrcur_pio14_6
} ovrcur;
enum {
stx7105_usb1_pwr_pio4_7,
stx7105_usb1_pwr_pio14_7,
} pwr;
} usb1;
} routing;
};
void stx7105_configure_usb(int port, struct stx7105_usb_config *config);
void stx7105_configure_sata(int port);
struct stx7105_pata_config {
int emi_bank;
int pc_mode;
unsigned int irq;
};
void stx7105_configure_pata(struct stx7105_pata_config *config);
void stx7105_configure_nand(struct stm_nand_config *config);
void stx7106_configure_spifsm(struct stm_plat_spifsm_data *data);
struct stx7105_audio_config {
enum {
stx7105_pcm_player_0_output_disabled,
stx7105_pcm_player_0_output_2_channels,
stx7105_pcm_player_0_output_4_channels,
stx7105_pcm_player_0_output_6_channels,
} pcm_player_0_output;
int pcm_player_1_enabled;
int spdif_player_output_enabled;
int pcm_reader_input_enabled;
};
void stx7105_configure_audio(struct stx7105_audio_config *config);
void stx7105_configure_pci(struct stm_plat_pci_config *pci_config);
int stx7105_pcibios_map_platform_irq(struct stm_plat_pci_config *pci_config,
u8 pin);
void stx7105_configure_mmc(void);
#endif

208
kernel/include/linux/stm/stx7108.h Normal file
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/*
* (c) 2010-2011 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_STX7108_H
#define __LINUX_STM_STX7108_H
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/stm/platform.h>
/* Returns: 1 if being executed on the "HOST" (L2-cached) ST40,
* 0 if executed on the "RT" ST40 */
#define STX7108_HOST_CORE ((ctrl_inl(CCN_PRR) & (1 << 7)) == 0)
/* Sysconfig groups */
#define SYS_STA_BANK0 0
#define SYS_CFG_BANK0 1
#define SYS_STA_BANK1 2
#define SYS_CFG_BANK1 3
#define SYS_STA_BANK2 4
#define SYS_CFG_BANK2 5
#define SYS_STA_BANK3 6
#define SYS_CFG_BANK3 7
#define SYS_STA_BANK4 8
#define SYS_CFG_BANK4 9
struct stx7108_pio_mode_config {
int oe:1;
int pu:1;
int od:1;
};
/* Structure aligned to the "STi7108 Generic Retime Padlogic
* Application Note" SPEC */
struct stx7108_pio_retime_config {
int retime:2;
int clk1notclk0:2;
int clknotdata:2;
int double_edge:2;
int invertclk:2;
int delay_input:2;
};
struct stx7108_pio_config {
struct stx7108_pio_mode_config *mode;
struct stx7108_pio_retime_config *retime;
};
void stx7108_early_device_init(void);
struct stx7108_asc_config {
union {
struct {
enum {
stx7108_asc3_txd_pio21_0,
stx7108_asc3_txd_pio24_4,
} txd;
enum {
stx7108_asc3_rxd_pio21_1,
stx7108_asc3_rxd_pio24_5,
} rxd;
enum {
stx7108_asc3_cts_pio21_4,
stx7108_asc3_cts_pio25_0,
} cts;
enum {
stx7108_asc3_rts_pio21_3,
stx7108_asc3_rts_pio24_7,
} rts;
} asc3;
} routing;
int hw_flow_control:1;
int is_console:1;
};
void stx7108_configure_asc(int asc, struct stx7108_asc_config *config);
struct stx7108_ssc_config {
union {
struct {
enum {
stx7108_ssc2_sclk_pio1_3,
stx7108_ssc2_sclk_pio14_4
} sclk;
enum {
stx7108_ssc2_mtsr_pio1_4,
stx7108_ssc2_mtsr_pio14_5
} mtsr;
enum {
stx7108_ssc2_mrst_pio1_5,
stx7108_ssc2_mrst_pio14_6
} mrst;
} ssc2;
} routing;
void (*spi_chipselect)(struct spi_device *spi, int is_on);
};
int stx7108_configure_ssc_i2c(int ssc, struct stx7108_ssc_config *config);
int stx7108_configure_ssc_spi(int ssc, struct stx7108_ssc_config *config);
struct stx7108_lirc_config {
enum {
stx7108_lirc_rx_disabled,
stx7108_lirc_rx_mode_ir,
stx7108_lirc_rx_mode_uhf
} rx_mode;
int tx_enabled;
int tx_od_enabled;
};
void stx7108_configure_lirc(struct stx7108_lirc_config *config);
struct stx7108_pwm_config {
int out0_enabled;
int out1_enabled;
};
void stx7108_configure_pwm(struct stx7108_pwm_config *config);
struct stx7108_ethernet_config {
enum {
stx7108_ethernet_mode_mii,
stx7108_ethernet_mode_gmii,
stx7108_ethernet_mode_gmii_gtx,
stx7108_ethernet_mode_rmii,
stx7108_ethernet_mode_rgmii_gtx,
stx7108_ethernet_mode_reverse_mii
} mode;
int ext_clk;
int phy_bus;
int phy_addr;
void (*txclk_select)(int txclk_250_not_25_mhz);
struct stmmac_mdio_bus_data *mdio_bus_data;
};
void stx7108_configure_ethernet(int port,
struct stx7108_ethernet_config *config);
void stx7108_configure_usb(int port);
void stx7108_configure_mmc(int emmc);
struct stx7108_miphy_config {
int force_jtag; /* Option available for CUT2.0 */
enum miphy_mode *modes;
};
void stx7108_configure_miphy(struct stx7108_miphy_config *config);
struct stx7108_sata_config {
};
void stx7108_configure_sata(int port, struct stx7108_sata_config *config);
struct stx7108_pata_config {
int emi_bank;
int pc_mode;
unsigned int irq;
};
void stx7108_configure_pata(struct stx7108_pata_config *config);
struct stx7108_audio_config {
enum {
stx7108_pcm_player_2_output_disabled,
stx7108_pcm_player_2_output_2_channels,
stx7108_pcm_player_2_output_4_channels,
stx7108_pcm_player_2_output_6_channels,
stx7108_pcm_player_2_output_8_channels,
} pcm_player_2_output;
int spdif_player_output_enabled;
int pcm_reader_input_enabled;
};
void stx7108_configure_audio(struct stx7108_audio_config *config);
void stx7108_configure_pci(struct stm_plat_pci_config *pci_config);
int stx7108_pcibios_map_platform_irq(struct stm_plat_pci_config *pci_config,
u8 pin);
void stx7108_configure_nand(struct stm_nand_config *config);
struct stx7108_pcie_config {
unsigned reset_gpio; /* Which (if any) gpio for PCIe reset */
void (*reset)(void); /* Do something else on reset if needed */
};
void stx7108_configure_pcie(struct stx7108_pcie_config *config);
void stx7108_configure_mali(struct stm_mali_config *config);
void stx7108_configure_spifsm(struct stm_plat_spifsm_data *data);
#endif

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kernel/include/linux/stm/stx7111.h Normal file
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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_STX7111_H
#define __LINUX_STM_STX7111_H
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/stm/platform.h>
/* Sysconfig groups */
#define SYS_DEV 0
#define SYS_STA 1
#define SYS_CFG 2
void stx7111_early_device_init(void);
struct stx7111_asc_config {
int hw_flow_control;
int is_console;
};
void stx7111_configure_asc(int asc, struct stx7111_asc_config *config);
struct stx7111_ssc_spi_config {
void (*chipselect)(struct spi_device *spi, int is_on);
};
/* SSC configure functions return I2C/SPI bus number */
int stx7111_configure_ssc_i2c(int ssc);
int stx7111_configure_ssc_spi(int ssc, struct stx7111_ssc_spi_config *config);
struct stx7111_lirc_config {
enum {
stx7111_lirc_rx_disabled,
stx7111_lirc_rx_mode_ir,
stx7111_lirc_rx_mode_uhf
} rx_mode;
int tx_enabled;
int tx_od_enabled;
};
void stx7111_configure_lirc(struct stx7111_lirc_config *config);
struct stx7111_pwm_config {
int out0_enabled;
int out1_enabled;
};
void stx7111_configure_pwm(struct stx7111_pwm_config *config);
struct stx7111_ethernet_config {
enum {
stx7111_ethernet_mode_mii,
stx7111_ethernet_mode_rmii,
stx7111_ethernet_mode_reverse_mii,
} mode;
int ext_clk;
int phy_bus;
int phy_addr;
struct stmmac_mdio_bus_data *mdio_bus_data;
};
void stx7111_configure_ethernet(struct stx7111_ethernet_config *config);
struct stx7111_usb_config {
int invert_ovrcur;
};
void stx7111_configure_usb(struct stx7111_usb_config *config);
void stx7111_configure_nand(struct stm_nand_config *config);
void stx7111_configure_pci(struct stm_plat_pci_config *pci_config);
int stx7111_pcibios_map_platform_irq(struct stm_plat_pci_config *pci_config,
u8 pin);
#endif

130
kernel/include/linux/stm/stx7141.h Normal file
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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_STX7141_H
#define __LINUX_STM_STX7141_H
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/stm/platform.h>
/* Sysconfig groups */
#define SYS_DEV 0
#define SYS_STA 1
#define SYS_CFG 2
void stx7141_early_device_init(void);
struct stx7141_asc_config {
union {
enum { stx7141_asc0_mcard } asc0;
enum { stx7141_asc1_pio10, stx7141_asc1_mcard } asc1;
enum { stx7141_asc2_pio1, stx7141_asc2_pio6 } asc2;
} routing;
int hw_flow_control;
int is_console;
};
void stx7141_configure_asc(int asc, struct stx7141_asc_config *config);
/* WARNING! SSCs were numbered starting from 1 in early documents.
* Later it was changed so the first SSC is SSC0 (zero),
* and this approach is used in the functions below. */
struct stx7141_ssc_spi_config {
void (*chipselect)(struct spi_device *spi, int is_on);
};
/* SSC configure functions return I2C/SPI bus number */
int stx7141_configure_ssc_i2c(int ssc);
int stx7141_configure_ssc_spi(int ssc, struct stx7141_ssc_spi_config *config);
struct stx7141_lirc_config {
enum {
stx7141_lirc_rx_disabled,
stx7141_lirc_rx_mode_ir,
stx7141_lirc_rx_mode_uhf
} rx_mode;
int tx_enabled;
int tx_od_enabled;
};
void stx7141_configure_lirc(struct stx7141_lirc_config *config);
struct stx7141_pwm_config {
int out0_enabled;
int out1_enabled;
};
void stx7141_configure_pwm(struct stx7141_pwm_config *config);
struct stx7141_ethernet_config {
enum {
stx7141_ethernet_mode_mii,
stx7141_ethernet_mode_gmii,
stx7141_ethernet_mode_rgmii,
stx7141_ethernet_mode_sgmii,
stx7141_ethernet_mode_rmii,
stx7141_ethernet_mode_reverse_mii,
} mode;
int phy_bus;
int phy_addr;
struct stmmac_mdio_bus_data *mdio_bus_data;
};
void stx7141_configure_ethernet(int port,
struct stx7141_ethernet_config *config);
struct stx7141_usb_config {
enum stx7141_usb_overcur_mode {
stx7141_usb_ovrcur_disabled,
stx7141_usb_ovrcur_active_high,
stx7141_usb_ovrcur_active_low,
} ovrcur_mode;
int pwr_enabled;
};
void stx7141_configure_usb(int port, struct stx7141_usb_config *config);
void stx7141_configure_sata(void);
struct stx7141_pata_config {
int emi_bank;
int pc_mode;
unsigned int irq;
};
void stx7141_configure_pata(struct stx7141_pata_config *config);
void stx7141_configure_nand(struct stm_nand_config *config);
struct stx7141_audio_config {
enum {
stx7141_pcm_player_0_output_disabled,
stx7141_pcm_player_0_output_2_channels,
stx7141_pcm_player_0_output_4_channels,
stx7141_pcm_player_0_output_6_channels,
stx7141_pcm_player_0_output_8_channels,
stx7141_pcm_player_0_output_10_channels,
} pcm_player_0_output;
int pcm_player_1_output_enabled;
int spdif_player_output_enabled;
int pcm_reader_0_input_enabled;
int pcm_reader_1_input_enabled;
};
void stx7141_configure_audio(struct stx7141_audio_config *config);
#endif

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kernel/include/linux/stm/stx7200.h Normal file
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/*
* (c) 2010 STMicroelectronics Limited
*
* Author: Pawel Moll <pawel.moll@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_STM_STX7200_H
#define __LINUX_STM_STX7200_H
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/stm/platform.h>
/* Sysconfig groups */
#define SYS_DEV 0
#define SYS_STA 1
#define SYS_CFG 2
void stx7200_early_device_init(void);
struct stx7200_asc_config {
int hw_flow_control;
int is_console;
};
void stx7200_configure_asc(int asc, struct stx7200_asc_config *config);
struct stx7200_ssc_spi_config {
void (*chipselect)(struct spi_device *spi, int is_on);
};
/* SSC configure functions return I2C/SPI bus number */
int stx7200_configure_ssc_i2c(int ssc);
int stx7200_configure_ssc_spi(int ssc, struct stx7200_ssc_spi_config *config);
struct stx7200_lirc_config {
enum {
stx7200_lirc_rx_disabled,
stx7200_lirc_rx_mode_ir,
stx7200_lirc_rx_mode_uhf
} rx_mode;
int tx_enabled;
int tx_od_enabled;
};
void stx7200_configure_lirc(struct stx7200_lirc_config *config);
struct stx7200_pwm_config {
int out0_enabled;
int out1_enabled;
};
void stx7200_configure_pwm(struct stx7200_pwm_config *config);
struct stx7200_ethernet_config {
enum {
stx7200_ethernet_mode_mii,
stx7200_ethernet_mode_rmii,
} mode;
int ext_clk;
int phy_bus;
int phy_addr;
struct stmmac_mdio_bus_data *mdio_bus_data;
};
void stx7200_configure_ethernet(int port,
struct stx7200_ethernet_config *config);
void stx7200_configure_usb(int port);
void stx7200_configure_sata(void);
struct stx7200_pata_config {
int emi_bank;
int pc_mode;
unsigned int irq;
};
void stx7200_configure_pata(struct stx7200_pata_config *config);
void stx7200_configure_nand(struct stm_nand_config *config);
struct stx7200_audio_config {
enum {
stx7200_pcm_player_1_disabled,
stx7200_pcm_player_1_auddig0,
stx7200_pcm_player_1_mii1
} pcm_player_1_routing;
enum {
stx7200_pcm_player_2_disabled,
stx7200_pcm_player_2_auddig1,
stx7200_pcm_player_2_mii0
} pcm_player_2_routing;
enum {
stx7200_pcm_player_3_disabled,
stx7200_pcm_player_3_aiddig0_auddig1,
} pcm_player_3_routing;
};
void stx7200_configure_audio(struct stx7200_audio_config *config);
#endif

127
kernel/include/linux/stm/synopsys_dwc_ddr32.h Executable file
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/*
* Copyright (C) 2011 STMicroelectronics
* Author: Francesco M. Virlinzi <francesco.virlinzi@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License V.2 ONLY. See linux/COPYING for more information.
*/
#ifndef __stm_synopsys_dwc_ddr32_h__
#define __stm_synopsys_dwc_ddr32_h__
#include <linux/stm/poke_table.h>
/*
* Synopsys DWC SDram Protocol Controller
* For registers description see:
* 'DesignWare Cores DDR3/2 SDRAM Protocol - Controller -
* Databook - Version 2.10a - February 4, 2009'
*/
#define DDR_SCTL 0x4
# define DDR_SCTL_CFG 0x1
# define DDR_SCTL_GO 0x2
# define DDR_SCTL_SLEEP 0x3
# define DDR_SCTL_WAKEUP 0x4
#define DDR_STAT 0x8
# define DDR_STAT_CONFIG 0x1
# define DDR_STAT_ACCESS 0x3
# define DDR_STAT_LOW_POWER 0x5
#define DDR_DTU_CFG 0x208
# define DDR_DTU_CFG_ENABLE 0x1
#define DDR_PHY_IOCRV1 0x31C
/*
* Synopsys DWC SDram Phy Controller
* For registers description see:
* 'DesignWare Cores DDR3/2 SDRAM PHY -
* Databook - February 5, 2009'
*
* - Table 5.1: PHY Control Register Mapping
* and
* - Table 5.30: PUB Control Register Mapping
*/
#define DDR_PHY_REG(idx) (0x400 + (idx) * 4)
#define DDR_PHY_PIR DDR_PHY_REG(1) /* 0x04 */
# define DDR_PHY_PIR_PLL_RESET (1 << 7)
# define DDR_PHY_PIR_PLL_PD (1 << 8)
#define DDR_PHY_PGCR0 DDR_PHY_REG(2) /* 0x08 */
#define DDR_PHY_PGCR1 DDR_PHY_REG(3) /* 0x0c */
#define DDR_PHY_ACIOCR DDR_PHY_REG(12) /* 0x30 */
# define DDR_PHY_ACIOCR_OUTPUT_ENABLE (1 << 1)
# define DDR_PHY_ACIOCR_PDD (1 << 3)
# define DDR_PHY_ACIOCR_PDR (1 << 4)
#define DDR_PHY_DXCCR DDR_PHY_REG(13) /* 0x34 */
# define DDR_PHY_DXCCR_DXODT (1 << 0)
# define DDR_PHY_DXCCR_PDR (1 << 4)
/*
* Synopsys DDR32: in Self-Refresh
*/
#define synopsys_ddr32_in_self_refresh(_ddr_base) \
/* Enable the DDR self refresh mode */ \
/* from ACCESS to LowPower (based on paraghaph. 7.1.4) */ \
POKE32((_ddr_base) + DDR_SCTL, DDR_SCTL_SLEEP), \
WHILE_NE32((_ddr_base) + DDR_STAT, DDR_STAT_LOW_POWER, DDR_STAT_LOW_POWER)
/*
* Synopsys DDR: out of Self-Refresh
*/
#define synopsys_ddr32_out_of_self_refresh(_ddr_base) \
/* Disables the DDR self refresh mode */ \
/* from LowPower to Access (based on paraghaph 7.1.3) */ \
POKE32((_ddr_base) + DDR_SCTL, DDR_SCTL_WAKEUP), \
WHILE_NE32((_ddr_base) + DDR_STAT, DDR_STAT_ACCESS, DDR_STAT_ACCESS), \
\
POKE32((_ddr_base) + DDR_SCTL, DDR_SCTL_CFG), \
WHILE_NE32((_ddr_base) + DDR_STAT, DDR_STAT_CONFIG, DDR_STAT_CONFIG), \
\
POKE32((_ddr_base) + DDR_SCTL, DDR_SCTL_GO), \
WHILE_NE32((_ddr_base) + DDR_STAT, DDR_STAT_ACCESS, DDR_STAT_ACCESS)
/*
* Synopsys DDR Phy: moving in Standby
*/
#define synopsys_ddr32_phy_standby_enter(_ddr_base) \
OR32((_ddr_base) + DDR_PHY_DXCCR, DDR_PHY_DXCCR_DXODT), \
/* DDR_Phy Pll in reset */ \
OR32((_ddr_base) + DDR_PHY_PIR, DDR_PHY_PIR_PLL_RESET)
/*
* Synopsys DDR Phy: moving out Standby
*/
#define synopsys_ddr32_phy_standby_exit(_ddr_base) \
/* DDR_Phy Pll out of reset */ \
UPDATE32((_ddr_base) + DDR_PHY_PIR, ~DDR_PHY_PIR_PLL_RESET, 0), \
UPDATE32((_ddr_base) + DDR_PHY_DXCCR, ~DDR_PHY_DXCCR_DXODT, 0)
/*
* Synopsys DDR Phy: moving in HoM
*/
#define synopsys_ddr32_phy_hom_enter(_ddr_base) \
/* 2. Turn in LowPower the DDR-Phy */ \
OR32((_ddr_base) + DDR_PHY_PIR, DDR_PHY_PIR_PLL_RESET), \
OR32((_ddr_base) + DDR_PHY_PIR, DDR_PHY_PIR_PLL_PD), \
\
POKE32((_ddr_base) + DDR_PHY_ACIOCR, -1), \
UPDATE32((_ddr_base) + DDR_PHY_ACIOCR, ~1, 0), \
\
OR32((_ddr_base) + DDR_PHY_DXCCR, DDR_PHY_DXCCR_PDR), \
\
/* Disable CK going to the SDRAM */ \
UPDATE32((_ddr_base) + DDR_PHY_PGCR0, ~(0x3f << 26), 0), \
UPDATE32((_ddr_base) + DDR_PHY_PGCR1, ~(5 << 12), 0)
#define synopsys_ddr32_in_hom(_ddr_base) \
/* Enable DTU */ \
OR32((_ddr_base) + DDR_DTU_CFG, DDR_DTU_CFG_ENABLE), \
synopsys_ddr32_in_self_refresh(_ddr_base), \
synopsys_ddr32_phy_hom_enter(_ddr_base)
#endif

100
kernel/include/linux/stm/sysconf.h Normal file
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/*
* Copyright (C) 2007 STMicroelectronics Limited
* Author: Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#ifndef __LINUX_STM_SYSCONF_H
#define __LINUX_STM_SYSCONF_H
#include <linux/types.h>
#include <linux/platform_device.h>
struct sysconf_field;
/**
* sysconf_claim - Claim ownership of a field of a sysconfig register
* @group: register group (ie. SYS_CFG, SYS_STA); SOC-specific
* @num: register number
* @lsb: the LSB of the register we are claiming
* @msb: the MSB of the register we are claiming
* @devname: device claiming the field
*
* This function claims ownership of a field from a sysconfig register.
* The part of the sysconfig register being claimed is from bit @lsb
* through to bit @msb inclusive. To claim the whole register, @lsb
* should be 0, @msb 31 (or 63 for systems with 64 bit sysconfig registers).
*
* It returns a &struct sysconf_field which can be used in subsequent
* operations on this field.
*/
struct sysconf_field *sysconf_claim(int group, int num, int lsb, int msb,
const char *devname);
/**
* sysconf_release - Release ownership of a field of a sysconfig register
* @field: the sysconfig field to write to
*
* Release ownership of a field from a sysconf register.
* @field must have been claimed using sysconf_claim().
*/
void sysconf_release(struct sysconf_field *field);
/**
* sysconf_write - Write a value into a field of a sysconfig register
* @field: the sysconfig field to write to
* @value: the value to write into the field
*
* This writes @value into the field of the sysconfig register @field.
* @field must have been claimed using sysconf_claim().
*/
void sysconf_write(struct sysconf_field *field, unsigned long value);
/**
* sysconf_read - Read a field of a sysconfig register
* @field: the sysconfig field to read
*
* This reads a field of the sysconfig register @field.
* @field must have been claimed using sysconf_claim().
*/
unsigned long sysconf_read(struct sysconf_field *field);
/**
* sysconf_address - Return the address memory of sysconfig register
* @field: the sysconfig field to return
*
* This returns the address memory of sysconfig register
* @field must have been claimed using sysconf_claim().
*/
void *sysconf_address(struct sysconf_field *field);
/**
* sysconf_mask - Return the bitmask of sysconfig register
* @field: the sysconfig field to return
*
* This returns the bitmask of sysconfig register
* @field must have been claimed using sysconf_claim().
*/
unsigned long sysconf_mask(struct sysconf_field *field);
/**
* sysconf_early_init - Used by board initialization code
*/
void sysconf_early_init(struct platform_device *pdevs, int pdevs_num);
/**
* sysconf_group_name - Return registers group name
* @group: register group (ie. SYS_CFG, SYS_STA); SOC-specific
*/
const char *sysconf_group_name(int group);
/**
* sysconf_reg_name - Return register name
* @group: register group (ie. SYS_CFG, SYS_STA); SOC-specific
* @num: register number
*/
const char *sysconf_reg_name(int group, int num);
#endif

37
kernel/include/linux/stm/wakeup_devices.h Normal file
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/*
* Copyright (C) 2010 STMicroelectronics
* Author: Francesco M. Virlinzi <francesco.virlinzi@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License V.2 ONLY. See linux/COPYING for more information.
*/
#ifndef __LINUX_STM_WAKEUP_DEVICES__
#define __LINUX_STM_WAKEUP_DEVICES__
/*
* the stm_wakeup_devices tracks __ONLY__ the special devices which have
* a constraint to wakeup; i.e.:
*
* - irb.scd needs at least 1 MHz
*
* - hdmi_cec needs 100 MHz.
*
* - eth_phy needs 25 MHz (125 MHz in gphy)
*
* In some SOC these IPs share the same clock therefore a fine tuning
* has to be done to set the clock according
* the currently enabled wakeup devices.
*
* Currently the other IPs (i.e.: ASC, PIO) didn't raise any particular issues.
*/
struct stm_wakeup_devices {
int lirc_can_wakeup:1; /* lirc_scd_clk >= 1 MHz */
int hdmi_can_wakeup:1; /* hdmi_clk == 100 MHz */
int eth_phy_can_wakeup:1; /* eth_phy_clk ~= 25 MHz */
int eth1_phy_can_wakeup:1;
};
int stm_check_wakeup_devices(struct stm_wakeup_devices *dev_wk);
#endif