508 lines
12 KiB
C
508 lines
12 KiB
C
/*
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* (c) 2010 STMicroelectronics Limited
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*
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* Author: Pawel Moll <pawel.moll@st.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __LINUX_STM_PLATFORM_H
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#define __LINUX_STM_PLATFORM_H
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#include <linux/gpio.h>
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#include <linux/lirc.h>
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#include <linux/device.h>
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#include <linux/gpio.h>
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#include <linux/spi/spi.h>
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#include <linux/stm/pad.h>
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#include <linux/stm/nand.h>
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#include <linux/stmmac.h>
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#include <linux/mmc/sdhci.h>
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#include <linux/sdhci-pltfm.h>
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#include <linux/stm/miphy.h>
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/*** Platform definition helpers ***/
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#define STM_PLAT_RESOURCE_MEM(_start, _size) \
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{ \
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.start = (_start), \
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.end = (_start) + (_size) - 1, \
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.flags = IORESOURCE_MEM, \
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}
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#define STM_PLAT_RESOURCE_MEM_NAMED(_name, _start, _size) \
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{ \
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.start = (_start), \
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.end = (_start) + (_size) - 1, \
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.name = (_name), \
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.flags = IORESOURCE_MEM, \
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}
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#if defined(CONFIG_CPU_SUBTYPE_ST40)
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#define STM_PLAT_RESOURCE_IRQ(_st40, _st200) \
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{ \
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.start = (_st40), \
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.end = (_st40), \
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.flags = IORESOURCE_IRQ, \
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}
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#define STM_PLAT_RESOURCE_IRQ_NAMED(_name, _st40, _st200) \
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{ \
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.start = (_st40), \
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.end = (_st40), \
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.name = (_name), \
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.flags = IORESOURCE_IRQ, \
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}
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#else
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#error Unknown architecture
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#endif
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#define STM_PLAT_RESOURCE_DMA(_req_line) \
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{ \
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.start = (_req_line), \
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.end = (_req_line), \
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.flags = IORESOURCE_DMA, \
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}
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#define STM_PLAT_RESOURCE_DMA_NAMED(_name, _req_line) \
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{ \
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.start = (_req_line), \
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.end = (_req_line), \
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.name = (_name), \
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.flags = IORESOURCE_DMA, \
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}
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/*** ASC platform data ***/
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struct stm_plat_asc_data {
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int hw_flow_control:1;
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int txfifo_bug:1;
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struct stm_pad_config *pad_config;
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};
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extern int stm_asc_console_device;
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extern unsigned int stm_asc_configured_devices_num;
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extern struct platform_device *stm_asc_configured_devices[];
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/*** LPC platform data ***/
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struct stm_plat_rtc_lpc {
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unsigned int no_hw_req:1; /* iomem in sys/serv 5197 */
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unsigned int need_wdt_reset:1; /* W/A on 7141 */
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unsigned char irq_edge_level;
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char *clk_id;
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};
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/*** SSC platform data ***/
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struct stm_plat_ssc_data {
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struct stm_pad_config *pad_config;
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void (*spi_chipselect)(struct spi_device *, int);
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};
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/*** LiRC platform data ***/
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struct stm_plat_lirc_data {
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unsigned int irbclock; /* IRB block clock
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* (set to 0 for auto) */
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unsigned int irbclkdiv; /* IRB block clock divison
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* (set to 0 for auto) */
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unsigned int irbperiodmult; /* manual setting period multiplier */
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unsigned int irbperioddiv; /* manual setting period divisor */
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unsigned int irbontimemult; /* manual setting pulse period
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* multiplier */
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unsigned int irbontimediv; /* manual setting pulse period
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* divisor */
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unsigned int irbrxmaxperiod; /* maximum rx period in uS */
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unsigned int irbversion; /* IRB version type (1,2 or 3) */
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unsigned int sysclkdiv; /* factor to divide system bus
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clock by */
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unsigned int rxpolarity; /* flag to set gpio rx polarity
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* (usually set to 1) */
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unsigned int subcarrwidth; /* Subcarrier width in percent - this
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* is used to make the subcarrier
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* waveform square after passing
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* through the 555-based threshold
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* detector on ST boards */
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struct stm_pad_config *pads; /* pads to be claimed */
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unsigned int rxuhfmode:1; /* RX UHF mode enabled */
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unsigned int txenabled:1; /* TX operation is possible */
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};
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/*** PWM platform data ***/
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/* Private data for the PWM driver */
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struct stm_plat_pwm_data {
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int channel_enabled[2];
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struct stm_pad_config *channel_pad_config[2];
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};
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/*** Temperature sensor data ***/
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struct plat_stm_temp_data {
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struct {
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int group, num, lsb, msb;
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} dcorrect, overflow, data;
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struct stm_device_config *device_config;
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int calibrated:1;
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int calibration_value;
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void (*custom_set_dcorrect)(void *priv);
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unsigned long (*custom_get_data)(void *priv);
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void *custom_priv;
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};
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/*** USB platform data ***/
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#define STM_PLAT_USB_FLAGS_STRAP_8BIT (1<<0)
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#define STM_PLAT_USB_FLAGS_STRAP_16BIT (2<<0)
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#define STM_PLAT_USB_FLAGS_STRAP_PLL (1<<2)
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#define STM_PLAT_USB_FLAGS_OPC_MSGSIZE_CHUNKSIZE (1<<3)
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#define STM_PLAT_USB_FLAGS_STBUS_CONFIG_THRESHOLD128 (1<<4)
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#define STM_PLAT_USB_FLAGS_STBUS_CONFIG_THRESHOLD256 (2<<4)
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struct stm_plat_usb_data {
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unsigned long flags;
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struct stm_device_config *device_config;
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};
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/*** TAP platform data ***/
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struct tap_sysconf_field {
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u8 group, num;
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u8 lsb, msb;
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enum {POL_NORMAL, POL_INVERTED} pol;
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};
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struct stm_tap_sysconf {
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struct tap_sysconf_field tms;
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struct tap_sysconf_field tck;
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struct tap_sysconf_field tdi;
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struct tap_sysconf_field tdo;
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struct tap_sysconf_field tap_en;
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struct tap_sysconf_field trstn;
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int tap_en_pol;
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int trstn_pol;
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};
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struct stm_plat_tap_data {
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int miphy_first, miphy_count;
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enum miphy_mode *miphy_modes;
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struct stm_tap_sysconf *tap_sysconf;
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};
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/*** PCIE-MP platform data ***/
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struct stm_plat_pcie_mp_data {
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int miphy_first, miphy_count;
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enum miphy_mode *miphy_modes;
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void (*mp_select)(int port);
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};
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/*** MiPHY dummy platform data ***/
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struct stm_plat_miphy_dummy_data {
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int miphy_first, miphy_count;
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enum miphy_mode *miphy_modes;
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};
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/*** SATA platform data ***/
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struct stm_plat_sata_data {
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unsigned long phy_init;
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unsigned long pc_glue_logic_init;
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unsigned int only_32bit;
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unsigned int oob_wa;
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struct stm_device_config *device_config;
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void (*host_restart)(int port);
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int port_num;
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int miphy_num;
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};
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/*** PIO platform data ***/
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struct stm_plat_pio_irqmux_data {
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int port_first;
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int ports_num;
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};
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/*** Sysconf block platform data ***/
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#define PLAT_SYSCONF_GROUP(_id, _offset) \
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{ \
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.group = _id, \
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.offset = _offset, \
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.name = #_id \
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}
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struct stm_plat_sysconf_group {
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int group;
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unsigned long offset;
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const char *name;
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const char *(*reg_name)(int num);
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};
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struct stm_plat_sysconf_data {
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int groups_num;
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struct stm_plat_sysconf_group *groups;
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};
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/*** NAND flash platform data ***/
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struct stm_plat_nand_flex_data {
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unsigned int nr_banks;
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struct stm_nand_bank_data *banks;
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unsigned int flex_rbn_connected:1;
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};
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struct stm_plat_nand_emi_data {
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unsigned int nr_banks;
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struct stm_nand_bank_data *banks;
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int emi_rbn_gpio;
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};
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struct stm_nand_config {
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enum {
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stm_nand_emi,
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stm_nand_flex,
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stm_nand_afm
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} driver;
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int nr_banks;
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struct stm_nand_bank_data *banks;
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union {
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int emi_gpio;
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int flex_connected;
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} rbn;
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};
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/*** STM SPI FSM Serial Flash data ***/
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struct stm_plat_spifsm_data {
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char *name;
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struct mtd_partition *parts;
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unsigned int nr_parts;
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unsigned int max_freq;
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};
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/*** FDMA platform data ***/
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struct stm_plat_fdma_slim_regs {
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unsigned long id;
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unsigned long ver;
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unsigned long en;
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unsigned long clk_gate;
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};
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struct stm_plat_fdma_periph_regs {
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unsigned long sync_reg;
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unsigned long cmd_sta;
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unsigned long cmd_set;
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unsigned long cmd_clr;
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unsigned long cmd_mask;
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unsigned long int_sta;
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unsigned long int_set;
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unsigned long int_clr;
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unsigned long int_mask;
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};
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struct stm_plat_fdma_ram {
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unsigned long offset;
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unsigned long size;
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};
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struct stm_plat_fdma_hw {
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struct stm_plat_fdma_slim_regs slim_regs;
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struct stm_plat_fdma_ram dmem;
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struct stm_plat_fdma_periph_regs periph_regs;
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struct stm_plat_fdma_ram imem;
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};
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struct stm_plat_fdma_fw_regs {
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unsigned long rev_id;
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unsigned long cmd_statn;
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unsigned long req_ctln;
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unsigned long ptrn;
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unsigned long cntn;
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unsigned long saddrn;
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unsigned long daddrn;
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};
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struct stm_plat_fdma_data {
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struct stm_plat_fdma_hw *hw;
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struct stm_plat_fdma_fw_regs *fw;
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};
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/*** PCI platform data ***/
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#define PCI_PIN_ALTERNATIVE -3 /* Use alternative PIO rather than default */
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#define PCI_PIN_DEFAULT -2 /* Use whatever the default is for that pin */
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#define PCI_PIN_UNUSED -1 /* Pin not in use */
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/* In the board setup, you can pass in the external interrupt numbers instead
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* if you have wired up your board that way. It has the advantage that the PIO
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* pins freed up can then be used for something else. */
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struct stm_plat_pci_config {
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/* PCI_PIN_DEFAULT/PCI_PIN_UNUSED. Other IRQ can be passed in */
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int pci_irq[4];
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/* As above for SERR */
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int serr_irq;
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/* Lowest address line connected to an idsel - slot 0 */
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char idsel_lo;
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/* Highest address line connected to an idsel - slot n */
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char idsel_hi;
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/* Set to PCI_PIN_DEFAULT if the corresponding req/gnt lines are
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* in use */
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char req_gnt[4];
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/* PCI clock in Hz. If zero default to 33MHz */
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unsigned long pci_clk;
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/* If you supply a pci_reset() function, that will be used to reset
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* the PCI bus. Otherwise it is assumed that the reset is done via
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* PIO, the number is specified here. Specify -EINVAL if no PIO reset
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* is required either, for example if the PCI reset is done as part
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* of power on reset. */
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unsigned pci_reset_gpio;
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void (*pci_reset)(void);
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/* You may define a PCI clock name. If NULL it will fall
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* back to "pci" */
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const char *clk_name;
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/* Various PCI tuning parameters. Set by SOC layer. You don't have
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* to specify these as the defaults are usually fine. However, if
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* you need to change them, you can set ad_override_default and
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* plug in your own values. */
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unsigned ad_threshold:4;
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unsigned ad_chunks_in_msg:5;
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unsigned ad_pcks_in_chunk:5;
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unsigned ad_trigger_mode:1;
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unsigned ad_posted:1;
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unsigned ad_max_opcode:4;
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unsigned ad_read_ahead:1;
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/* Set to override default values for your board */
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unsigned ad_override_default:1;
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/* Some SOCs have req0 pin connected to req3 signal to work around
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* some problems with NAND. These bits will be set by the chip layer,
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* the board layer should NOT touch this.
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*/
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unsigned req0_to_req3:1;
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};
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/* How these are done vary considerable from SOC to SOC. Sometimes
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* they are wired up to sysconfig bits, other times they are simply
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* memory mapped registers.
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*/
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struct stm_plat_pcie_ops {
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void (*init)(void *handle);
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void (*enable_ltssm)(void *handle);
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void (*disable_ltssm)(void *handle);
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};
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/* PCIe platform data */
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struct stm_plat_pcie_config {
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/* Which PIO the PERST# signal is on.
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* If it is not connected, and you rely on the autonomous reset,
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* then specifiy -EINVAL here
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*/
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unsigned reset_gpio;
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/* If you have a really wierd way of wanging PERST# (unlikely),
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* then do it here. Given PCI express is defined in such a way
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* that autonomous reset should work it is OK to not connect it at
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* all.
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*/
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void (*reset)(void);
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/* Magic number to shove into the amba bus bridge. The AHB driver will
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* be commoned up at some point in the future so this will change
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*/
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unsigned long ahb_val;
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/* Which miphy this pcie is using */
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int miphy_num;
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/* Magic handle to pass through to the ops */
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void *ops_handle;
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struct stm_plat_pcie_ops *ops;
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};
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/*** ILC platform data ***/
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struct stm_plat_ilc3_data {
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unsigned short inputs_num;
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unsigned short outputs_num;
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unsigned short first_irq;
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/*
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* The ILC supports the wakeup capability but on some chip when enabled
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* the system is unstable during the resume from suspend, so disable
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* it.
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*/
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int disable_wakeup:1;
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};
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/*** To claim Ethernet PAD resources from thr platform ***/
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static inline int stmmac_claim_resource(struct platform_device *pdev)
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{
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int ret = 0;
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struct plat_stmmacenet_data *plat_dat = pdev->dev.platform_data;
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if (!(devm_stm_pad_claim(&pdev->dev,
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(struct stm_pad_config *) plat_dat->custom_cfg,
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dev_name(&pdev->dev)))) {
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pr_err("%s: failed to request pads!\n", __func__);
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ret = -ENODEV;
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}
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return ret;
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}
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/* Mali specific */
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struct stm_mali_resource {
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resource_size_t start;
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resource_size_t end;
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const char *name;
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};
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struct stm_mali_config {
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/* Memory allocated by Linux kernel and
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Memory regions managed by mali driver */
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int num_mem_resources;
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struct stm_mali_resource *mem;
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/* Access to other regions of memory to directly render */
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int num_ext_resources;
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struct stm_mali_resource *ext_mem;
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};
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#endif /* __LINUX_STM_PLATFORM_H */
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