765 lines
18 KiB
C
765 lines
18 KiB
C
/*
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* linux/arch/sh/boards/se/7724/setup.c
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*
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* Copyright (C) 2009 Renesas Solutions Corp.
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*
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* Kuninori Morimoto <morimoto.kuninori@renesas.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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#include <linux/delay.h>
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#include <linux/smc91x.h>
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#include <linux/gpio.h>
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#include <linux/input.h>
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#include <linux/usb/r8a66597.h>
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#include <video/sh_mobile_lcdc.h>
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#include <media/sh_mobile_ceu.h>
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#include <sound/sh_fsi.h>
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#include <asm/io.h>
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#include <asm/heartbeat.h>
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#include <asm/sh_eth.h>
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#include <asm/clock.h>
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#include <asm/sh_keysc.h>
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#include <cpu/sh7724.h>
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#include <mach-se/mach/se7724.h>
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/*
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* SWx 1234 5678
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* ------------------------------------
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* SW31 : 1001 1100 : default
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* SW32 : 0111 1111 : use on board flash
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*
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* SW41 : abxx xxxx -> a = 0 : Analog monitor
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* 1 : Digital monitor
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* b = 0 : VGA
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* 1 : 720p
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*/
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/*
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* about 720p
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*
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* When you use 1280 x 720 lcdc output,
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* you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
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* and change SW41 to use 720p
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*/
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/* Heartbeat */
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static struct heartbeat_data heartbeat_data = {
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.regsize = 16,
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};
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static struct resource heartbeat_resources[] = {
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[0] = {
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.start = PA_LED,
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.end = PA_LED,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device heartbeat_device = {
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.name = "heartbeat",
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.id = -1,
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.dev = {
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.platform_data = &heartbeat_data,
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},
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.num_resources = ARRAY_SIZE(heartbeat_resources),
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.resource = heartbeat_resources,
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};
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/* LAN91C111 */
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static struct smc91x_platdata smc91x_info = {
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.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
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};
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static struct resource smc91x_eth_resources[] = {
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[0] = {
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.name = "SMC91C111" ,
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.start = 0x1a300300,
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.end = 0x1a30030f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ0_SMC,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device smc91x_eth_device = {
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.name = "smc91x",
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.num_resources = ARRAY_SIZE(smc91x_eth_resources),
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.resource = smc91x_eth_resources,
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.dev = {
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.platform_data = &smc91x_info,
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},
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};
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/* MTD */
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static struct mtd_partition nor_flash_partitions[] = {
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{
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.name = "uboot",
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.offset = 0,
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.size = (1 * 1024 * 1024),
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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}, {
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = (2 * 1024 * 1024),
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}, {
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.name = "free-area",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data nor_flash_data = {
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.width = 2,
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.parts = nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(nor_flash_partitions),
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};
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static struct resource nor_flash_resources[] = {
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[0] = {
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.name = "NOR Flash",
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.start = 0x00000000,
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.end = 0x01ffffff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device nor_flash_device = {
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.name = "physmap-flash",
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.resource = nor_flash_resources,
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.num_resources = ARRAY_SIZE(nor_flash_resources),
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.dev = {
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.platform_data = &nor_flash_data,
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},
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};
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/* LCDC */
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static struct sh_mobile_lcdc_info lcdc_info = {
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.clock_source = LCDC_CLK_EXTERNAL,
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.ch[0] = {
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.chan = LCDC_CHAN_MAINLCD,
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.bpp = 16,
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.clock_divider = 1,
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.lcd_cfg = {
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.name = "LB070WV1",
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.sync = 0, /* hsync and vsync are active low */
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},
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.lcd_size_cfg = { /* 7.0 inch */
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.width = 152,
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.height = 91,
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},
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.board_cfg = {
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},
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}
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};
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static struct resource lcdc_resources[] = {
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[0] = {
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.name = "LCDC",
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.start = 0xfe940000,
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.end = 0xfe942fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 106,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device lcdc_device = {
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.name = "sh_mobile_lcdc_fb",
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.num_resources = ARRAY_SIZE(lcdc_resources),
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.resource = lcdc_resources,
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.dev = {
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.platform_data = &lcdc_info,
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},
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.archdata = {
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.hwblk_id = HWBLK_LCDC,
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},
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};
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/* CEU0 */
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static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
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.flags = SH_CEU_FLAG_USE_8BIT_BUS,
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};
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static struct resource ceu0_resources[] = {
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[0] = {
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.name = "CEU0",
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.start = 0xfe910000,
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.end = 0xfe91009f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 52,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* place holder for contiguous memory */
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},
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};
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static struct platform_device ceu0_device = {
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.name = "sh_mobile_ceu",
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.id = 0, /* "ceu0" clock */
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.num_resources = ARRAY_SIZE(ceu0_resources),
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.resource = ceu0_resources,
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.dev = {
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.platform_data = &sh_mobile_ceu0_info,
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},
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.archdata = {
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.hwblk_id = HWBLK_CEU0,
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},
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};
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/* CEU1 */
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static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
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.flags = SH_CEU_FLAG_USE_8BIT_BUS,
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};
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static struct resource ceu1_resources[] = {
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[0] = {
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.name = "CEU1",
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.start = 0xfe914000,
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.end = 0xfe91409f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 63,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* place holder for contiguous memory */
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},
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};
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static struct platform_device ceu1_device = {
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.name = "sh_mobile_ceu",
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.id = 1, /* "ceu1" clock */
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.num_resources = ARRAY_SIZE(ceu1_resources),
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.resource = ceu1_resources,
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.dev = {
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.platform_data = &sh_mobile_ceu1_info,
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},
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.archdata = {
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.hwblk_id = HWBLK_CEU1,
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},
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};
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/* FSI */
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/*
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* FSI-A use external clock which came from ak464x.
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* So, we should change parent of fsi
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*/
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#define FCLKACR 0xa4150008
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static void fsimck_init(struct clk *clk)
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{
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u32 status = ctrl_inl(clk->enable_reg);
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/* use external clock */
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status &= ~0x000000ff;
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status |= 0x00000080;
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ctrl_outl(status, clk->enable_reg);
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}
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static struct clk_ops fsimck_clk_ops = {
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.init = fsimck_init,
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};
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static struct clk fsimcka_clk = {
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.name = "fsimcka_clk",
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.id = -1,
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.ops = &fsimck_clk_ops,
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.enable_reg = (void __iomem *)FCLKACR,
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.rate = 0, /* unknown */
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};
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struct sh_fsi_platform_info fsi_info = {
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.porta_flags = SH_FSI_BRS_INV |
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SH_FSI_OUT_SLAVE_MODE |
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SH_FSI_IN_SLAVE_MODE |
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SH_FSI_OFMT(PCM) |
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SH_FSI_IFMT(PCM),
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};
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static struct resource fsi_resources[] = {
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[0] = {
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.name = "FSI",
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.start = 0xFE3C0000,
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.end = 0xFE3C021d,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 108,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device fsi_device = {
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.name = "sh_fsi",
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.id = 0,
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.num_resources = ARRAY_SIZE(fsi_resources),
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.resource = fsi_resources,
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.dev = {
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.platform_data = &fsi_info,
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},
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};
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/* KEYSC in SoC (Needs SW33-2 set to ON) */
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static struct sh_keysc_info keysc_info = {
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.mode = SH_KEYSC_MODE_1,
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.scan_timing = 10,
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.delay = 50,
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.keycodes = {
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KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
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KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
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KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
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KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
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KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
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KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
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},
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};
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static struct resource keysc_resources[] = {
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[0] = {
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.name = "KEYSC",
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.start = 0x044b0000,
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.end = 0x044b000f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 79,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device keysc_device = {
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.name = "sh_keysc",
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.id = 0, /* "keysc0" clock */
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.num_resources = ARRAY_SIZE(keysc_resources),
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.resource = keysc_resources,
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.dev = {
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.platform_data = &keysc_info,
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},
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.archdata = {
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.hwblk_id = HWBLK_KEYSC,
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},
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};
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/* SH Eth */
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static struct resource sh_eth_resources[] = {
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[0] = {
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.start = SH_ETH_ADDR,
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.end = SH_ETH_ADDR + 0x1FC,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 91,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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struct sh_eth_plat_data sh_eth_plat = {
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.phy = 0x1f, /* SMSC LAN8187 */
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.edmac_endian = EDMAC_LITTLE_ENDIAN,
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};
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static struct platform_device sh_eth_device = {
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.name = "sh-eth",
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.id = 0,
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.dev = {
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.platform_data = &sh_eth_plat,
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},
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.num_resources = ARRAY_SIZE(sh_eth_resources),
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.resource = sh_eth_resources,
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.archdata = {
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.hwblk_id = HWBLK_ETHER,
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},
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};
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static struct r8a66597_platdata sh7724_usb0_host_data = {
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.on_chip = 1,
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};
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static struct resource sh7724_usb0_host_resources[] = {
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[0] = {
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.start = 0xa4d80000,
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.end = 0xa4d80124 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 65,
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.end = 65,
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.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
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},
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};
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static struct platform_device sh7724_usb0_host_device = {
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.name = "r8a66597_hcd",
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.id = 0,
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.dev = {
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.dma_mask = NULL, /* not use dma */
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &sh7724_usb0_host_data,
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},
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.num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
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.resource = sh7724_usb0_host_resources,
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.archdata = {
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.hwblk_id = HWBLK_USB0,
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},
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};
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static struct r8a66597_platdata sh7724_usb1_gadget_data = {
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.on_chip = 1,
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};
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static struct resource sh7724_usb1_gadget_resources[] = {
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[0] = {
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.start = 0xa4d90000,
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.end = 0xa4d90123,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 66,
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.end = 66,
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.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
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},
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};
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static struct platform_device sh7724_usb1_gadget_device = {
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.name = "r8a66597_udc",
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.id = 1, /* USB1 */
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.dev = {
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.dma_mask = NULL, /* not use dma */
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &sh7724_usb1_gadget_data,
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},
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.num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
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.resource = sh7724_usb1_gadget_resources,
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};
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static struct platform_device *ms7724se_devices[] __initdata = {
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&heartbeat_device,
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&smc91x_eth_device,
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&lcdc_device,
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&nor_flash_device,
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&ceu0_device,
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&ceu1_device,
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&keysc_device,
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&sh_eth_device,
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&sh7724_usb0_host_device,
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&sh7724_usb1_gadget_device,
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&fsi_device,
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};
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#define EEPROM_OP 0xBA206000
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#define EEPROM_ADR 0xBA206004
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#define EEPROM_DATA 0xBA20600C
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#define EEPROM_STAT 0xBA206010
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#define EEPROM_STRT 0xBA206014
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static int __init sh_eth_is_eeprom_ready(void)
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{
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int t = 10000;
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while (t--) {
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if (!ctrl_inw(EEPROM_STAT))
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return 1;
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cpu_relax();
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}
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printk(KERN_ERR "ms7724se can not access to eeprom\n");
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return 0;
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}
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static void __init sh_eth_init(void)
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{
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int i;
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u16 mac[3];
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/* check EEPROM status */
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if (!sh_eth_is_eeprom_ready())
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return;
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/* read MAC addr from EEPROM */
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for (i = 0 ; i < 3 ; i++) {
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ctrl_outw(0x0, EEPROM_OP); /* read */
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ctrl_outw(i*2, EEPROM_ADR);
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ctrl_outw(0x1, EEPROM_STRT);
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if (!sh_eth_is_eeprom_ready())
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return;
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mac[i] = ctrl_inw(EEPROM_DATA);
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mac[i] = ((mac[i] & 0xFF) << 8) | (mac[i] >> 8); /* swap */
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}
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/* reset sh-eth */
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ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
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/* set MAC addr */
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ctrl_outl(((mac[0] << 16) | (mac[1])), SH_ETH_MAHR);
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ctrl_outl((mac[2]), SH_ETH_MALR);
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}
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#define SW4140 0xBA201000
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#define FPGA_OUT 0xBA200400
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#define PORT_HIZA 0xA4050158
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#define PORT_MSELCRB 0xA4050182
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#define SW41_A 0x0100
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#define SW41_B 0x0200
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#define SW41_C 0x0400
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#define SW41_D 0x0800
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#define SW41_E 0x1000
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#define SW41_F 0x2000
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#define SW41_G 0x4000
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#define SW41_H 0x8000
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static int __init devices_setup(void)
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{
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u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
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struct clk *fsia_clk;
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/* Reset Release */
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ctrl_outw(ctrl_inw(FPGA_OUT) &
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~((1 << 1) | /* LAN */
|
|
(1 << 6) | /* VIDEO DAC */
|
|
(1 << 7) | /* AK4643 */
|
|
(1 << 12) | /* USB0 */
|
|
(1 << 14)), /* RMII */
|
|
FPGA_OUT);
|
|
|
|
/* turn on USB clocks, use external clock */
|
|
ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
|
|
|
|
#ifdef CONFIG_PM
|
|
/* Let LED9 show STATUS2 */
|
|
gpio_request(GPIO_FN_STATUS2, NULL);
|
|
|
|
/* Lit LED10 show STATUS0 */
|
|
gpio_request(GPIO_FN_STATUS0, NULL);
|
|
|
|
/* Lit LED11 show PDSTATUS */
|
|
gpio_request(GPIO_FN_PDSTATUS, NULL);
|
|
#else
|
|
/* Lit LED9 */
|
|
gpio_request(GPIO_PTJ6, NULL);
|
|
gpio_direction_output(GPIO_PTJ6, 1);
|
|
gpio_export(GPIO_PTJ6, 0);
|
|
|
|
/* Lit LED10 */
|
|
gpio_request(GPIO_PTJ5, NULL);
|
|
gpio_direction_output(GPIO_PTJ5, 1);
|
|
gpio_export(GPIO_PTJ5, 0);
|
|
|
|
/* Lit LED11 */
|
|
gpio_request(GPIO_PTJ7, NULL);
|
|
gpio_direction_output(GPIO_PTJ7, 1);
|
|
gpio_export(GPIO_PTJ7, 0);
|
|
#endif
|
|
|
|
/* enable USB0 port */
|
|
ctrl_outw(0x0600, 0xa40501d4);
|
|
|
|
/* enable USB1 port */
|
|
ctrl_outw(0x0600, 0xa4050192);
|
|
|
|
/* enable IRQ 0,1,2 */
|
|
gpio_request(GPIO_FN_INTC_IRQ0, NULL);
|
|
gpio_request(GPIO_FN_INTC_IRQ1, NULL);
|
|
gpio_request(GPIO_FN_INTC_IRQ2, NULL);
|
|
|
|
/* enable SCIFA3 */
|
|
gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
|
|
gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
|
|
gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
|
|
gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
|
|
gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
|
|
|
|
/* enable LCDC */
|
|
gpio_request(GPIO_FN_LCDD23, NULL);
|
|
gpio_request(GPIO_FN_LCDD22, NULL);
|
|
gpio_request(GPIO_FN_LCDD21, NULL);
|
|
gpio_request(GPIO_FN_LCDD20, NULL);
|
|
gpio_request(GPIO_FN_LCDD19, NULL);
|
|
gpio_request(GPIO_FN_LCDD18, NULL);
|
|
gpio_request(GPIO_FN_LCDD17, NULL);
|
|
gpio_request(GPIO_FN_LCDD16, NULL);
|
|
gpio_request(GPIO_FN_LCDD15, NULL);
|
|
gpio_request(GPIO_FN_LCDD14, NULL);
|
|
gpio_request(GPIO_FN_LCDD13, NULL);
|
|
gpio_request(GPIO_FN_LCDD12, NULL);
|
|
gpio_request(GPIO_FN_LCDD11, NULL);
|
|
gpio_request(GPIO_FN_LCDD10, NULL);
|
|
gpio_request(GPIO_FN_LCDD9, NULL);
|
|
gpio_request(GPIO_FN_LCDD8, NULL);
|
|
gpio_request(GPIO_FN_LCDD7, NULL);
|
|
gpio_request(GPIO_FN_LCDD6, NULL);
|
|
gpio_request(GPIO_FN_LCDD5, NULL);
|
|
gpio_request(GPIO_FN_LCDD4, NULL);
|
|
gpio_request(GPIO_FN_LCDD3, NULL);
|
|
gpio_request(GPIO_FN_LCDD2, NULL);
|
|
gpio_request(GPIO_FN_LCDD1, NULL);
|
|
gpio_request(GPIO_FN_LCDD0, NULL);
|
|
gpio_request(GPIO_FN_LCDDISP, NULL);
|
|
gpio_request(GPIO_FN_LCDHSYN, NULL);
|
|
gpio_request(GPIO_FN_LCDDCK, NULL);
|
|
gpio_request(GPIO_FN_LCDVSYN, NULL);
|
|
gpio_request(GPIO_FN_LCDDON, NULL);
|
|
gpio_request(GPIO_FN_LCDVEPWC, NULL);
|
|
gpio_request(GPIO_FN_LCDVCPWC, NULL);
|
|
gpio_request(GPIO_FN_LCDRD, NULL);
|
|
gpio_request(GPIO_FN_LCDLCLK, NULL);
|
|
ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
|
|
|
|
/* enable CEU0 */
|
|
gpio_request(GPIO_FN_VIO0_D15, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D14, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D13, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D12, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D11, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D10, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D9, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D8, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D7, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D6, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D5, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D4, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D3, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D2, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D1, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D0, NULL);
|
|
gpio_request(GPIO_FN_VIO0_VD, NULL);
|
|
gpio_request(GPIO_FN_VIO0_CLK, NULL);
|
|
gpio_request(GPIO_FN_VIO0_FLD, NULL);
|
|
gpio_request(GPIO_FN_VIO0_HD, NULL);
|
|
platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
|
|
|
|
/* enable CEU1 */
|
|
gpio_request(GPIO_FN_VIO1_D7, NULL);
|
|
gpio_request(GPIO_FN_VIO1_D6, NULL);
|
|
gpio_request(GPIO_FN_VIO1_D5, NULL);
|
|
gpio_request(GPIO_FN_VIO1_D4, NULL);
|
|
gpio_request(GPIO_FN_VIO1_D3, NULL);
|
|
gpio_request(GPIO_FN_VIO1_D2, NULL);
|
|
gpio_request(GPIO_FN_VIO1_D1, NULL);
|
|
gpio_request(GPIO_FN_VIO1_D0, NULL);
|
|
gpio_request(GPIO_FN_VIO1_FLD, NULL);
|
|
gpio_request(GPIO_FN_VIO1_HD, NULL);
|
|
gpio_request(GPIO_FN_VIO1_VD, NULL);
|
|
gpio_request(GPIO_FN_VIO1_CLK, NULL);
|
|
platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
|
|
|
|
/* KEYSC */
|
|
gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
|
|
gpio_request(GPIO_FN_KEYIN4, NULL);
|
|
gpio_request(GPIO_FN_KEYIN3, NULL);
|
|
gpio_request(GPIO_FN_KEYIN2, NULL);
|
|
gpio_request(GPIO_FN_KEYIN1, NULL);
|
|
gpio_request(GPIO_FN_KEYIN0, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT3, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT2, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT1, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT0, NULL);
|
|
|
|
/* enable FSI */
|
|
gpio_request(GPIO_FN_FSIMCKB, NULL);
|
|
gpio_request(GPIO_FN_FSIMCKA, NULL);
|
|
gpio_request(GPIO_FN_FSIOASD, NULL);
|
|
gpio_request(GPIO_FN_FSIIABCK, NULL);
|
|
gpio_request(GPIO_FN_FSIIALRCK, NULL);
|
|
gpio_request(GPIO_FN_FSIOABCK, NULL);
|
|
gpio_request(GPIO_FN_FSIOALRCK, NULL);
|
|
gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
|
|
gpio_request(GPIO_FN_FSIIBSD, NULL);
|
|
gpio_request(GPIO_FN_FSIOBSD, NULL);
|
|
gpio_request(GPIO_FN_FSIIBBCK, NULL);
|
|
gpio_request(GPIO_FN_FSIIBLRCK, NULL);
|
|
gpio_request(GPIO_FN_FSIOBBCK, NULL);
|
|
gpio_request(GPIO_FN_FSIOBLRCK, NULL);
|
|
gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
|
|
gpio_request(GPIO_FN_FSIIASD, NULL);
|
|
|
|
/* change parent of FSI A */
|
|
fsia_clk = clk_get(NULL, "fsia_clk");
|
|
clk_register(&fsimcka_clk);
|
|
clk_set_parent(fsia_clk, &fsimcka_clk);
|
|
clk_set_rate(fsia_clk, 11000);
|
|
clk_set_rate(&fsimcka_clk, 11000);
|
|
clk_put(fsia_clk);
|
|
|
|
/*
|
|
* enable SH-Eth
|
|
*
|
|
* please remove J33 pin from your board !!
|
|
*
|
|
* ms7724 board should not use GPIO_FN_LNKSTA pin
|
|
* So, This time PTX5 is set to input pin
|
|
*/
|
|
gpio_request(GPIO_FN_RMII_RXD0, NULL);
|
|
gpio_request(GPIO_FN_RMII_RXD1, NULL);
|
|
gpio_request(GPIO_FN_RMII_TXD0, NULL);
|
|
gpio_request(GPIO_FN_RMII_TXD1, NULL);
|
|
gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
|
|
gpio_request(GPIO_FN_RMII_TX_EN, NULL);
|
|
gpio_request(GPIO_FN_RMII_RX_ER, NULL);
|
|
gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
|
|
gpio_request(GPIO_FN_MDIO, NULL);
|
|
gpio_request(GPIO_FN_MDC, NULL);
|
|
gpio_request(GPIO_PTX5, NULL);
|
|
gpio_direction_input(GPIO_PTX5);
|
|
sh_eth_init();
|
|
|
|
if (sw & SW41_B) {
|
|
/* 720p */
|
|
lcdc_info.ch[0].lcd_cfg.xres = 1280;
|
|
lcdc_info.ch[0].lcd_cfg.yres = 720;
|
|
lcdc_info.ch[0].lcd_cfg.left_margin = 220;
|
|
lcdc_info.ch[0].lcd_cfg.right_margin = 110;
|
|
lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
|
|
lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
|
|
lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
|
|
lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
|
|
} else {
|
|
/* VGA */
|
|
lcdc_info.ch[0].lcd_cfg.xres = 640;
|
|
lcdc_info.ch[0].lcd_cfg.yres = 480;
|
|
lcdc_info.ch[0].lcd_cfg.left_margin = 105;
|
|
lcdc_info.ch[0].lcd_cfg.right_margin = 50;
|
|
lcdc_info.ch[0].lcd_cfg.hsync_len = 96;
|
|
lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
|
|
lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
|
|
lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
|
|
}
|
|
|
|
if (sw & SW41_A) {
|
|
/* Digital monitor */
|
|
lcdc_info.ch[0].interface_type = RGB18;
|
|
lcdc_info.ch[0].flags = 0;
|
|
} else {
|
|
/* Analog monitor */
|
|
lcdc_info.ch[0].interface_type = RGB24;
|
|
lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
|
|
}
|
|
|
|
return platform_add_devices(ms7724se_devices,
|
|
ARRAY_SIZE(ms7724se_devices));
|
|
}
|
|
device_initcall(devices_setup);
|
|
|
|
static struct sh_machine_vector mv_ms7724se __initmv = {
|
|
.mv_name = "ms7724se",
|
|
.mv_init_irq = init_se7724_IRQ,
|
|
.mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
|
|
};
|