500 lines
12 KiB
C
500 lines
12 KiB
C
/*
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comedi/drivers/ni_6527.c
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driver for National Instruments PCI-6527
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COMEDI - Linux Control and Measurement Device Interface
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Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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Driver: ni_6527
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Description: National Instruments 6527
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Author: ds
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Status: works
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Devices: [National Instruments] PCI-6527 (ni6527), PXI-6527
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Updated: Sat, 25 Jan 2003 13:24:40 -0800
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*/
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/*
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Manuals (available from ftp://ftp.natinst.com/support/manuals)
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370106b.pdf 6527 Register Level Programmer Manual
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*/
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#define DEBUG 1
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#define DEBUG_FLAGS
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#include <linux/interrupt.h>
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#include "../comedidev.h"
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#include "mite.h"
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#define NI6527_DIO_SIZE 4096
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#define NI6527_MITE_SIZE 4096
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#define Port_Register(x) (0x00+(x))
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#define ID_Register 0x06
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#define Clear_Register 0x07
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#define ClrEdge 0x08
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#define ClrOverflow 0x04
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#define ClrFilter 0x02
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#define ClrInterval 0x01
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#define Filter_Interval(x) (0x08+(x))
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#define Filter_Enable(x) (0x0c+(x))
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#define Change_Status 0x14
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#define MasterInterruptStatus 0x04
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#define Overflow 0x02
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#define EdgeStatus 0x01
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#define Master_Interrupt_Control 0x15
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#define FallingEdgeIntEnable 0x10
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#define RisingEdgeIntEnable 0x08
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#define MasterInterruptEnable 0x04
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#define OverflowIntEnable 0x02
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#define EdgeIntEnable 0x01
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#define Rising_Edge_Detection_Enable(x) (0x018+(x))
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#define Falling_Edge_Detection_Enable(x) (0x020+(x))
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static int ni6527_attach(struct comedi_device *dev,
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struct comedi_devconfig *it);
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static int ni6527_detach(struct comedi_device *dev);
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static struct comedi_driver driver_ni6527 = {
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.driver_name = "ni6527",
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.module = THIS_MODULE,
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.attach = ni6527_attach,
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.detach = ni6527_detach,
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};
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struct ni6527_board {
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int dev_id;
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const char *name;
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};
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static const struct ni6527_board ni6527_boards[] = {
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{
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.dev_id = 0x2b20,
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.name = "pci-6527",
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},
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{
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.dev_id = 0x2b10,
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.name = "pxi-6527",
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},
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};
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#define n_ni6527_boards ARRAY_SIZE(ni6527_boards)
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#define this_board ((const struct ni6527_board *)dev->board_ptr)
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static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = {
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{
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PCI_VENDOR_ID_NATINST, 0x2b10, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
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PCI_VENDOR_ID_NATINST, 0x2b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
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0}
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};
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MODULE_DEVICE_TABLE(pci, ni6527_pci_table);
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struct ni6527_private {
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struct mite_struct *mite;
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unsigned int filter_interval;
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unsigned int filter_enable;
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};
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#define devpriv ((struct ni6527_private *)dev->private)
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static int ni6527_find_device(struct comedi_device *dev, int bus, int slot);
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static int ni6527_di_insn_config(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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{
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int chan = CR_CHAN(insn->chanspec);
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unsigned int interval;
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if (insn->n != 2)
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return -EINVAL;
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if (data[0] != INSN_CONFIG_FILTER)
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return -EINVAL;
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if (data[1]) {
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interval = (data[1] + 100) / 200;
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data[1] = interval * 200;
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if (interval != devpriv->filter_interval) {
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writeb(interval & 0xff,
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devpriv->mite->daq_io_addr + Filter_Interval(0));
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writeb((interval >> 8) & 0xff,
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devpriv->mite->daq_io_addr + Filter_Interval(1));
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writeb((interval >> 16) & 0x0f,
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devpriv->mite->daq_io_addr + Filter_Interval(2));
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writeb(ClrInterval,
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devpriv->mite->daq_io_addr + Clear_Register);
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devpriv->filter_interval = interval;
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}
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devpriv->filter_enable |= 1 << chan;
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} else {
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devpriv->filter_enable &= ~(1 << chan);
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}
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writeb(devpriv->filter_enable,
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devpriv->mite->daq_io_addr + Filter_Enable(0));
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writeb(devpriv->filter_enable >> 8,
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devpriv->mite->daq_io_addr + Filter_Enable(1));
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writeb(devpriv->filter_enable >> 16,
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devpriv->mite->daq_io_addr + Filter_Enable(2));
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return 2;
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}
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static int ni6527_di_insn_bits(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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{
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if (insn->n != 2)
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return -EINVAL;
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data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0));
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data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8;
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data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16;
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return 2;
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}
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static int ni6527_do_insn_bits(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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{
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if (insn->n != 2)
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return -EINVAL;
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if (data[0]) {
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s->state &= ~data[0];
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s->state |= (data[0] & data[1]);
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/* The open relay state on the board cooresponds to 1,
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* but in Comedi, it is represented by 0. */
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if (data[0] & 0x0000ff) {
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writeb((s->state ^ 0xff),
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devpriv->mite->daq_io_addr + Port_Register(3));
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}
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if (data[0] & 0x00ff00) {
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writeb((s->state >> 8) ^ 0xff,
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devpriv->mite->daq_io_addr + Port_Register(4));
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}
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if (data[0] & 0xff0000) {
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writeb((s->state >> 16) ^ 0xff,
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devpriv->mite->daq_io_addr + Port_Register(5));
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}
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}
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data[1] = s->state;
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return 2;
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}
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static irqreturn_t ni6527_interrupt(int irq, void *d)
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{
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struct comedi_device *dev = d;
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struct comedi_subdevice *s = dev->subdevices + 2;
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unsigned int status;
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status = readb(devpriv->mite->daq_io_addr + Change_Status);
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if ((status & MasterInterruptStatus) == 0)
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return IRQ_NONE;
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if ((status & EdgeStatus) == 0)
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return IRQ_NONE;
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writeb(ClrEdge | ClrOverflow,
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devpriv->mite->daq_io_addr + Clear_Register);
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comedi_buf_put(s->async, 0);
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s->async->events |= COMEDI_CB_EOS;
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comedi_event(dev, s);
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return IRQ_HANDLED;
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}
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static int ni6527_intr_cmdtest(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_cmd *cmd)
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{
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int err = 0;
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int tmp;
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/* step 1: make sure trigger sources are trivially valid */
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tmp = cmd->start_src;
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cmd->start_src &= TRIG_NOW;
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if (!cmd->start_src || tmp != cmd->start_src)
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err++;
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tmp = cmd->scan_begin_src;
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cmd->scan_begin_src &= TRIG_OTHER;
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if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
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err++;
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tmp = cmd->convert_src;
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cmd->convert_src &= TRIG_FOLLOW;
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if (!cmd->convert_src || tmp != cmd->convert_src)
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err++;
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tmp = cmd->scan_end_src;
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cmd->scan_end_src &= TRIG_COUNT;
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if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
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err++;
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tmp = cmd->stop_src;
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cmd->stop_src &= TRIG_COUNT;
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if (!cmd->stop_src || tmp != cmd->stop_src)
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err++;
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if (err)
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return 1;
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/* step 2: make sure trigger sources are unique and mutually compatible */
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if (err)
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return 2;
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/* step 3: make sure arguments are trivially compatible */
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if (cmd->start_arg != 0) {
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cmd->start_arg = 0;
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err++;
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}
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if (cmd->scan_begin_arg != 0) {
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cmd->scan_begin_arg = 0;
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err++;
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}
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if (cmd->convert_arg != 0) {
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cmd->convert_arg = 0;
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err++;
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}
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if (cmd->scan_end_arg != 1) {
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cmd->scan_end_arg = 1;
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err++;
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}
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if (cmd->stop_arg != 0) {
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cmd->stop_arg = 0;
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err++;
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}
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if (err)
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return 3;
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/* step 4: fix up any arguments */
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if (err)
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return 4;
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return 0;
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}
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static int ni6527_intr_cmd(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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/* struct comedi_cmd *cmd = &s->async->cmd; */
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writeb(ClrEdge | ClrOverflow,
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devpriv->mite->daq_io_addr + Clear_Register);
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writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
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MasterInterruptEnable | EdgeIntEnable,
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devpriv->mite->daq_io_addr + Master_Interrupt_Control);
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return 0;
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}
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static int ni6527_intr_cancel(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
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return 0;
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}
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static int ni6527_intr_insn_bits(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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{
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if (insn->n < 1)
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return -EINVAL;
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data[1] = 0;
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return 2;
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}
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static int ni6527_intr_insn_config(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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{
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if (insn->n < 1)
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return -EINVAL;
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if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
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return -EINVAL;
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writeb(data[1],
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devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(0));
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writeb(data[1] >> 8,
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devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(1));
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writeb(data[1] >> 16,
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devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(2));
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writeb(data[2],
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devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(0));
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writeb(data[2] >> 8,
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devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(1));
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writeb(data[2] >> 16,
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devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(2));
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return 2;
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}
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static int ni6527_attach(struct comedi_device *dev, struct comedi_devconfig *it)
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{
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struct comedi_subdevice *s;
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int ret;
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printk("comedi%d: ni6527:", dev->minor);
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ret = alloc_private(dev, sizeof(struct ni6527_private));
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if (ret < 0)
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return ret;
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ret = ni6527_find_device(dev, it->options[0], it->options[1]);
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if (ret < 0)
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return ret;
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ret = mite_setup(devpriv->mite);
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if (ret < 0) {
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printk("error setting up mite\n");
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return ret;
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}
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dev->board_name = this_board->name;
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printk(" %s", dev->board_name);
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printk(" ID=0x%02x", readb(devpriv->mite->daq_io_addr + ID_Register));
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ret = alloc_subdevices(dev, 3);
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if (ret < 0)
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return ret;
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s = dev->subdevices + 0;
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s->type = COMEDI_SUBD_DI;
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s->subdev_flags = SDF_READABLE;
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s->n_chan = 24;
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s->range_table = &range_digital;
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s->maxdata = 1;
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s->insn_config = ni6527_di_insn_config;
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s->insn_bits = ni6527_di_insn_bits;
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s = dev->subdevices + 1;
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s->type = COMEDI_SUBD_DO;
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s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
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s->n_chan = 24;
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s->range_table = &range_unknown; /* FIXME: actually conductance */
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s->maxdata = 1;
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s->insn_bits = ni6527_do_insn_bits;
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s = dev->subdevices + 2;
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dev->read_subdev = s;
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s->type = COMEDI_SUBD_DI;
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s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
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s->n_chan = 1;
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s->range_table = &range_unknown;
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s->maxdata = 1;
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s->do_cmdtest = ni6527_intr_cmdtest;
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s->do_cmd = ni6527_intr_cmd;
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s->cancel = ni6527_intr_cancel;
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s->insn_bits = ni6527_intr_insn_bits;
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s->insn_config = ni6527_intr_insn_config;
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writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(0));
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writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(1));
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writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(2));
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writeb(ClrEdge | ClrOverflow | ClrFilter | ClrInterval,
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devpriv->mite->daq_io_addr + Clear_Register);
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writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
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ret = request_irq(mite_irq(devpriv->mite), ni6527_interrupt,
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IRQF_SHARED, "ni6527", dev);
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if (ret < 0) {
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printk(" irq not available");
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} else
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dev->irq = mite_irq(devpriv->mite);
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printk("\n");
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return 0;
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}
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static int ni6527_detach(struct comedi_device *dev)
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{
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if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr) {
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writeb(0x00,
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devpriv->mite->daq_io_addr + Master_Interrupt_Control);
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}
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if (dev->irq) {
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free_irq(dev->irq, dev);
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}
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if (devpriv && devpriv->mite) {
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mite_unsetup(devpriv->mite);
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}
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return 0;
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}
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static int ni6527_find_device(struct comedi_device *dev, int bus, int slot)
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{
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struct mite_struct *mite;
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int i;
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for (mite = mite_devices; mite; mite = mite->next) {
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if (mite->used)
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continue;
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if (bus || slot) {
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if (bus != mite->pcidev->bus->number ||
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slot != PCI_SLOT(mite->pcidev->devfn))
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continue;
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}
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for (i = 0; i < n_ni6527_boards; i++) {
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if (mite_device_id(mite) == ni6527_boards[i].dev_id) {
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dev->board_ptr = ni6527_boards + i;
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devpriv->mite = mite;
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return 0;
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}
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}
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}
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printk("no device found\n");
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mite_list_devices();
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return -EIO;
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}
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COMEDI_PCI_INITCLEANUP(driver_ni6527, ni6527_pci_table);
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