505 lines
12 KiB
C
505 lines
12 KiB
C
/*!***************************************************************************
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*!
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*! FILE NAME : ds1302.c
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*!
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*! DESCRIPTION: Implements an interface for the DS1302 RTC through Etrax I/O
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*!
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*! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init
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*!
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*! ---------------------------------------------------------------------------
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*!
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*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
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*!
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*!***************************************************************************/
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/miscdevice.h>
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#include <linux/delay.h>
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#include <linux/bcd.h>
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#include <linux/capability.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <arch/svinto.h>
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#include <asm/io.h>
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#include <asm/rtc.h>
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#include <arch/io_interface_mux.h>
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#include "i2c.h"
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#define RTC_MAJOR_NR 121 /* local major, change later */
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static const char ds1302_name[] = "ds1302";
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/* The DS1302 might be connected to different bits on different products.
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* It has three signals - SDA, SCL and RST. RST and SCL are always outputs,
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* but SDA can have a selected direction.
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* For now, only PORT_PB is hardcoded.
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*/
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/* The RST bit may be on either the Generic Port or Port PB. */
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#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
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#define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
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#define TK_RST_DIR(x)
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#else
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#define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
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#define TK_RST_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
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#endif
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#define TK_SDA_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
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#define TK_SCL_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
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#define TK_SDA_IN() ((*R_PORT_PB_READ >> CONFIG_ETRAX_DS1302_SDABIT) & 1)
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/* 1 is out, 0 is in */
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#define TK_SDA_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
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#define TK_SCL_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
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/*
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* The reason for tempudelay and not udelay is that loops_per_usec
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* (used in udelay) is not set when functions here are called from time.c
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*/
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static void tempudelay(int usecs)
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{
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volatile int loops;
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for(loops = usecs * 12; loops > 0; loops--)
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/* nothing */;
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}
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/* Send 8 bits. */
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static void
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out_byte(unsigned char x)
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{
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int i;
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TK_SDA_DIR(1);
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for (i = 8; i--;) {
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/* The chip latches incoming bits on the rising edge of SCL. */
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TK_SCL_OUT(0);
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TK_SDA_OUT(x & 1);
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tempudelay(1);
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TK_SCL_OUT(1);
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tempudelay(1);
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x >>= 1;
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}
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TK_SDA_DIR(0);
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}
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static unsigned char
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in_byte(void)
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{
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unsigned char x = 0;
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int i;
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/* Read byte. Bits come LSB first, on the falling edge of SCL.
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* Assume SDA is in input direction already.
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*/
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TK_SDA_DIR(0);
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for (i = 8; i--;) {
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TK_SCL_OUT(0);
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tempudelay(1);
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x >>= 1;
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x |= (TK_SDA_IN() << 7);
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TK_SCL_OUT(1);
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tempudelay(1);
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}
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return x;
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}
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/* Prepares for a transaction by de-activating RST (active-low). */
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static void
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start(void)
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{
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TK_SCL_OUT(0);
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tempudelay(1);
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TK_RST_OUT(0);
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tempudelay(5);
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TK_RST_OUT(1);
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}
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/* Ends a transaction by taking RST active again. */
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static void
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stop(void)
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{
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tempudelay(2);
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TK_RST_OUT(0);
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}
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/* Enable writing. */
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static void
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ds1302_wenable(void)
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{
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start();
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out_byte(0x8e); /* Write control register */
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out_byte(0x00); /* Disable write protect bit 7 = 0 */
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stop();
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}
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/* Disable writing. */
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static void
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ds1302_wdisable(void)
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{
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start();
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out_byte(0x8e); /* Write control register */
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out_byte(0x80); /* Disable write protect bit 7 = 0 */
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stop();
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}
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/* Read a byte from the selected register in the DS1302. */
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unsigned char
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ds1302_readreg(int reg)
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{
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unsigned char x;
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start();
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out_byte(0x81 | (reg << 1)); /* read register */
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x = in_byte();
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stop();
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return x;
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}
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/* Write a byte to the selected register. */
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void
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ds1302_writereg(int reg, unsigned char val)
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{
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#ifndef CONFIG_ETRAX_RTC_READONLY
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int do_writereg = 1;
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#else
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int do_writereg = 0;
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if (reg == RTC_TRICKLECHARGER)
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do_writereg = 1;
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#endif
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if (do_writereg) {
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ds1302_wenable();
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start();
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out_byte(0x80 | (reg << 1)); /* write register */
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out_byte(val);
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stop();
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ds1302_wdisable();
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}
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}
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void
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get_rtc_time(struct rtc_time *rtc_tm)
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{
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unsigned long flags;
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local_irq_save(flags);
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rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
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rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
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rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
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rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
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rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
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rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
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local_irq_restore(flags);
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rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
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rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
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rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
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rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
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rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
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rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
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/*
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* Account for differences between how the RTC uses the values
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* and how they are defined in a struct rtc_time;
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*/
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if (rtc_tm->tm_year <= 69)
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rtc_tm->tm_year += 100;
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rtc_tm->tm_mon--;
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}
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static unsigned char days_in_mo[] =
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{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
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/* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */
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static int
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rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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unsigned long flags;
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switch(cmd) {
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case RTC_RD_TIME: /* read the time/date from RTC */
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{
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struct rtc_time rtc_tm;
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memset(&rtc_tm, 0, sizeof (struct rtc_time));
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get_rtc_time(&rtc_tm);
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if (copy_to_user((struct rtc_time*)arg, &rtc_tm, sizeof(struct rtc_time)))
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return -EFAULT;
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return 0;
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}
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case RTC_SET_TIME: /* set the RTC */
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{
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struct rtc_time rtc_tm;
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unsigned char mon, day, hrs, min, sec, leap_yr;
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unsigned int yrs;
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if (!capable(CAP_SYS_TIME))
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return -EPERM;
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if (copy_from_user(&rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time)))
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return -EFAULT;
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yrs = rtc_tm.tm_year + 1900;
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mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
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day = rtc_tm.tm_mday;
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hrs = rtc_tm.tm_hour;
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min = rtc_tm.tm_min;
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sec = rtc_tm.tm_sec;
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if ((yrs < 1970) || (yrs > 2069))
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return -EINVAL;
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leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
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if ((mon > 12) || (day == 0))
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return -EINVAL;
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if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
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return -EINVAL;
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if ((hrs >= 24) || (min >= 60) || (sec >= 60))
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return -EINVAL;
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if (yrs >= 2000)
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yrs -= 2000; /* RTC (0, 1, ... 69) */
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else
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yrs -= 1900; /* RTC (70, 71, ... 99) */
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sec = bin2bcd(sec);
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min = bin2bcd(min);
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hrs = bin2bcd(hrs);
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day = bin2bcd(day);
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mon = bin2bcd(mon);
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yrs = bin2bcd(yrs);
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local_irq_save(flags);
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CMOS_WRITE(yrs, RTC_YEAR);
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CMOS_WRITE(mon, RTC_MONTH);
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CMOS_WRITE(day, RTC_DAY_OF_MONTH);
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CMOS_WRITE(hrs, RTC_HOURS);
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CMOS_WRITE(min, RTC_MINUTES);
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CMOS_WRITE(sec, RTC_SECONDS);
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local_irq_restore(flags);
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/* Notice that at this point, the RTC is updated but
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* the kernel is still running with the old time.
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* You need to set that separately with settimeofday
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* or adjtimex.
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*/
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return 0;
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}
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case RTC_SET_CHARGE: /* set the RTC TRICKLE CHARGE register */
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{
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int tcs_val;
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if (!capable(CAP_SYS_TIME))
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return -EPERM;
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if(copy_from_user(&tcs_val, (int*)arg, sizeof(int)))
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return -EFAULT;
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tcs_val = RTC_TCR_PATTERN | (tcs_val & 0x0F);
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ds1302_writereg(RTC_TRICKLECHARGER, tcs_val);
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return 0;
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}
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case RTC_VL_READ:
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{
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/* TODO:
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* Implement voltage low detection support
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*/
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printk(KERN_WARNING "DS1302: RTC Voltage Low detection"
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" is not supported\n");
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return 0;
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}
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case RTC_VL_CLR:
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{
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/* TODO:
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* Nothing to do since Voltage Low detection is not supported
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*/
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return 0;
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}
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default:
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return -ENOIOCTLCMD;
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}
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}
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static void
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print_rtc_status(void)
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{
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struct rtc_time tm;
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get_rtc_time(&tm);
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/*
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* There is no way to tell if the luser has the RTC set for local
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* time or for Universal Standard Time (GMT). Probably local though.
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*/
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printk(KERN_INFO "rtc_time\t: %02d:%02d:%02d\n",
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tm.tm_hour, tm.tm_min, tm.tm_sec);
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printk(KERN_INFO "rtc_date\t: %04d-%02d-%02d\n",
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tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday);
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}
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/* The various file operations we support. */
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static const struct file_operations rtc_fops = {
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.owner = THIS_MODULE,
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.ioctl = rtc_ioctl,
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};
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/* Probe for the chip by writing something to its RAM and try reading it back. */
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#define MAGIC_PATTERN 0x42
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static int __init
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ds1302_probe(void)
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{
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int retval, res;
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TK_RST_DIR(1);
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TK_SCL_DIR(1);
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TK_SDA_DIR(0);
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/* Try to talk to timekeeper. */
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ds1302_wenable();
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start();
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out_byte(0xc0); /* write RAM byte 0 */
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out_byte(MAGIC_PATTERN); /* write something magic */
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start();
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out_byte(0xc1); /* read RAM byte 0 */
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if((res = in_byte()) == MAGIC_PATTERN) {
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stop();
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ds1302_wdisable();
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printk(KERN_INFO "%s: RTC found.\n", ds1302_name);
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printk(KERN_INFO "%s: SDA, SCL, RST on PB%i, PB%i, %s%i\n",
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ds1302_name,
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CONFIG_ETRAX_DS1302_SDABIT,
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CONFIG_ETRAX_DS1302_SCLBIT,
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#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
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"GENIO",
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#else
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"PB",
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#endif
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CONFIG_ETRAX_DS1302_RSTBIT);
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print_rtc_status();
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retval = 1;
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} else {
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stop();
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retval = 0;
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}
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return retval;
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}
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/* Just probe for the RTC and register the device to handle the ioctl needed. */
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int __init
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ds1302_init(void)
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{
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#ifdef CONFIG_ETRAX_I2C
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i2c_init();
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#endif
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if (!ds1302_probe()) {
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#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
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#if CONFIG_ETRAX_DS1302_RSTBIT == 27
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/*
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* The only way to set g27 to output is to enable ATA.
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*
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* Make sure that R_GEN_CONFIG is setup correct.
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*/
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/* Allocating the ATA interface will grab almost all
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* pins in I/O groups a, b, c and d. A consequence of
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* allocating the ATA interface is that the fixed
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* interfaces shared RAM, parallel port 0, parallel
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* port 1, parallel port W, SCSI-8 port 0, SCSI-8 port
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* 1, SCSI-W, serial port 2, serial port 3,
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* synchronous serial port 3 and USB port 2 and almost
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* all GPIO pins on port g cannot be used.
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*/
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if (cris_request_io_interface(if_ata, "ds1302/ATA")) {
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printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
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return -1;
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}
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#elif CONFIG_ETRAX_DS1302_RSTBIT == 0
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if (cris_io_interface_allocate_pins(if_gpio_grp_a,
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'g',
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CONFIG_ETRAX_DS1302_RSTBIT,
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CONFIG_ETRAX_DS1302_RSTBIT)) {
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printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
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return -1;
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}
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/* Set the direction of this bit to out. */
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genconfig_shadow = ((genconfig_shadow &
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~IO_MASK(R_GEN_CONFIG, g0dir)) |
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(IO_STATE(R_GEN_CONFIG, g0dir, out)));
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*R_GEN_CONFIG = genconfig_shadow;
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#endif
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if (!ds1302_probe()) {
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printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
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return -1;
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}
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#else
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printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
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return -1;
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#endif
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}
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/* Initialise trickle charger */
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ds1302_writereg(RTC_TRICKLECHARGER,
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RTC_TCR_PATTERN |(CONFIG_ETRAX_DS1302_TRICKLE_CHARGE & 0x0F));
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/* Start clock by resetting CLOCK_HALT */
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ds1302_writereg(RTC_SECONDS, (ds1302_readreg(RTC_SECONDS) & 0x7F));
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return 0;
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}
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static int __init ds1302_register(void)
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{
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ds1302_init();
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if (register_chrdev(RTC_MAJOR_NR, ds1302_name, &rtc_fops)) {
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printk(KERN_INFO "%s: unable to get major %d for rtc\n",
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ds1302_name, RTC_MAJOR_NR);
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return -1;
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}
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return 0;
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}
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module_init(ds1302_register);
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