430 lines
10 KiB
C
430 lines
10 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2007
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#include <linux/jiffies.h>
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#include <linux/timer.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm_host.h>
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#include <asm/reg.h>
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#include <asm/time.h>
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#include <asm/byteorder.h>
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#include <asm/kvm_ppc.h>
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#include <asm/disassemble.h>
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#include "timing.h"
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#include "trace.h"
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#define OP_TRAP 3
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#define OP_31_XOP_LWZX 23
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#define OP_31_XOP_LBZX 87
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#define OP_31_XOP_STWX 151
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#define OP_31_XOP_STBX 215
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#define OP_31_XOP_STBUX 247
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#define OP_31_XOP_LHZX 279
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#define OP_31_XOP_LHZUX 311
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#define OP_31_XOP_MFSPR 339
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#define OP_31_XOP_STHX 407
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#define OP_31_XOP_STHUX 439
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#define OP_31_XOP_MTSPR 467
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#define OP_31_XOP_DCBI 470
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#define OP_31_XOP_LWBRX 534
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#define OP_31_XOP_TLBSYNC 566
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#define OP_31_XOP_STWBRX 662
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#define OP_31_XOP_LHBRX 790
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#define OP_31_XOP_STHBRX 918
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#define OP_LWZ 32
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#define OP_LWZU 33
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#define OP_LBZ 34
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#define OP_LBZU 35
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#define OP_STW 36
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#define OP_STWU 37
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#define OP_STB 38
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#define OP_STBU 39
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#define OP_LHZ 40
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#define OP_LHZU 41
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#define OP_STH 44
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#define OP_STHU 45
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void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
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{
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if (vcpu->arch.tcr & TCR_DIE) {
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/* The decrementer ticks at the same rate as the timebase, so
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* that's how we convert the guest DEC value to the number of
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* host ticks. */
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unsigned long nr_jiffies;
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nr_jiffies = vcpu->arch.dec / tb_ticks_per_jiffy;
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mod_timer(&vcpu->arch.dec_timer,
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get_jiffies_64() + nr_jiffies);
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} else {
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del_timer(&vcpu->arch.dec_timer);
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}
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}
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/* XXX to do:
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* lhax
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* lhaux
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* lswx
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* lswi
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* stswx
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* stswi
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* lha
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* lhau
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* lmw
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* stmw
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*
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* XXX is_bigendian should depend on MMU mapping or MSR[LE]
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*/
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/* XXX Should probably auto-generate instruction decoding for a particular core
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* from opcode tables in the future. */
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int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
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{
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u32 inst = vcpu->arch.last_inst;
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u32 ea;
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int ra;
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int rb;
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int rs;
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int rt;
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int sprn;
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enum emulation_result emulated = EMULATE_DONE;
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int advance = 1;
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/* this default type might be overwritten by subcategories */
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kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
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switch (get_op(inst)) {
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case OP_TRAP:
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vcpu->arch.esr |= ESR_PTR;
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kvmppc_core_queue_program(vcpu);
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advance = 0;
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break;
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case 31:
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switch (get_xop(inst)) {
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case OP_31_XOP_LWZX:
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
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break;
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case OP_31_XOP_LBZX:
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
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break;
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case OP_31_XOP_STWX:
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rs = get_rs(inst);
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emulated = kvmppc_handle_store(run, vcpu,
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vcpu->arch.gpr[rs],
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4, 1);
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break;
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case OP_31_XOP_STBX:
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rs = get_rs(inst);
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emulated = kvmppc_handle_store(run, vcpu,
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vcpu->arch.gpr[rs],
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1, 1);
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break;
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case OP_31_XOP_STBUX:
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rs = get_rs(inst);
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ra = get_ra(inst);
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rb = get_rb(inst);
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ea = vcpu->arch.gpr[rb];
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if (ra)
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ea += vcpu->arch.gpr[ra];
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emulated = kvmppc_handle_store(run, vcpu,
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vcpu->arch.gpr[rs],
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1, 1);
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vcpu->arch.gpr[rs] = ea;
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break;
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case OP_31_XOP_LHZX:
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
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break;
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case OP_31_XOP_LHZUX:
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rt = get_rt(inst);
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ra = get_ra(inst);
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rb = get_rb(inst);
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ea = vcpu->arch.gpr[rb];
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if (ra)
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ea += vcpu->arch.gpr[ra];
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emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
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vcpu->arch.gpr[ra] = ea;
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break;
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case OP_31_XOP_MFSPR:
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sprn = get_sprn(inst);
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rt = get_rt(inst);
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switch (sprn) {
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case SPRN_SRR0:
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vcpu->arch.gpr[rt] = vcpu->arch.srr0; break;
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case SPRN_SRR1:
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vcpu->arch.gpr[rt] = vcpu->arch.srr1; break;
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case SPRN_PVR:
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vcpu->arch.gpr[rt] = mfspr(SPRN_PVR); break;
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case SPRN_PIR:
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vcpu->arch.gpr[rt] = mfspr(SPRN_PIR); break;
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/* Note: mftb and TBRL/TBWL are user-accessible, so
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* the guest can always access the real TB anyways.
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* In fact, we probably will never see these traps. */
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case SPRN_TBWL:
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vcpu->arch.gpr[rt] = mftbl(); break;
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case SPRN_TBWU:
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vcpu->arch.gpr[rt] = mftbu(); break;
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case SPRN_SPRG0:
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vcpu->arch.gpr[rt] = vcpu->arch.sprg0; break;
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case SPRN_SPRG1:
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vcpu->arch.gpr[rt] = vcpu->arch.sprg1; break;
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case SPRN_SPRG2:
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vcpu->arch.gpr[rt] = vcpu->arch.sprg2; break;
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case SPRN_SPRG3:
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vcpu->arch.gpr[rt] = vcpu->arch.sprg3; break;
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/* Note: SPRG4-7 are user-readable, so we don't get
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* a trap. */
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default:
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emulated = kvmppc_core_emulate_mfspr(vcpu, sprn, rt);
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if (emulated == EMULATE_FAIL) {
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printk("mfspr: unknown spr %x\n", sprn);
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vcpu->arch.gpr[rt] = 0;
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}
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break;
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}
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break;
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case OP_31_XOP_STHX:
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rs = get_rs(inst);
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ra = get_ra(inst);
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rb = get_rb(inst);
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emulated = kvmppc_handle_store(run, vcpu,
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vcpu->arch.gpr[rs],
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2, 1);
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break;
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case OP_31_XOP_STHUX:
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rs = get_rs(inst);
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ra = get_ra(inst);
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rb = get_rb(inst);
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ea = vcpu->arch.gpr[rb];
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if (ra)
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ea += vcpu->arch.gpr[ra];
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emulated = kvmppc_handle_store(run, vcpu,
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vcpu->arch.gpr[rs],
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2, 1);
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vcpu->arch.gpr[ra] = ea;
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break;
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case OP_31_XOP_MTSPR:
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sprn = get_sprn(inst);
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rs = get_rs(inst);
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switch (sprn) {
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case SPRN_SRR0:
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vcpu->arch.srr0 = vcpu->arch.gpr[rs]; break;
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case SPRN_SRR1:
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vcpu->arch.srr1 = vcpu->arch.gpr[rs]; break;
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/* XXX We need to context-switch the timebase for
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* watchdog and FIT. */
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case SPRN_TBWL: break;
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case SPRN_TBWU: break;
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case SPRN_DEC:
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vcpu->arch.dec = vcpu->arch.gpr[rs];
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kvmppc_emulate_dec(vcpu);
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break;
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case SPRN_SPRG0:
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vcpu->arch.sprg0 = vcpu->arch.gpr[rs]; break;
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case SPRN_SPRG1:
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vcpu->arch.sprg1 = vcpu->arch.gpr[rs]; break;
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case SPRN_SPRG2:
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vcpu->arch.sprg2 = vcpu->arch.gpr[rs]; break;
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case SPRN_SPRG3:
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vcpu->arch.sprg3 = vcpu->arch.gpr[rs]; break;
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default:
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emulated = kvmppc_core_emulate_mtspr(vcpu, sprn, rs);
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if (emulated == EMULATE_FAIL)
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printk("mtspr: unknown spr %x\n", sprn);
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break;
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}
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break;
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case OP_31_XOP_DCBI:
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/* Do nothing. The guest is performing dcbi because
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* hardware DMA is not snooped by the dcache, but
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* emulated DMA either goes through the dcache as
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* normal writes, or the host kernel has handled dcache
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* coherence. */
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break;
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case OP_31_XOP_LWBRX:
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0);
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break;
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case OP_31_XOP_TLBSYNC:
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break;
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case OP_31_XOP_STWBRX:
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rs = get_rs(inst);
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ra = get_ra(inst);
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rb = get_rb(inst);
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emulated = kvmppc_handle_store(run, vcpu,
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vcpu->arch.gpr[rs],
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4, 0);
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break;
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case OP_31_XOP_LHBRX:
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0);
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break;
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case OP_31_XOP_STHBRX:
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rs = get_rs(inst);
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ra = get_ra(inst);
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rb = get_rb(inst);
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emulated = kvmppc_handle_store(run, vcpu,
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vcpu->arch.gpr[rs],
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2, 0);
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break;
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default:
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/* Attempt core-specific emulation below. */
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emulated = EMULATE_FAIL;
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}
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break;
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case OP_LWZ:
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
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break;
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case OP_LWZU:
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ra = get_ra(inst);
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
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vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
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break;
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case OP_LBZ:
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
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break;
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case OP_LBZU:
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ra = get_ra(inst);
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
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vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
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break;
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case OP_STW:
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rs = get_rs(inst);
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emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
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4, 1);
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break;
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case OP_STWU:
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ra = get_ra(inst);
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rs = get_rs(inst);
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emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
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4, 1);
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vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
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break;
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case OP_STB:
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rs = get_rs(inst);
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emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
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1, 1);
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break;
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case OP_STBU:
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ra = get_ra(inst);
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rs = get_rs(inst);
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emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
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1, 1);
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vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
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break;
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case OP_LHZ:
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
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break;
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case OP_LHZU:
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ra = get_ra(inst);
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rt = get_rt(inst);
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emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
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vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
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break;
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case OP_STH:
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rs = get_rs(inst);
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emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
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2, 1);
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break;
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case OP_STHU:
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ra = get_ra(inst);
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rs = get_rs(inst);
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emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
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2, 1);
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vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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if (emulated == EMULATE_FAIL) {
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emulated = kvmppc_core_emulate_op(run, vcpu, inst, &advance);
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if (emulated == EMULATE_FAIL) {
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advance = 0;
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printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
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"(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
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}
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}
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trace_kvm_ppc_instr(inst, vcpu->arch.pc, emulated);
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if (advance)
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vcpu->arch.pc += 4; /* Advance past emulated instruction. */
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return emulated;
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}
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